AO4728L N-Channel Enhancement Mode Field Effect Transistor

Transcription

1 NChannel Enhancement Mode Field Effect Transistor RFET TM General Description Features RFET TM uses advanced trench technology with a monolithically integrated chottky diode to provide excellent R D(ON),and low gate charge. This device is ideally suited for use as a low side switch in CPU core power conversion. V D (V) = 3V I D = A R D(ON) <.3mΩ R D(ON) < mω (V G = V) (V G = V) (V G =.V) RoH Compliant % UI Tested! Halogen Free % R g Tested! OIC D D RFET TM oft Recovery MOFET: Integrated chottky Diode G G Absolute Maximum Ratings T A = C unless otherwise noted Parameter Drainource Voltage Gateource Voltage ymbol V D V G Maximum 3 ± Units V V Continuous Drain T C = C I D Current T C =7 C 7 A Pulsed Drain Current C I DM Avalanche Current C Repetitive avalanche energy L=.mH C I AR E AR A mj Power Dissipation B T C = C 3. P D T C =7 C W Junction and torage Temperature Range T J, T TG to C Thermal Characteristics Parameter ymbol Typ Max Units Maximum JunctiontoAmbient A t s 3 C/W Maximum JunctiontoAmbient A D R θja teadytate 9 7 C/W Maximum JunctiontoLead teadytate R θjl C/W Alpha & Omega emiconductor, Ltd.

2 Electrical Characteristics (T J = C unless otherwise noted) ymbol Parameter Conditions Min Typ Max Units TATIC PARAMETER BV D Drainource Breakdown Voltage I D =µa, V G =V 3 V I D Zero Gate Voltage Drain Current V D =3V, V G =V. T J = C ma I G GateBody leakage current V D =V, V G = ±V. µa V G(th) Gate Threshold Voltage V D =V G I D =µa... V I D(ON) On state drain current V G =V, V D =V A V G =V, I D =A 3..3 R D(ON) tatic Drainource OnResistance T J = C.. mω V G =.V, I D =A. mω g F Forward Transconductance V D =V, I D =A 7 V D Diode Forward Voltage I =A,V G =V..7 V I Maximum BodyDiode Continuous Current A DYNAMIC PARAMETER C iss Input Capacitance pf C oss Output Capacitance V G =V, V D =V, f=mhz 93 9 pf C rss Reverse Transfer Capacitance 3 7 pf R g Gate resistance V G =V, V D =V, f=mhz... Ω WITCHING PARAMETER Q g (V) Total Gate Charge 7 nc Q g (.V) Total Gate Charge 3 nc V G =V, V D =V, I D =A Q gs Gate ource Charge nc Q gd Gate Drain Charge nc t D(on) TurnOn DelayTime 9. ns t r TurnOn Rise Time V G =V, V D =V, R L =.7Ω,.7 ns t D(off) TurnOff DelayTime R GEN =3Ω ns t f TurnOff Fall Time. ns t rr Body Diode Reverse Recovery Time I F =A, di/dt=a/µs 3 ns Q rr Body Diode Reverse Recovery Charge I F =A, di/dt=a/µs. 3 nc A. The value of R θja is measured with the device mounted on in FR board with oz. Copper, in a still air environment with T A = C. The value in any given application depends on the user's specific board design. B. The power dissipation P D is based on T J(MAX) = C, using s junctiontoambient thermal resistance. C. Repetitive rating, pulse width limited by junction temperature T J(MAX) = C. Ratings are based on low frequency and duty cycles to keep initialt J = C. D. The R θja is the sum of the thermal impedence from junction to lead R θjl and lead to ambient. E. The static characteristics in Figures to are obtained using <3µs pulses, duty cycle.% max. F. These curves are based on the junctiontoambient thermal impedence which is measured with the device mounted on in FR board with oz. Copper, assuming a maximum junction temperature of T J(MAX) = C. The OA curve provides a single pulse rating. Rev: Nov COMPONENT IN LIFE UPPORT DEVICE OR YTEM ARE NOT AUTHORIZED. AO DOE NOT AUME ANY LIABILITY ARIING OUT OF UCH APPLICATION OR UE OF IT PRODUCT. AO REERVE THE RIGHT TO IMPROVE PRODUCT DEIGN, FUNCTION AND RELIABILITY WITHOUT NOTICE. Alpha & Omega emiconductor, Ltd.

3 TYPICAL ELECTRICAL AND THERMAL CHARACTERITIC V V.V V V 3.V V D =V I D (A) I D (A) V G =3V C C 3 V D (Volts) Fig : OnRegion Characteristics (Note E) 3 V G (Volts) Figure : Transfer Characteristics (Note E) 7. R D(ON) (mω) 3 V G =.V V G =V Normalized OnResistance... V G =V I D =A 7 V G =.V I D =A 3 I D (A) Figure 3: OnResistance vs. Drain Current and Gate Voltage (Note E). 7 7 Temperature ( C) Figure : OnResistance vs. Junction Temperature (Note E).E I D =A 9.E C R D(ON) (mω) 7 3 C C I (A).E.E C V G (Volts) Figure : OnResistance vs. Gateource Voltage (Note E).E V D (Volts) Figure : BodyDiode Characteristics (Note E) Alpha & Omega emiconductor, Ltd.

4 TYPICAL ELECTRICAL AND THERMAL CHARACTERITIC V D =V I D =A V G (Volts) Capacitance (pf) 3 C iss C oss 3 Q g (nc) Figure 7: GateCharge Characteristics C rss 3 V D (Volts) Figure : Capacitance Characteristics I AR (A) Peak Avalanche Current T A = C T A = C T A = C T A = C.... Time in avalanche, t A (s) Figure 9: ingle Pulse Avalanche capability (Note C) I D (Amps) R D(ON) limited T J(Max) = C T C = C µs µs ms ms ms s DC. V D (Volts) Figure : Maximum Forward Biased afe Operating Area (Note F) T A = C Power (W)..... Pulse Width (s) Figure : ingle Pulse Power Rating JunctiontoAmbient (Note F) Alpha & Omega emiconductor, Ltd.

5 TYPICAL ELECTRICAL AND THERMAL CHARACTERITIC Z θja Normalized Transient Thermal Resistance.. D=T on /T T J,PK =T A P DM.Z θja.r θja R θja =7 C/W ingle Pulse In descending order D=.,.3,.,.,.,., single pulse T Pulse Width (s) Figure : Normalized Maximum Transient Thermal Impedance (Note F) P D T on Alpha & Omega emiconductor, Ltd.

6 TYPICAL ELECTRICAL AND THERMAL CHARACTERITIC.E.7.E.E3 V D =3V.. A A I R (A).E V D =V V D (V). A.3 I =A.E..E Temperature ( C) Figure 3: Diode Reverse Leakage Current vs. Junction Temperature. Temperature ( C) Figure : Diode Forward voltage vs. Junction Temperature Q rr (nc) di/dt=a/µs Q rr I rm ºC ºC ºC ºC I rm (A) t rr (ns) di/dt=a/µs t rr ºC ºC ºC ºC I (A) Figure : Diode Reverse Recovery Charge and Peak Current vs. Conduction Current 3 I (A) Figure : Diode Reverse Recovery Time and oftness Factor vs. Conduction Current Q rr (nc) 3 3 I s =A Q rr I rm ºC ºC ºC ºC di/dt (A/µs) Figure 7: Diode Reverse Recovery Charge and Peak Current vs. di/dt I rm (A) t rr (ns) º ºC ºC ºC I s =A di/dt (A/µs) Figure : Diode Reverse Recovery Time and oftness Factor vs. di/dt t rr... Alpha & Omega emiconductor, Ltd.

7 Gate Charge Test Circuit & Waveform Qg V Qgs Qgd Ig RL Resistive witching Test Circuit & Waveforms Charge Rg 9% % td(on) t r t d(off) t f t on t off Unclamped Inductive witching (UI) Test Circuit & Waveforms L E = / LI AR AR BV D Rg Id Id I AR Diode Recovery Test Circuit & Waveforms Q = Idt rr Ig Isd L Isd I F di/dt I RM t rr Alpha & Omega emiconductor, Ltd.