UNITY POWER FACTOR FRONT END RECTIFIER FOR THREE PHASE INPUT. Controller. Fig. 1 Off-Line Power Supply. Voltage. Sensor A B. Current. Sensor. Fig.

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1 Introduction Section UNITY POWER FATOR FRONT END RETIFIER FOR THREE PHASE INPUT A typical three phase offline power supply with a three phase front end rectifier is shown in Fig.. The dc power supply shown here is derived from phase ac input (45 V, phase, 5 Hz). The front end is a controlled rectifier to obtain unity power factor ac line current. The D link is a stiff dc voltage maintained by a bank of electrolytic capacitors. The switching of the front end rectifier is at high switching frequency ( khz to khz). UPF onverter Phase Modulated onverter Power ircuit of the Frontend The front end converter is designeo convert input ac power into intermediate dc power. This power conversion is done at unity input power factor. Figure shows the power circuit of the front end converter. The input power is at 45 V, phase, 5 Hz. The following are the other power components in the system.. M 45 V, A, 4 pole, MB MDS make R Y B N M Rch S PB PB ontroller Fig. Offine Power Supply Voltage Sensor urrent Sensor A B PM Fig. m Sin ( ωt φ). S 45 V, 5 A, pole Aux pole ontactor utler Hammer make. PB A Push button switch (Start) &T or Siemens make 4. PB A Push button switch (Stop) &T or Siemens make 5. PM Intelligent Power Module 75A, V Mitsubishi make 6. Rch harging resistor ( Nos) Ω, W Wirewound EE 85 V. Ramanarayanan Rc D link Rc

2 7. urrent control Reactor ( Nos) mh, 5A ustom made 8. D link capacitor ( Nos) µf, 45 V Hitachi make 9. Rc Voltage sharing resistor ( Nos), kω, W Wirewound. urrent sensor (5A) EM (custom built). Voltage sensor HP (custom built) I V R ωi Fig. The modulation of the power converter m and φ are controlled in order to control the input current to be unity power factor. The phasor diagram in Fig. explains the basis of control. The inverter input voltage is a function of the dc link voltage (), modulation index (m) and the phase of modulation (φ). The value of inductor is selected from the rated input voltage and the desired dc link voltage. The desired dc voltage for 45 V ac operation is taken as 75 V dc with a maximum modulation index of.95. For an ac input voltage corresponding to 45 V, the input rms current under rated condition is about 5 A. With these numbers the input inductor is evaluateo be at most.8 mh (5 A). There is a lower bound on the value of based on the switching ripple to about 5% (75 ma). With the assumption that the maximum ac side lineline rms ripple voltage at switching frequency is % of the dc link voltage, and a switching frequency of khz, this imposes a lower limit on the inductor to 9. mh. For this design, is chosen as mh (5A). The dc link capacitor is selecteo be 75 µf (45V) two nos of µf in series. The selection of dc link capacitor is more from the ripple current rating of the dc link capacitor (about 5% of the dc link current). The charging resistor is selected so that the charging of the capacitor is done without overcharging (overdamped condition with = mh, and = 75 µf). Average power rating of Rch is chosen about % of peak power rating. The equalising resistors R for the dc capacitors are selected to draw a bleeder current (4 ma) much higher than the leakage current (5 ma). The power rating is based on the nominal voltage across each capacitor to be at 75V. The system also has provision to measure the ac voltages (for two of the phases) anhe ac currents (for two of the phases) as well as the dc link voltage anhe dc output current. All current sensors are for 5 A to ±.5V. A voltage sensors are for 4 V to ±.5V and dc voltage sensor is for 8 V to 5 V. VA Iac UPF onverter oad kw Fig. 4 Iac ontroller 86

3 Steady State Operation of the Front End onverter The front end converter is shown in Fig. 4. The control strategy for the front end converter was explainehrough the phasor diagram in Fig.. The objectives of the control are as follows.. ontrol the dc link voltage to predetermined voltage (75 V in our application).. ontrol the input ac phase currents (Iac) to have a nearly sinusoidal shape in phase with the ac phase voltages.. ontrol the magnitude of the ac phase current to match the load on the dc bus. c q axis Iac a d axis Vin The strategy adopteo achieve the above control objectives are as follows.. The switching signals are modulated sinusoidally through simple sinetriangle modulation scheme.. The depth of modulation (m) anhe phase of modulation (φ) are simultaneously controlled in order to achieve the above control objectives. ontrol Strategy Simplified b Fig. 5 onsider the three phase ac input. The balancehree phase ac input voltages and input currents may be considered as a set of complex phasor Iac and Vin as shown in Fig. 5. Fig. 6: ine currents and line to neutral voltages Scale : pu voltage = 5 V; pu current = A EE 87 V. Ramanarayanan

4 .5 dc bus voltage (pu).5.5 The magnitude and phase relationship of the phasor Vin determines the modulation index m and modulation phase angle φ. Steady state input ac phase currents are shown in Fig. 6 with such a control strategy. Figure 7 shows the dc bus voltage with such a control. More about the modelling of the inverter, the mathematical basis of the control strategy anhe structure of the control loops will be explained in the next section. The system simulation model will also be explained in the next section. System Modelling & Simulation Equations time (s) Fig. 7: Inverter dc bus voltage while delivering full load ( kw) current Scale : pu voltage = 5 V In this section, the system equations and modelling of the front end converter are given. The control strategy for UPF operation is outlined. The system model and control strategy are combineo prepare an overall controlled system model. The steady state and dynamic results of normal operation of the front end converter may be obtained from this model. The front end converter draws power from a balancehree phase ac source. The phase voltages are Va, Vb, Vc (45 V, phase, 5 Hz, ac). The switching converter consists of a phase bridge made up of Sa, Sb, Sc anheir complementary switches. The dc side voltage of the switching converter is controlleo be fixed at. The ac voltages seen on the ac side of the switching converter are Va, Vb, Vc. The capacitor on the dc side and the inductors (on each phase) on the ac side serve as short time energy stores in order to c Iload Va Vb Vc Iac Va UPF onverter Sa Sa Vb Sb Sc Vc Sb Sc Fig. 8 oad kw 88

5 achieve the dc side voltage control and ac side current control. The load is fixed dc at kw as sown in Fig. 8. The ac source voltages are Va = os (ωt) Vb = os (ωt π ) Vc = os (ωt π ) System Transformations: The above three phase voltages may be convertehe following two phase system for convenience. The forward (abc to αβ) and (αβ to abc) are given below. It is assumehat there is no neutral connection [(VaVbVc) = ]. Vα = Va Vβ Vb Vc Va Vb = Vα Vc Vβ The three phase to two phase transformation above simplifies the system equations by taking advantage of the redundancy present in the three phase system. The third equation in a three phase system equation is a dependent equation on the other two equations. The two phase system quantities (Vα, Vβ) are still time varying quantities. Further simplification of the system is obtained by transforming the above time varying quantities into dc quantities (under steady state) through the rotational transformation (αβ to dq) given below. The reverse rotational transformation (dq to αβ) is also given. Vd = Vq Vα = Vβ os ωt Sin ωt Sin ωt os ωt Vα Vβ os ωt Sin ωt Sin ωt os ωt Vd Vq The system equations when written in the dq coordinates are better suited for simpler control. System Equations: onsider the circuit shown in Fig. 8. The system equation of the circuit may be written as follows for phase a. Va = Va R Ia d Ia d Ia = R Ia [ V] [ V] a is defined as (Va Va) a The full set of equations may be put down in the following compact form. d [I] abc = R [I] abc [ V] abc EE 89 V. Ramanarayanan

6 d [I] αβ = R [I] αβ [ V] αβ [K] [I] αβ = [I] dq [I] αβ = [K] [I] dq d [I] αβ dt = d [K] [K] = os ωt Sin ωt Sin ωt os ωt d [K] = ω Sin ωt os ωt os ωt Sin ωt [I] dq [K] d [I] dq K d [K] = ω os ωt Sin ωt Sin ωt os ωt = ω Sin ωt os ωt os ωt Sin ωt [K] d [I] αβ = R[K] [I] αβ [K] [ V] αβ d [I] dq = R [I] dq [ V] dq ω ω The set of system equations may be written as follows. The equivalent circuit of the front end converter in the dq axes is shown in Fig. 9. d d Vd, Vq, = R ω Vd Vd = R ω Vq Vq We define two quantities Ud (Ud = Vd Vd ω ) and Uq (Uq = Vd Vd ω ). With these variables the equivalent circuit of the d axis and q axis currents may be represented by the block diagram shown in Fig.. Ud Uq R Fig. 9 Rs Rs Fig. With such simplification of the system equations a simple PI controller as shown in Fig. is adequate to obtain a satisfactory response of the d axis and q axis control. The PI controller is chosen with a time constant the same as the ac side inductor (/R) and a gain of Ki to obtain 9 Vd, Vq c Iload

7 Kp Ki s Ud Rs Kp Ki s Uq Rs the desired speed of response. The control equation for Vd and Vq are given in the following equations. Vd = (ω Vd) ( Kp (I d ) Ki ( ) dt) = Yd Xd Vq = ( ω Vq) ( Kp ( ) Ki ( ) dt) = Yq Xq Power Factor ontrol: Fig. The control of the front end converter is achievehrough the control of the reference currents for the q axis (I q ) anhe d axis (I d ).. For UPF operation, the q axis reference is made zero.. The d axis current is controlleo match the output dc power. The match between the power drawn from the ac input source through the rectifier (c) anhe power feo the load (Iload) is obtained by measuring the dc bus voltage (). A P controller working from the error voltage of the dc bus will meet this requirement. Kd Kp Ki s Ud Rs Iload Kp Ki s Uq Rs Fig. The dc capacitor voltage equation is as follows. Figure shows the d axis and q axis controllers in full detail. The scaling will be explained later. d = c Iload In the next section the simulation program of the overall system will be explained with the steady state and dynamic results. EE 9 V. Ramanarayanan

8 Simulation Model of the UPF Front End onverter The model of the converter given in the earlier section is given as a Simulation model in this section. Fig. shows the overall system. The input current under rated output power is shown in Fig. 4. The subsystems realising the various transformations and control functions Iabc I 4A, 4mS I AlphaBeta I dq, ontroller V (mod) Alpha Beta V (mod) abc Vabc Vabc V 6V, 4mS ()/Rdc /Rdc V AlphaBeta 7 Ref D ink V dq V 6V, 4mS Vcap V, 4mS D ink ontroller Fig. 4A, 4mS V (mod) 6V, 4mS 4 Va Ia Fig. 4 9

9 pi pi 5 freq w /s wt r gamma wtr wtr f(u) os A f(u) os B f(u) os Vph Vph Vao Vbo Vco Vabc wt lock Vabc Va 6V, 4mS Vout Va Fig. 5 Three Phase Source w Vref Modulator Demux Demux Ph Inverter Vabc Fig. 6 Voltage Fed Inverter Vabc Uabc Va 6V, 4mS / / V V VV di/dt IR Fig. 7 A ine urrent /s I R R Iabc Iabc Demux Demux sqrt(/) Root(/) sqrt(/) Root(/) Ia term Ib term Ic term Ibeta lock Ialpah Ibeta Fig. 8 Three Phase to Two Phase Transformation Ia 4A, 4mS Iout Ia EE 9 V. Ramanarayanan

10 Ialpha Ibeta wt cos(u) cos wt cos wt sin wt sin(u) sin wt cos wt sin wt Fig. 9 Two Phase (alpha beta) to Two Phase (d q) Transformation DQ Amplifier Vd Vd 4 Vd 5 Vq 6 w FeedForward Fig. urrent ontroller Vq Vq Vd 4 Vq 5 w D error Q Error 94 P P Fig. PI urrent ontrollers D Axis Q Axis Yd Yq Xd Xq Yd Yq Fig. Feed Forward ompensation in urrent ontroller

11 Iabc Uabc /Rdc. c Io c A, 4mS cio Io / / d/dt Fig. D ink Voltage /s Vref Io Verror are seen in Fig.. The various blocks are given in turn in the block diagrams shown in Figures 5 to 4. Kv Kff Fig. 4 D ink Voltage ontroller EE 95 V. Ramanarayanan