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1 1942 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 42, NO. 9, SEPTEMBER 2007 Design of Wide-Tuning-Range Millimeter-Wave CMOS VCO With a Standing-Wave Architecture Jun-Chau Chien, Student Member, IEEE, and Liang-Hung Lu, Member, IEEE Abstract The design of a wide-tuning-range millimeter-wave CMOS VCO is presented in this paper. In contrast to the conventional wideband topologies, a nonuniform standing-wave oscillator utilizing tapered gain elements, switched transmission lines and distributed varactors is employed to provide an extended output range with the coarse and fine frequency tuning. Due to the use of the transmission line architecture and the position-dependent amplitude of the standing waves, the loading effects of the varactors and the MOS switches can be alleviated, enabling the VCO to operate at higher frequencies. Using a m CMOS process, a 40-GHz VCO is designed and implemented. Consuming a DC power of 27 mw from a 1.5-V supply voltage, the fabricated circuit exhibits a frequency tuning range of 7.5 GHz with an output power level ranging from 13.6 to 4 dbm. The measured phase noise at 1-MHz offset is lower than 96 dbc/hz within the entire frequency range. This work demonstrates the widest tuning range in percentage among the CMOS VCOs at millimeter-wave frequencies. Index Terms CMOS millimeter-wave circuits, standing-wave oscillators, switched transmission lines, wide-tuning-range VCOs. I. INTRODUCTION WITH recent advances in the semiconductor technologies, implementation of integrated circuits at millimeter-wave frequencies for both wireless and high-speed communication systems becomes feasible by using standard CMOS processes. In such systems, the voltage-controlled oscillator (VCO) is an inevitable building block to provide the required local oscillation and clock signals. Owing to the stringent requirements in the circuit specifications such as the oscillation frequency, phase noise, output power and frequency tuning range, tremendous efforts have been made to develop high-performance CMOS VCOs for various application standards. For high-frequency VCO implementations, the cross-coupled LC-tank topology is widely used because of its advantages in the phase noise and power consumption. In the past few years, LC-tank VCOs operating at frequencies in the tens of gigahertz have been successfully demonstrated using deep-submicron bulk CMOS technologies [1] [6]. Due to the limitations on the device parasitics and the transistor capability in the millimeter-wave regime, the band-switching techniques [7], [8], which are Manuscript received September 7, 2006; revised April 12, This work was supported in part by the National Science Council under Grant E and E The authors are with the Department of Electrical Engineering and Graduate Institute of Electronics Engineering, National Taiwan University, Taipei 10617, Taiwan, R.O.C. ( lhlu@cc.ee.ntu.edu.tw). Digital Object Identifier /JSSC developed to enhance the tuning range and to reduce the tuning sensitivity of the VCOs, are no longer applicable especially for an oscillation frequency beyond 20 GHz. Therefore, most of the high-frequency LC-tank VCOs suffer from an inadequate frequency tuning range, making the circuits vulnerable to process variation and unattractive for wideband applications. Alternatively, wave-based circuit techniques have been comprehensively studied for the realization of the high-frequency oscillators. In contrast to the LC-tank VCOs, the operation of the wave-based oscillators depends on the behavior of the waves propagating on the transmission lines. Such circuits can be generally categorized into three distinct groups as the travelingwave oscillators [9], [10], the rotary traveling-wave oscillators [11], [12], and the standing-wave oscillators (SWOs) [13] [17], each having its own unique characteristics. Due to the use of distributed architectures in the circuit implementations, the loading effect can be effectively alleviated. As a result, the wave-based oscillators demonstrate great potential for wideband applications at millimeter-wave frequencies. In this paper, the theoretical analysis and the design considerations of a novel SWO [18] are presented for bandwidth enhancement. By employing tapered gain elements, the switched transmission lines, and the distributed varactors, the tuning range of the proposed VCO is significantly increased while maintaining remarkable circuit performance in terms of the output power, close-in phase noise and power consumption. Using a m CMOS process, a VCO prototype operating in the 40-GHz frequency band is implemented for demonstration. This paper is organized as follows. Section II presents the operation principles and theoretical analysis of the proposed SWO. The design and the experimental results of the 40-GHz VCO circuit are shown in Section III and IV, respectively. Finally, concluding remarks are provided in Section V. II. THE PROPOSED STANDING-WAVE OSCILLATOR A. Half-Wavelength Standing-Wave Oscillator Fig. 1 shows the simplified illustration of a half-wavelength SWO, where a signal source in the middle of the -resonator generates the forward and reverse traveling waves propagating toward both ends of the transmission line. With an ideal electrical short, the incident waves are completely reflected with an inverted phase, forming a standing wave which has a maximum voltage amplitude in the middle and a minimum voltage swing at the shorted ends. Note that, similarly, full-wavelength [14] or quarter-wavelength standing waves [16] /$ IEEE

2 CHIEN AND LU: DESIGN OF WIDE-TUNING-RANGE MILLIMETER-WAVE CMOS VCO WITH A STANDING-WAVE ARCHITECTURE 1943 Fig. 1. Conceptual illustration of a half-wavelength SWO. Fig. 2. (a) Typical circuit topology of a half-wavelength SWO. (b) Lumped equivalent circuit of the loaded transmission lines. can also be formed depending on the boundary conditions. However, this paper will focus primarily on the half-wavelength case for the demonstration of the wide-tuning-range VCO. The typical circuit topology of the half-wavelength SWO is illustrated in Fig. 2(a), where a pair of differential transmission lines with both ends shorted together is utilized as the resonator to sustain the standing waves. In the circuit implementations, the transmission lines can be realized by various on-chip structures such as the microstrip lines, coplanar striplines and coplanar waveguides. With the losses from the conductors and the substrate, practical transmission lines fabricated in the CMOS technologies exhibit significant signal attenuation, especially at higher frequencies. Consequently, cross-coupled inverters distributed along the transmission lines are employed to compensate for the losses. Compared with the traveling-wave oscillators where some portion of the energy is absorbed by the termination resistors, the signal power in the SWOs is entirely recycled due to the complete reflection at the short-circuited ends [11], [16]. As a result, the required transconductance of the cross-coupled inverters in the SWOs is generally smaller than that in the traveling-wave oscillators, leading to lower power consumption and higher voltage swing for the oscillator designs. B. Oscillation Frequency and Start-Up Conditions In order to derive the oscillation frequency and the start-up conditions, small-signal analysis is performed on the SWO where the loaded transmission lines are modeled by a lumped equivalent circuit as illustrated in Fig. 2(b). Note that,,, and are the equivalent circuit parameters of the unloaded transmission lines while and represent the equivalent transconductance and capacitance per unit length contributed by the cross-coupled inverters. By taking into account, the characteristic impedance and the propagation constant of the loaded transmission lines are given by By applying the low-loss approximation in [20], (1) and (2) can be expressed as (1) (2) (3) (4)

3 1944 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 42, NO. 9, SEPTEMBER 2007 According to the characteristics of the loaded transmission lines, the oscillation frequency of the half-wavelength SWO is given by (5) where is the phase velocity of the traveling waves, is the equivalent wavelength, and is the physical length of the halfwavelength transmission lines. In the SWO, the transconductance of the cross-coupled inverters are utilized to compensate for the losses of the transmission lines. To derive the start-up conditions for the oscillator, the attenuation constant in (4) is modified by introducing a negative conductance : (6) Fig. 3. Simulated close-in phase noise of the 40-GHz wave-based oscillators with identical stage number and power consumption. Furthermore, the compensation factor is defined as (7) for the evaluation of the oscillation start-up. The line losses can be fully compensated to initiate the oscillation as long as is larger than unity. For practical circuit designs, is typically chosen between 3 and 5 to tolerate the process variation. Note that (7) allows the first-order estimation of the required transconductance for the cross-coupled inverters in the SWO. Taking as an example, with mm and, the required is 12.5 ms/mm. Equation (7) also provides useful design insights for the circuit optimization. It is indicated that reduced power consumption can be achieved by minimizing the series resistance and by maximizing the loaded characteristic impedance of the transmission lines. C. Output Swing and Phase Noise Another advantage of the SWO is the enhanced voltage swing in the middle of the half-wavelength transmission lines, where the output nodes of the oscillator generally locate. Assuming that the amplitudes of the incident and the reflected waves are identical in a low-loss transmission media, the maximum voltage swing of the standing waves is approximately twice as large as that of the traveling waves. Following the similar derivations in [9], the single-ended oscillation amplitude of the half-wavelength SWO with identical cross-coupled inverters is given by where is the tail current of the cross-coupled pairs and is the attenuation constant given in (4). Due to the inherently low characteristic impedance and high cut-off frequency of the loaded transmission lines, the wavebased oscillators typically demonstrate a steep transition on the output voltage waveform at the zero-crossing points [21], which reduces the noise sensitivity and improves the phase noise performance. With the enhanced oscillation amplitude of the SWO, a lower close-in phase noise is expected [11], [16]. Based on the device models of a m CMOS technology provided by the (8) Fig. 4. Simplified circuit model of the SWO to illustrate the proposed frequency tuning mechanism. foundry, the simulated phase noise of two 40-GHz wave-based oscillators with identical stage number and power consumption are shown in Fig. 3. It is noted that the SWO demonstrates a phase noise lower than that of the conventional traveling-wave oscillator, making it very attractive for VCO designs at millimeter-wave frequencies. D. Frequency Tuning Mechanism As indicated in (5), the oscillation frequency of the SWO is determined by the effective length and the equivalent capacitance of the loaded transmission line. Therefore, the frequency tuning can be achieved by varying the physical length of the transmission lines with the MOS switches and by modulating the wave velocity of the transmission lines with the distributed varactors. A conceptual illustration of the proposed frequency tuning mechanism is shown in Fig. 4, where the transmission lines are periodically loaded with identical varactors and equally spaced switches are placed near both ends of the lines. Since the oscillation frequency is inversely proportional to the effective length of the transmission lines, the total number of the distinct frequency bands is given by By taking the capacitance of the varactors and the cross-coupled inverters into account, the oscillation frequency of the SWO with cross-coupled inverters and pairs of varactors is expressed as (9) (10)

4 CHIEN AND LU: DESIGN OF WIDE-TUNING-RANGE MILLIMETER-WAVE CMOS VCO WITH A STANDING-WAVE ARCHITECTURE 1945 where is the shortest electrical length achievable with all switches turned on, is the spacing between the switches, and is the number of the additional transmission line sections controlled by the switches. Note that and are the capacitances of the cross-coupled pairs and the varactors, respectively, while the parasitic capacitances of the MOS switches are neglected to simplify the analysis. Compared with the switched-capacitor topology [5] which is widely used for the wide-tuning-range LC-tank VCOs, the proposed band-switching technique features the advantage in minimizing the loading effect of the MOS switches. Due to the nature of the position-dependent amplitude for the standing waves, the switches, which are placed near both ends of the transmission lines, experience a reduced voltage swing. Significant degradation in the Q-factor of the resonator is thus prevented. In addition, since the capacitance of the varactors are considered as the circuit parameters of the artificial transmission lines, higher design flexibility is provided in the proposed SWO architecture. III. DESIGN OF THE 40-GHz WIDE-TUNING-RANGE VCO The complete schematic of the 40-GHz wide-tuning-range VCO based on the proposed SWO topology is illustrated in Fig. 5(a), where the differential half-wavelength transmission lines are loaded with five equally spaced cross-coupled inverters to compensate the losses of the resonator. Four MOS switches are placed near both ends of the resonator to provide frequency switching while three pairs of accumulation-mode MOS varactors are distributed along the transmission lines for frequency fine tuning. In order to achieve the maximum output swing and to drive the external 50- impedance of the test instrument, the differential oscillation signals of the VCO are extracted from the middle of the half-wavelength resonator through a differential output buffer loaded with transmission-line inductors and on-chip blocking capacitors, as shown in Fig. 5(b). Fig. 5(c) illustrates the six frequency bands by identifying the effective length of the transmission lines during the switching. The detailed design considerations of the 40-GHz VCO circuit are presented as follows. A. The Transmission Line Architectures The circuit design starts with the transmission lines which are realized by a microstrip line structure. For a standard m CMOS process, the signal lines are implemented by the top metal layer M6 while the bottom metal layer M1 is used as the ground plane. Since the signal lines are shielded by the ground, field penetration though the lossy Si substrate is prevented, alleviating the stringent limitations on the signal attenuation of the transmission lines at millimeter-wave frequencies. The characteristics of the microstrip line are mainly determined by the line width for a given technology, which significantly simplifies the design and optimization of the VCO circuit. In Appendix A, the design procedure for the selection of the signal width is presented. By taking the attenuation constant and the layout size into consideration, a differential microstrip line with a width of 5 m and a spacing of 15 m is employed for the circuit implementation. Based on the full-wave EM simulation, the characteristic impedance, attenuation constant, and quality factor of the unloaded transmission line in the vicinity of 40 GHz are 80.9, 0.55 db/mm, and 12.7, respectively. In the proposed VCO, the bias current for the cross-coupled pairs is provided by a differential short-stub at the center of the resonator. Since the short-stub exhibits inductive equivalent impedance at the operating frequency, it is also used to tune out part of the parasitic capacitance, reducing the loading effect in the middle of the resonator. Similar microstrip line structure with a length of 220 m is employed to realize the short-stub. According to the circuit simulations, a nearly 35% increase in the oscillation frequency is achieved in the VCO design due to the use of the short stub. It is worth noting that the proposed biasing technique potentially results in multiple oscillation modes. This can be explained by considering the short-stub as another quarter-wavelength resonator which resonates with the capacitance from the central cross-coupled pair. Nevertheless, the oscillation frequency of undesirable mode is extremely high in this particular design such that the transconductance from the cross-coupled inverters is insufficient to compensate the energy losses for a sustained oscillation. Consequently, the output frequency is mainly determined by the half-wavelength resonator in the SWO design. B. The Cross-Coupled Inverters Due to the position-dependent voltage amplitude of the standing waves, the SWO suffers from unequal shunt losses along the half-wavelength resonator [16]. The position-dependent shunt losses can be simply defined as (11) where and are the position-dependent standing-wave amplitude and shunt conductance, respectively. For a given, a larger voltage swing corresponds to higher energy losses. In order to improve the compensation efficiency, a nonuniform architecture is introduced in the proposed SWO by designing the transconductance of the central cross-coupled stage larger than that of the stages near the boundaries [19]. This concept is analogue to the technique presented in [16] where a loss-reducing tapered coplanar stripline is utilized to enhance the Q-factor of the quarter-wavelength resonator. By tapering the transconductance of the cross-coupled inverters instead of the transmission lines, the design procedure is thus simplified while a more compact chip layout can be realized. However, care should be taken to minimize the impedance mismatching of the loaded transmission lines, preventing local reflections such that the desirable standing-wave characteristics can be maintained. In this design, a transconductance twice as large as that of the other four stages is employed for the central cross-coupled pair. With a fixed oscillation frequency and output amplitude, circuit simulation indicates that a current saving up to 30% is achieved in the nonuniform SWO compared with the one with a uniform architecture. A more detailed design consideration is given in Appendix B. C. The MOS Switches For switched-capacitor VCO designs within 10 GHz, the size of the MOS switches is mainly determined based on the

5 1946 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 42, NO. 9, SEPTEMBER 2007 Fig. 5. (a) Circuit schematic of the proposed wide-tuning-range VCO. (b) Circuit schematic of the differential output buffer. (c) Proposed band-switching mechanism for the circuit implementation. trade-off between the on-resistance and the parasitic capacitance. However, as the oscillation frequency increases, special cares are required to ensure the operations of the switches. Fig. 6 illustrates simplified models of the MOS switches operating in the on and off state. For the standing-wave VCO with the switched transmission lines, it is desirable to minimize the on-resistance of the switches by increasing the aspect ratio of the MOS devices. However, if the device size is excessively large, the parasitic capacitances act as low-impedance signal paths even the switches are in the off state such that the VCO fails to perform the band switching. Hence, a design trade-off between the effective band switching and the Q-factor of the resonator should be taken into account in the selection of the MOS switches. In order to provide a useful design guideline, simulated equivalent impedances of the switches at 40 GHz are plotted in Fig. 7 for various device sizes. Based on the simulation results, a MOSFET with a channel width larger than 480 m generally fails to function as a switch at the desirable frequency bands. Therefore, a gate width of 320 m is adopted for the MOS switches in the circuit design to provide sufficient safe margin, resulting in an on-impedance of 2 and an off-impedance of 21. In the circuit layout, each one of the switches is separated into four identical cells surrounded by wide guard rings to minimize the substrate resistance [8].

6 CHIEN AND LU: DESIGN OF WIDE-TUNING-RANGE MILLIMETER-WAVE CMOS VCO WITH A STANDING-WAVE ARCHITECTURE 1947 Fig. 6. Equivalent circuit models of the MOS switches in (a) the off and (b) the on state. Fig. 8. Simulated output voltage swing as a function of the tail current for various frequency bands. Fig. 7. Simulated impedance of the MOS switches at 40 GHz. D. Band Switching and Frequency Tuning In the proposed circuit topology, the overall frequency tuning range is determined by the ratio of the maximum to the minimum length of the transmission lines, while the frequency fine tuning depends on the design of the varactors. With a specified tuning range of the VCO circuit, the varactor sizes can be traded for the number of frequency bands. In order to achieve an optimized SWO design, the losses of the half-wavelength resonator resulted from the series resistance is investigated and can be expressed as (12) where and represent the position-dependent current amplitude of the standing waves and the series resistance of the resonator, respectively. In contrast to the voltage amplitude, has a maximum swing at the boundaries of the half-wavelength resonator, imposing stringent limitations on the equivalent impedance of the switches. As large varactors are employed in the design, the frequency range of the individual bands increases accordingly, allowing less frequency bands and fewer MOS switches along the transmission lines. It is beneficial to the VCO performance in consideration of the series losses. However, the excessive capacitance from the varactors results in heavy loading on the transmission lines. In order to achieve the desirable loaded characteristic impedance, a reduced line width has to be used for the microstrip structures, leading to a possible decrease in the unloaded Q-factor of the resonator due to the higher conductor losses. In this design, the frequency tuning scheme and the SWO architecture are selected to maximize the Q-factor of the resonator such that enhanced VCO performance in terms of phase noise and power consumption can be achieved. Based on the design criteria, four switches are employed at the ends of the half-wavelength resonator while the three distributed varactors are designed to provide sufficient frequency overlapping between the adjacent frequency bands. To ensure stable oscillation signals, the loading effect of the switches and the varactors on the transmission lines must be carefully examined for each one of the frequency bands. Due to the imbalance switching at both sides of the resonator,,, and exhibit asymmetric property for the standing waves. As a result, the maximum voltage swing takes place at a point departing from where the output buffer locates, leading to a variation in the output swing among the frequency bands. In addition, the attenuation of the transmission line varies from one band to another due to an unequal number of the off switches. The equivalent impedance of the switches and the varactors also change significantly during the band switching, which further complicates the analysis of the loading effect. Nevertheless, the line attenuation at each band can still be evaluated by the required transconductance to satisfy the start-up conditions. Fig. 8 plots the simulated output voltage swing with respect to the tail current for the individual bands. Based on the simulation results, exhibits the smallest output swing while suffers from the most severe attenuation. Moreover, gives the largest oscillation amplitude due to the absence of the on-switches, leading to smaller losses and superior phase noise performance. By taking the practical considerations as described above into account, the proposed wide-tuning-range VCO is implemented at the 40-GHz frequency band. The circuit parameters in this particular design are summarized in Table I. IV. EXPERIMENTAL RESULTS Using a standard one-poly six-metal (1P6M) m CMOS process, the 40-GHz wide-tuning-range VCO is implemented for demonstration. Fig. 9 shows the microphotograph of the fabricated circuit with a chip area of mm including pads. The single-ended output spectrum and the close-in phase noise of the VCO were measured by Agilent E4407B spectrum analyzer and 11970Q harmonic mixer equipped with a phase

7 1948 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 42, NO. 9, SEPTEMBER 2007 TABLE I CIRCUIT PARAMETERS OF THE VCO Fig. 10. Measured output tuning characteristics of the proposed VCO. Fig. 11. Measured output power of the VCO for various frequency bands. Fig. 9. Microphotograph of the fabricated 40-GHz wide-tuning-range VCO. noise measurement system. To characterize the intrinsic performance of the proposed circuit, on-wafer probing was performed while the losses from the measurement setup were calibrated at 40 GHz and de-embedded in the experimental results. Operated at a supply voltage of 1.5 V, the current consumptions of the VCO core and the output buffer are 18 and 10 ma, respectively. The VCO circuit provides six overlapping frequency bands by the switches while the controlled voltage of the varactors is utilized for frequency fine tuning. Fig. 10 shows the measured output tuning characteristics of the VCO, indicating an achievable output frequency from 34.4 to 41.9 GHz and a tuning range of 20%. Note that the controlled voltage ranges from 0.5 to 2.5 V in this particular design since the center of the tuning range occurs around zero gate bias of the accumulation-mode MOS varactors. Alternatively, the SWO can be modified by employing a top-biased scheme with a pmos current source to confine the controlled voltage within the supply voltage. From the measured tuning characteristics, it is also observed that the tuning range of each individual bands decreases from to. This is primarily due to the increasing effective length of the transmission lines and the additional capacitive loading as more switches are turned off. The measured output power and phase noise of the VCO are depicted in Fig. 11 and 12, respectively. The VCO delivers an Fig. 12. Measured phase noise of the VCO at 1-MHz offset frequency. output power ranging from 13.6 to 4 dbm while the phase noise at 1-MHz offset is lower than 96 dbc/hz within the entire frequency range. The worst performance in terms of the output power and phase noise is observed at due to the excess attenuation of the resonator. Operating at the lowest frequency band with an oscillation frequency of 34.4 GHz, the measured output spectrum of the VCO are shown in Fig. 13, indicating a calibrated output power of 5.3 dbm and a phase noise of dbc/hz at 1-MHz offset. Fig. 14 shows the measured output spectrum of the VCO at the highest frequency

8 CHIEN AND LU: DESIGN OF WIDE-TUNING-RANGE MILLIMETER-WAVE CMOS VCO WITH A STANDING-WAVE ARCHITECTURE 1949 Fig. 13. VCO output spectrum at an oscillation frequency of 34.4 GHz. Fig. 14. VCO output spectrum at an oscillation frequency of 40 GHz. band. With an output frequency of 40 GHz, the calibrated output power and phase noise are 9.1 dbm and dbc/hz, respectively. To evaluate the overall performance of the VCO, a figure of merit including the frequency tuning range [22] is employed. It is defined as (13) where is the phase noise at an offset frequency from the carrier frequency, is VCO power consumption in milliwatts and stands for frequency tuning range in percentage. Based on the measurement results, the fabricated VCO exhibits a of dbc/hz. The performance of the proposed circuit along with results from the state-of-the-art millimeter-wave CMOS VCOs are summarized in Table II. V. CONCLUSION A wideband circuit topology for CMOS VCOs operating at millimeter-wave frequencies is presented in this paper. By incorporating the switched transmission lines and the distributed varactors in the nonuniform half-wavelength SWO, the output frequency range is significantly enhanced. With the theoretical analysis and design considerations for practical circuit implementations, a wide-tuning-range VCO is realized in a m CMOS technology, demonstrating a frequency tuning range of 20% in the vicinity of 40 GHz. APPENDIX A. Optimization of the Microstrip Line Geometry in the SWO A simplified design procedure for the microstrip line in the proposed VCO is demonstrated. Considering a half-wavelength SWO loaded with cross-coupled pairs, the design goal is to optimize the width of the signal lines for maximum compensation efficiency. Hence, the required transconductance of the crosscoupled inverters to meet the start-up conditions can be minimized, leading to reduced power consumption in the VCO design. The procedure starts with the parameter extraction. Based on the full-wave EM simulations, the circuit parameters of the unloaded microstrip including,,, and are extracted [23] for various line widths as shown in Fig. 15. For a given transconductance and capacitance of the cross-coupled pairs, the physical length of the loaded microstrip lines can be derived from (5) with and is expressed as (14) The calculated microstrip lengths with various numbers of the cross-coupled stages are depicted in Fig. 16. With, the compensation efficiency which can be estimated by (7) is

9 1950 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 42, NO. 9, SEPTEMBER 2007 TABLE II PERFORMANCE COMPARISON OF CMOS MILLIMETER-WAVE OSCILLATORS at 10-MHz offset FOM = PN + 20 log f 1f 0 10 log P 1mW FOM = PN + 20 log f FTR 1f 1 10% 0 10 log P 1mW Fig. 16. Required length of the microstrip lines for various stage numbers of the cross-coupled inverters with g =5mS and c =50fF each. Fig. 15. Unloaded circuit parameters extracted from full-wave EM simulations of the microstrip lines. shown in Fig. 17. It is noted that the compensation efficiency reaches its maximum values for a line width ranging from 5 to 10 m. For a signal line wider than 10 m, the associated length increases accordingly, resulting in a lower efficiency due to the reduced value of. For a stage number of 5 in the SWO Fig. 17. Simulated compensation efficiency of the SWO as a function of microstrip line width for various stage numbers of the cross-coupled inverters. design, a microstrip width of 5 m is adopted for the circuit implementation. In addition to the line width, another important design parameter to be determined is the spacing between the differential signal lines. In consideration of the of the circuit

10 CHIEN AND LU: DESIGN OF WIDE-TUNING-RANGE MILLIMETER-WAVE CMOS VCO WITH A STANDING-WAVE ARCHITECTURE 1951 Fig. 18. Simplified circuit model for the analysis of the local reflection due to the tapered gain cells. (a) Incident waves. (b) Reflected waves. layout and the series losses due to the proximity effect [24], a line spacing of 15 m is employed in this particular design. B. Design Consideration of the Tapered Gain Distribution In [19], a standing-wave oscillator with a tapered gain cells is introduced with the respective gain being amplitude-dependent to save power. The advantage of tapering seems straightforward; nevertheless, attention must be paid to the influence of the local reflection caused by impedance mismatch. By analyzing the SWO as a distributed oscillator [9], one can derive the start-up requirement including the effect of impedance mismatch along the propagation media. Fig. 18(a) shows a simplified model of the SWO with five equally spaced tapered gain stages. Starting from the center of the SWO (node ), the forward wave travels toward the right end is amplified by the gain stages. Due to the tapering of the gain stages, the equivalent characteristic impedance and propagation constant of the transmission line section is scaled, resulting in local reflections at the discontinuities. Assuming that the transmission media is lossless and the multiple reflections are neglected, the amplitude of the incident wave near the short termination (node ) is given by (15) where is the tapering factor and is the transmission coefficient at the discontinuity toward the short-circuit termination. With an ideal short circuit, the incident wave is completely reflected, denoted as. Again, the reflected wave travels along the transmission line while being amplified by the gain stages. As the wave components add up at node as shown in Fig. 18(b), the amplitude of the traveling wave is (16) where is the transmission coefficient at the discontinuity with the opposite direction to. By substituting (15) into (16), and setting, the required normalized gain to sustain the oscillation is (17) Note that the term stands for the effect of the local reflection. Larger impedance mismatch associated with the increasing tapering factor results in smaller. However, since the transconductance is tapered as well, the required overall gain reduces as increases. With the presence of impedance mismatch in the transmission line, the maximum amplitude of the standing-wave would be theoretically smaller compared with the case where the impedance is matched. However, since the bias current in the middle stage of the SWO is scaled up with a factor of, the reduction in the maximum voltage amplitude of the standing waves is not significant. In this design, a tapering factor of 2 is chosen. Moreover, in order to compensate the additional

11 1952 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 42, NO. 9, SEPTEMBER 2007 losses from the switches for band selection, the gain of the two amplifiers located near the boundaries is enlarged, leading to the proposed circuit architecture as in Fig. 5(a). ACKNOWLEDGMENT The authors would like to thank Yu-Hsun Peng of ADSI Lab and Chihun Lee of ECL Lab, Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan, for measurement supports, and National Chip Implementation Center, Hsinchu, Taiwan, for chip fabrication. REFERENCES [1] M. Tiebout, H.-D. Wohlmuth, and W. Simbürger, A 1 V 51 GHz fullyintegrated VCO in 0.12 m CMOS, in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, 2002, pp [2] A. P. van der Wel et al., A robust 43-GHz VCO in CMOS for OC-768 SONET applications, IEEE J. Solid-State Circuits, vol. 39, no. 7, pp , Jul [3] L. M. Franca-Neto, R. E. Bishop, and B. A. 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Papers, 2004, pp Jun-Chau Chien (S 05) received the B.S. and M.S. degrees in electronics engineering from National Taiwan University, Taipei, Taiwan, R.O.C., in 2004 and 2006, respectively. His research interests focus on integrated circuit designs for high-speed communication systems. Mr. Chien was a recipient of the 2007 IEEE ISSCC Silkroad Award, the 2006 Outstanding Research Award and Annual Best Thesis Award of Graduate Institute of Electronics Engineering, National Taiwan University. Liang-Hung Lu (M 02) received the B.S. and M.S. degrees in electronics engineering from National Chiao-Tung University, Hsinchu, Taiwan, R.O.C., in 1991 and 1993, respectively, and the Ph.D. degree in electrical engineering from the University of Michigan, Ann Arbor, MI, in During his graduate study, he was involved in SiGe HBT technology and monolithic microwave integrated circuit (MMIC) designs. From 2001 to 2002, he was with IBM T. J. Watson Research Center, Yorktown Heights, New York, working on low-power and RF integrated circuits for silicon-on-insulator (SOI) technology. In August 2002, he joined the faculty of the Graduate Institute of Electronics Engineering and the Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, where he is currently an Associate Professor. His research interests include CMOS/BiCMOS RF and mixed-signal integrated circuit designs.