MAX13442E/MAX13443E/ MAX13444E. ±15kV ESD-Protected, ±80V Fault-Protected, Fail-Safe RS-485/J1708 Transceivers

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1 MX13442E/MX13443E/ General escription The MX13442E/ are fault-protected S-485 and J178 transceivers that feature ±8V protection from signal faults on communication bus lines. The MX13442E/ feature a reduced slew-rate driver that minimizes EMI and reflections, allowing errorfree transmission up to 25kbps. The MX13443E driver can transmit up to 1Mbps. The high-speed MX13443E S-485 transceiver features ±6V protection from signal faults on communication bus lines. These transceivers feature foldback current limit. Each device contains one differential line driver with three-state output and one differential line receiver with three-state input. The 1/4-unitload receiver input impedance allows up to 128 transceivers on a single bus. The devices operate from a 5V supply. True fail-safe inputs guarantee a logic-high receiver output when the receiver inputs are open, shorted, or connected to an idle data line. Hot-swap circuitry eliminates false transitions on the data bus during circuit initialization or connection to a live backplane. Short-circuit current-limiting and thermal-shutdown circuitry protect the driver against excessive power dissipation, and on-chip ±15kV ES protection eliminates costly external protection devices. The MX13442E/MX13443E/ are available in an 8-pin SO package and are specified over the automotive temperature range. Selector Guide PT TYPE T TE (Mbps) FULT PTECTION (V) LOW-POWE SHUTOWN Features ±15kV ES Protection ±8V Fault Protection (±6V MX13443E) Guaranteed 1Mbps ata ate (MX13443E) Hot-Swappable for Telecom pplications True Fail-Safe eceiver Inputs Enhanced Slew-ate-Limiting Facilitates Error-Free ata Transmission (MX13442E/) llow Up to 128 Transceivers on the us -7V to +12V Common-Mode Input ange ±6m Foldack Current Limit Industry-Standard Pinout pplications S-422/S-485 Communications Truck and Trailer pplications Industrial Networks Telecommunications Systems utomotive pplications HVC Controls PT TEMP NGE PIN-PCKGE MX13442ES+ -4 C to +125 C 8 SO MX13443ES+ -4 C to +125 C 8 SO S/V+T -4 C to +125 C 8 SO +enotes lead(pb)-free/ohs-compliant package. /V denotes an automotive qualified part. T = Tape and reel. ECEIVE/IVE ENLE TNSCEIVES ON US HOT SWP MX13442E S ±8 Yes Yes 128 Yes MX13443E S ±6 Yes Yes 128 Yes J ±8 Yes Yes 128 Yes (only E) Pin Configurations and Typical Operating Circuits Ordering Information TOP VIEW 1 E 2 E 3 I VCC 1 7 E GN E I VCC 7 T 6 5 GN MX13442E MX13443E T E I Pin Configurations and Typical Operating Circuits continued at end of data sheet. SO SO E ; ev 3; 3/11

2 MX13442E/MX13443E/ bsolute Maximum atings (Voltages referenced to GN.)...+7V E, E, E, I, TX V to ( +.3V), (Note 1) (MX13442E/)...±8V, (Note 1) (MX13443E)...±6V V to ( +.3V) Short-Circuit uration (,, )...Continuous Continuous Power issipation (T = +7 C) SO (derate 7.6mW/ C above +7 C)...66mW Operating Temperature ange C to +125 C Storage Temperature ange C to +15 C Junction Temperature C Lead Temperature (soldering, 1s)...+3 C Soldering Temperature (reflow) C Note 1: uring normal operation, a termination resistor must be connected between and in order to guarantee overvoltage protection up to the absolute maximum rating of this device. When not in operation, these devices can withstand fault voltages up to the maximum rating without a termination resistor and will not be damaged. Stresses beyond those listed under bsolute Maximum atings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Package Thermal Characteristics (Note 2) SO Junction-to-mbient Thermal esistance (θ J ) C/W Junction-to-Case Thermal esistance (θ JC )...38 C/W Note 1: Package thermal resistances were obtained using the method described in JEEC specification JES51-7, using a four-layer board. For detailed information on package thermal considerations, refer to C Electrical Characteristics ( = +4.75V to +5.25V, T = T MIN to T MX, unless otherwise noted. Typical values are at = +5V and T = +25 C.) IVE PMETE SYMOL CONITIONS MIN TYP MX UNITS ifferential river Output V O Figure 1, L = 1Ω 2 V Figure 1, L = 54Ω 1.5 Change in Magnitude of ifferential Output Voltage river Common-Mode Output Voltage Change in Magnitude of Common-Mode Voltage IVE LOGIC ΔV O Figure 1, L = 1Ω or 54Ω (Note 3).2 V V OC Figure 1, L = 1Ω or 54Ω /2 3 V V OC Figure 1, L = 1Ω or 54Ω (Note 3) (MX13442E/MX13443E).2 V river-input High Voltage V IH 2 V river-input Low Voltage V IL.8 V river-input Current I IN ±2 µ river Short-Circuit Output Current (Note 4) river Short-Circuit Foldback Output Current river-limit Short-Circuit Foldback Output Current V V OUT +12V +35 I OS -7V V OUT -35 ( - 1V) V OUT +12V (Note 4) +25 I OSF -7V V OUT +1V (Note 4) -25 V OUT +2V, L = 1Ω +6 I OSL V OUT -15V, L = 1Ω -6 m m m Maxim Integrated 2

3 MX13442E/MX13443E/ C Electrical Characteristics (continued) ( = +4.75V to +5.25V, T = T MIN to T MX, unless otherwise noted. Typical values are at = +5V and T = +25 C.) ECEIVE PMETE SYMOL CONITIONS MIN TYP MX UNITS Input Current I, receive, mode eceiver-ifferential Threshold Voltage = GN, V, = 12V 25 V, = -7V -15 V, = ±8V ±6 m V TH -7V V CM +12V -2-5 mv eceiver-input Hysteresis ΔV TH 25 mv ECEIVE LOGIC Output-High Voltage V OH Figure 2, I OH = -1.6m -.6 V Output-Low Voltage V OL Figure 2, I OL = 1m.4 V Three-State Output Current at eceiver I OZ V V, ±1 µ eceiver Input esistance IN -7V V CM +12V 48 kω eceiver Output Short-Circuit Current CONTL I OS V V ±95 m Control-Input High Voltage V CIH E, E, E 2 V Input-Current Latch uring First ising Edge SUPPLY CUENT I IN E, E 9 µ µ Normal Operation I CC I = No load, or GN E =, E = GN (MX13442E) (E = E = GN) () (E =, E = GN) (MX13443E) 3 1 m E = GN, E = (MX13442E/MX13443E) 2 Supply Current in Shutdown Mode I SHN E = GN, E =, T = +25 C (MX13442E/MX13443E) E = E = () 1 1 µ E = E =, T = +25 C () 1 Supply Current with Output Shorted to ±6V ISHT E = GN, E = GN, no load output in three-state (MX13443E) ±15 m Maxim Integrated 3

4 MX13442E/MX13443E/ Protection Specifications ( = +4.75V to +5.25V, T = T MIN to T MX, unless otherwise noted. Typical values are at = +5V and T = +25 C.) PMETE SYMOL CONITIONS MIN TYP MX UNITS Overvoltage Protection, ; SOUCE = Ω, L = 54Ω MX13442E/ ±8 MX13443E ±6 ES Protection, Human ody Model ±15 kv V Switching Characteristics (MX13442E/) ( = +4.75V to +5.25V, T = T MIN to T MX, unless otherwise noted. Typical values are at = +5V and T = +25 C.) PMETE SYMOL CONITIONS MIN TYP MX UNITS river Propagation elay river ifferential Propagation elay river ifferential Output Transition Time t PLH, t PLH Figure 3, L = 54Ω, C L = 5pF (MX13442E) IFF = 6Ω, C IFF = 1pF () 2 ns t PLH, t PHL L = 54Ω, C L = 5pF, Figure 4 2 ns t LH,t HL L = 54Ω, C L = 5pF, Figure ns river Output Skew t SKEW, t SKEW L = 54Ω, C L = 5pF, t SKEW = t PLH - t PHL, t SKEW = t PLH - t PHL 35 ns ifferential river Output Skew t SKEW L = 54Ω, C L = 5pF, t SKEW = t PLH - t PHL 2 ns Maximum ata ate f MX 25 kbps river Enable Time to Output High t PZH L = 5Ω, C L = 5pF, Figure 5 2 ns river isable Time from Output High t PHZ L = 5Ω, C L = 5pF, Figure 5 2 ns river Enable Time from Shutdown to Output High t PHS L = 5Ω, C L = 5pF, Figure µs river Enable Time to Output Low t PZL L = 5Ω, C L = 5pF, Figure 6 2 ns river isable Time from Output Low t PLZ L = 5Ω, C L = 5pF, Figure 6 2 ns river Enable Time from Shutdown to Output Low t PLS L = 5Ω, C L = 5pF, Figure µs river Time to Shutdown t SHN L = 5Ω, C L = 5pF 8 ns eceiver Propagation elay t PLH, t PHL C L = 2pF, V I = 2V, V CM = V, Figure 7 2 ns eceiver Output Skew t SKEW C L = 2pF, t SKEW = t PLH - t PHL 2 ns eceiver Enable Time to Output High t PZH L = 1kΩ, C L = 2pF, Figure 8 2 ns eceiver isable Time from Output High t PHZ L = 1kΩ, C L = 2pF, Figure 8 2 ns eceiver Wake Time from Shutdown t PWKE L = 1kΩ, C L = 2pF, Figure µs eceiver Enable Time to Output Low t PZL L = 1kΩ, C L = 2pF, Figure 8 2 ns eceiver isable Time from Output Low t PLZ L = 1kΩ, C L = 2pF, Figure 8 2 ns eceiver Time to Shutdown t SHN L = 5Ω, C L = 5pF 8 ns Maxim Integrated 4

5 MX13442E/MX13443E/ Switching Characteristics (MX13443E) ( = +4.75V to +5.25V, T = T MIN to T MX, unless otherwise noted. Typical values are at = +5V and T = +25 C.) river Propagation elay PMETE SYMOL CONITIONS MIN TYP MX UNITS river ifferential Propagation elay river ifferential Output Transition Time river Output Skew t PLH, t PLH L = 27Ω, C L = 5pF, Figure 3 6 ns t PLH, t PHL L = 54Ω, C L = 5pF, Figure 4 6 ns t LH,t HL L = 54Ω, CL = 5pF, Figure 4 25 ns t SKEW, t SKEW L = 54Ω, C L = 5pF, t SKEW = t PLH - t PHL, t SKEW = t PLH - t PHL ifferential river Output Skew t SKEW L = 54Ω, C L = 5pF, t SKEW = t PLH - t PHL 1 ns 1 ns Maximum ata ate f MX 1 Mbps river Enable Time to Output High t PZH L = 5Ω, C L = 5pF, Figure 5 12 ns river isable Time from Output High t PHZ L = 5Ω, C L = 5pF, Figure 5 12 ns river Enable Time from Shutdown to Output High t PHS L = 5Ω, C L = 5pF, Figure µs river Enable Time to Output Low t PZL L = 5Ω, C L = 5pF, Figure 6 12 ns river isable Time from Output Low t PLZ L = 5Ω, C L = 5pF, Figure 6 12 ns river Enable Time from Shutdown to Output Low t PLS L = 5Ω, C L = 5pF, Figure Fs river Time to Shutdown t SHN L = 5Ω, C L = 5pF, Figure 6 8 ns eceiver Propagation elay t PLH, t PHL C L = 2pF, V I = 2V, V CM = V, Figure 7 85 ns eceiver Output Skew t SKEW C L = 2pF, t SKEW = t PLH - t PHL 15 ns eceiver Enable Time to Output High t PZH L = 1kΩ, C L = 2pF, Figure 8 4 ns eceiver isable Time from Output High t PHZ L = 1kΩ, C L = 2pF, Figure 8 4 ns eceiver Wake Time from Shutdown t PWKE L = 1kΩ, C L = 2pF, Figure µs eceiver Enable Wake Time from Shutdown t PSH L = 1kΩ, C L = 2pF, Figure 8 4 ns eceiver isable Time from Output Low t PLZ L = 1kΩ, C L = 2pF, Figure 8 4 ns eceiver Time to Shutdown t SHN L = 5Ω, C L = 5pF 8 ns Note 3: ΔV O and ΔV OC are the changes in V O and V OC, respectively, when the I input changes state. Note 4: The short-circuit output current applies to peak current just before foldback current limiting. The short-circuit foldback output current applies during current limiting to allow a recovery from bus contention. Maxim Integrated 5

6 MX13442E/MX13443E/ Typical Operating Characteristics ( = +5V, T = +25 C, unless otherwise noted.) SUPPLY CUENT (m) NO-LO SUPPLY CUENT vs. TEMPETUE IVE N ECEIVE ENLE IVE ISLE, ECEIVE ENLE 1 MX13443E TEMPETUE ( C) MX E toc1 SUPPLY CUENT (m) NO-LO SUPPLY CUENT vs. TEMPETUE IVE N ECEIVE ENLE IVE ISLE, ECEIVE ENLE MX13442E/ TEMPETUE ( C) MX E toc2 SHUTOWN SUPPLY CUENT (µ) SHUTOWN SUPPLY CUENT vs. TEMPETUE MX13442E I = E = GN E = TEMPETUE ( C) MX E toc3 ECEIVE OUTPUT CUENT vs. OUTPUT-LOW VOLTGE ECEIVE OUTPUT CUENT vs. OUTPUT-HIGH VOLTGE ECEIVE OUTPUT CUENT (m) MX E toc4 ECEIVE OUTPUT CUENT (m) MX E toc5 ECEIVE OUTPUT VOLTGE (V) OUTPUT LOW VOLTGE (V) ECEIVE OUTPUT VOLTGE vs. TEMPETUE V OH, I OUT = 1m V OL, I OUT = -1m TEMPETUE ( C) MX E toc6 IVE OUTPUT CUENT (m) OUTPUT LOW VOLTGE (V) IVE OUTPUT CUENT vs. IFFEENTIL OUTPUT VOLTGE L = 54Ω MX13442E I = GN, E =, VOLTGE PPLIE TO OUTPUT IFFEENTIL OUTPUT VOLTGE (V) MX E toc7 Maxim Integrated 6

7 MX13442E/MX13443E/ Typical Operating Characteristics (continued) ( = +5V, T = +25 C, unless otherwise noted.) IVE OUTPUT CUENT (m) IFFEENTIL OUTPUT VOLTGE (V) IVE OUTPUT CUENT vs. IFFEENTIL OUTPUT VOLTGE L = 54Ω MX13442E I = GN, E =, VOLTGE PPLIE TO OUTPUT IFFEENTIL OUTPUT VOLTGE (V) IFFEENTIL OUTPUT VOLTGE vs. TEMPETUE L = 1Ω L = 54Ω TEMPETUE ( C) MX13443E, CUENT () MX E toc8 MX E toc1 IFFEENTIL OUTPUT VOLTGE (V), CUENT () , CUENT vs., VOLTGE (TO GUN) IVE ISLE, ECEIVE ENLE NO LO L = 54Ω , VOLTGE (V) IFFEENTIL OUTPUT VOLTGE vs. TEMPETUE L = 1Ω L = 54Ω TEMPETUE ( C), CUENT vs., VOLTGE (TO GUN) IVE ISLE, ECEIVE ENLE MX13442E 4 NO LO -4-8 L = 54Ω MX13442E , VOLTGE (V) MX13443E MX E toc12 MX E toc9 MX E toc11 Maxim Integrated 7

8 MX13442E/MX13443E/ Test Circuits and Waveforms L 2 I V O L 2 V OC Figure 1. river V O and V OC V I V OL I OL (+) V OH IOH (-) Figure 2. eceiver V OH and V OL 3V V OM I 1.5V 1.5V GENETO (NOTE 5) I 5Ω S1 L 2 C L = 5pF (NOTE 6) OUT t PLH V OM V OM t PHL V V OH V OL V OH + V OL V OM = 2 1.5V t PHL V OM V OM t PLH V OH V OL Figure 3. river Propagation Times 3V GENETO (NOTE 5) I 5Ω C L C L L OUT C L = 5pF (NOTE 6) I ( ) 1.5V t PLH 5% 1% t LH 9% 1.5V 9% t PHL 5% 1% t HL V 2.V -2.V Figure 4. river ifferential Output elay and Transition Times Maxim Integrated 8

9 MX13442E/MX13443E/ Test Circuits and Waveforms (continued) O 3V GENETO (NOTE 5) I 5Ω E S1 C L = 5pF (NOTE 6) V OH + V OL V OM = 2 1.5V, L = 5Ω E 1.5V t PZH t PHS, V OM 1.5V t PHZ.25V 3V V V OH V Figure 5. river Enable and isable Times 3V L = 5Ω S1 I O 3V, GENETO (NOTE 5) E 5Ω C L = 5pF (NOTE 6) E, 1.5V t PZL t PLS VOM 1.5V t PLZ.25V V V OL Figure 6. river Enable and isable Times 2.V GENETO (NOTE 5) 5W V I O C L = 2pF (NOTE 6) ( ) 1.V t PLH 1.V t PHL V 1.V V V OM V OM V Figure 7. eceiver Propagation elay Maxim Integrated 9

10 MX13442E/MX13443E/ +1.5V -1.5V S3 V I O 1kΩ S1 S2 GENETO (NOTE 5) 5Ω C L = 2pF (NOTE 6) E 1.5V t PZH t PSH t PWKE 1.5V 3V V V OH S1 OPEN S2 CLOSE V S3 = 1.5V E 1.5V t PZL t PSL 1.5V 3V V S1 CLOSE S2 OPEN V S3 = -1.5V V V OL E 1.5V 3V V S1 OPEN S2 CLOSE V S3 = 1.5V E 1.5V 3V V S1 CLOSE S2 OPEN V S3 = -1.5V t PHZ.5V V OH t PLZ.5V V V OL Figure 8. eceiver Enable and isable Times Note 5: The input pulse is supplied by a generator with the following characteristics: f = 5MHz, 5% duty cycle; t r 6ns; Z = 5Ω. Note 6: C L includes probe and stray capacitance. Maxim Integrated 1

11 MX13442E/MX13443E/ Pin escription MX13442E MX13443E PIN NME 1 1 FUNCTION eceiver Output. If the receiver is enabled and (V - V ) -5mV, = high; if (V - V ) -2mV, = low. 2 2 E eceiver Output Enable. Pull E low to enable. 3 E river Output Enable. Force E high to enable driver. Pull E low to three-state the driver output. rive E high and pull E low to enter low-power shutdown mode. 4 I river Input. logic-low on I forces the noninverting output low and the inverting output high. logic-high on I forces the noninverting output high and the inverting output low. 5 5 GN Ground 6 6 Noninverting eceiver Input/river Output 7 7 Inverting eceiver Input/river Output 8 8 bypass to GN with a.1µf ceramic capacitor. For full ES Positive Supply, = +4.75V to +5.25V. For normal operation, protection, bypass to GN with 1µF ceramic capacitor. 3 E 4 TX river Output Enable. Pull E low to enable the outputs. Force E high to three-state the outputs. rive E and E high to enter lowpower shutdown mode. J178 Input. logic-low on TX forces outputs and to the dominant state. logic-high on TX forces outputs and to the recessive state. Maxim Integrated 11

12 MX13442E/MX13443E/ Function Tables Table 1. MX13442E/MX13443E (S-485/S-422) X = on t care. INPUTS TNSMITTING OUTPUTS E E I X High-Z High-Z X Shutdown Shutdown Table 3. MX13442E/MX13443E (S-485/S-422) X = on t care. INPUTS ECEIVING OUTPUTS E E (V - V ) X -.5V 1 X -.2V X Open/shorted X High-Z 1 X Shutdown Table 2. (J178) pplication TNSMITTING INPUTS OUTPUTS CONITIONS TX E 1 High-Z High-Z 1 1 High-Z High-Z 1 ominant state 1 High-Z High-Z ecessive state Table 4. (S-485/S-422) ECEIVING INPUTS OUTPUTS E E (V - V ) X -.5V 1 X -.2V X Open/shorted 1 1 X High-Z 1 1 X Shutdown X = on t care. Maxim Integrated 12

13 MX13442E/MX13443E/ etailed escription The MX13442E/MX13443E/ fault-protected transceivers for S-485/S-422 and J178 communication contain one driver and one receiver. These devices feature fail-safe circuitry, which guarantees a logic-high receiver output when the receiver inputs are open or shorted, or when they are connected to a terminated transmission line with all drivers disabled (see the True Fail-Safe section). ll devices have a hot-swap input structure that prevents disturbances on the differential signal lines when a circuit board is plugged into a hot backplane (see the Hot-Swap Capability section). The MX13442E/ feature a reduced slew-rate driver that minimizes EMI and reduces reflections caused by improperly terminated cables, allowing error-free data transmission up to 25kbps (see the educed EMI and eflections section). The MX13443E driver is not slewrate limited, allowing transmit speeds up to 1Mbps. river The driver accepts a single-ended, logic-level input (I) and transfers it to a differential, S-485/S-422 level output ( and ). easserting the driver enable places the driver outputs ( and ) into a high-impedance state. eceiver The receiver accepts a differential, S-485/S-422 level input ( and ), and transfers it to a single-ended logiclevel output (). easserting the receiver enable places the receiver inputs ( and ) into a high-impedance state (see Table 1 Table 4). Low-Power Shutdown The MX13442E/MX13443E/ offer a lowpower shutdown mode. Force E low and E high to shut down the MX13442E/MX13443E. Force E and E high to shut down the. time delay of 5ns prevents the device from accidentally entering shutdown due to logic skews when switching between transmit and receive modes. Holding E low and E high for at least 8ns guarantees that the MX13442E/MX13443E enter shutdown. In shutdown, the devices consume a maximum 2μ supply current. ±8V Fault Protection The driver outputs/receiver inputs of S-485 devices in industrial network applications often experience voltage faults resulting from shorts to the power grid that exceed the -7V to +12V range specified in the EI/TI-485 standard. In these applications, ordinary S-485 devices (typical absolute maximum -8V to +12.5V) require costly external protection devices. To reduce system complexity and eliminate this need for external protection, the driver outputs/receiver inputs of the MX13442E/ withstand voltage faults up to ±8V (±6V for the MX13443E) with respect to ground without damage. Protection is guaranteed regardless whether the device is active, shut down, or without power. True Fail-Safe The MX13442E/MX13443E/ use a -5mV to -2mV differential input threshold to ensure true fail-safe receiver inputs. This threshold guarantees the receiver outputs a logic-high for shorted, open, or idle data lines. The -5mV to -2mV threshold complies with the ±2mV threshold EI/TI-485 standard. ±15kV ES Protection s with all Maxim devices, ES-protection structures are incorporated on all pins to protect against ES encountered during handling and assembly. The MX13442E/ MX13443E/ receiver inputs/driver outputs (, ) have extra protection against static electricity found in normal operation. Maxim s engineers have developed state-of-the-art structures to protect these pins against ±15kV ES without damage. fter an ES event, the MX13442E/MX13443E/ continue working without latchup. ES protection can be tested in several ways. The receiver inputs are characterized for protection to ±15kV using the Human ody Model. ES Test Conditions ES performance depends on a number of conditions. Contact Maxim for a reliability report that documents test setup, methodology, and results. Human ody Model Figure 9a shows the Human ody Model, and Figure 9b shows the current waveform it generates when discharged into a low impedance. This model consists of a 1pF capacitor charged to the ES voltage of interest, which is then discharged into the device through a 1.5kΩ resistor. river Output Protection Two mechanisms prevent excessive output current and power dissipation caused by faults or bus contention. The first, a foldback current limit on the driver output stage, provides immediate protection against short circuits over the whole common-mode voltage range. The second, a thermal shutdown circuit, forces the driver outputs into a high-impedance state if the die temperature exceeds +16 C. Normal operation resumes when the die temperature cools to +14 C, resulting in a pulsed output during continuous short-circuit conditions. Maxim Integrated 13

14 MX13442E/MX13443E/ Hot-Swap Capability Hot-Swap Inputs Inserting circuit boards into a hot, or powered, backplane may cause voltage transients on E, E, and receiver inputs and that can lead to data errors. For example, upon initial circuit board insertion, the processor undergoes a power-up sequence. uring this period, the highimpedance state of the output drivers makes them unable to drive the MX13442E/MX13443E/ enable inputs to a defined logic level. Meanwhile, leakage currents of up to 1μ from the high-impedance output, or capacitively coupled noise from or GN, could cause an input to drift to an incorrect logic state. To prevent such a condition from occurring, the MX13442E/MX13443E/ feature hot-swap input circuitry on E, and E to guard against unwanted driver activation during hot-swap situations. The has hot-swap input circuitry only on E. When rises, an internal pulldown (or pullup for E) circuit holds E low for at least 1μs, and until the current into E exceeds 2μ. fter the initial power-up sequence, the pulldown circuit becomes transparent, resetting the hot-swap tolerable input. Hot-Swap Input Circuitry t the driver-enable input (E), there are two NMOS devices, M1 and M2 (Figure 1). When ramps from zero, an internal 15μs timer turns on M2 and sets the S latch, which also turns on M1. Transistors M2, a 2m current sink, and M1, a 1μ current sink, pull E to GN through a 5.6kΩ resistor. M2 pulls E to the disabled state against an external parasitic capacitance up to 1pF that may drive E high. fter 15μs, the timer deactivates M2 while M1 remains on, holding E low against three-state leakage currents that may drive E high. M1 remains on until an external current source overcomes the required input current. t this time, the S latch resets M1 and turns off. When M1 turns off, E reverts to a standard, high-impedance CMOS input. Whenever drops below 1V, the input is reset. complementary circuit for E uses two PMOS devices to pull E to. C 1MΩ 1.5kΩ CHGE-CUENT- LIMIT ESISTO ISCHGE ESISTNCE HIGH- VOLTGE C SOUCE Cs 1pF STOGE CPCITO EVICE UNE TEST TIME 15µs TIME Figure 9a. Human ody ES Test Model I P 1% 9% Ir PEK-TO-PEK INGING (NOT WN TO SCLE) E (HOT SWP) 5.6kΩ MPEES 2m 1µ 36.8% 1% t L TIME t L CUENT WVEFOM M1 M2 Figure 9b. Human ody Model Current Waveform Figure 1. Simplified Structure of the river Enable Pin (E) Maxim Integrated 14

15 MX13442E/MX13443E/ pplications Information 128 Transceivers on the us The MX13442E/MX13443E/ transceivers 1/4-unit-load receiver input impedance (48kΩ) allows up to 128 transceivers connected in parallel on one communication line. Connect any combination of these devices, and/or other S-485 devices, for a maximum of 32-unit loads to the line. educed EMI and eflections The MX13442E/ are slew-rate limited, minimizing EMI and reducing reflections caused by improperly terminated cables. Figure 11 shows the driver output waveform and its Fourier analysis of a 125kHz signal transmitted by a MX13443E. High-frequency harmonic components with large amplitudes are evident. Figure 12 shows the same signal displayed for the MX13442E transmitting under the same conditions. Figure 12 s high-frequency harmonic components are much lower in amplitude, compared with Figure 11 s, and the potential for EMI is significantly reduced. In general, a transmitter s rise time relates directly to the length of an unterminated stub that can be driven with only minor waveform reflections. The following equation expresses this relationship conservatively: length = t ISE /(1 x 1.5ns/ft) where t ISE is the transmitter s rise time. For example, the MX13442E s rise time is typically 8ns, which results in excellent waveforms with a stub length up to 53ft. system can work well with longer unterminated stubs, even with severe reflections, if the waveform settles out before the UT samples them. S-485 pplications The MX13442E/MX13443E/ transceivers provide bidirectional data communications on multipoint bus transmission lines. Figure 13 shows a typical network application circuit. The S-485 standard covers line lengths up to 4ft. To minimize reflections and reduce data errors, terminate the signal line at both ends in its characteristic impedance, and keep stub lengths off the main line as short as possible. 2d/div 2d/div 2V/div 2V/div 5kHz/div 5.MHz 5kHz/div 5.MHz Figure 11. river Output Waveform and FFT Plot of the MX13443E Transmitting a 125kHz Signal Figure 12. river Output Waveform and FFT Plot of the MX13442E Transmitting a 125kHz Signal Maxim Integrated 15

16 MX13442E/MX13443E/ J178 pplications The is designed for J178 applications. To configure the, connect E and E to GN. Connect the signal to be transmitted to TX. Terminate the bus with the load circuit as shown in Figure 14. The drivers used by SE J178 are used in a dominant-mode application. E is active low; a high input on E places the outputs in high impedance. When the driver is disabled (TX high or E high), the bus is pulled high by external bias resistors 1 and 2. Therefore, a logic-level high is encoded as recessive. When all transceivers are idle in this configuration, all receivers output logic-high because of the pullup resistor on and pulldown resistor on. 1 and 2 provide the bias for the recessive state. C1 and C2 combine to form a lowpass filter, effective for reducing FM interference. 2, C1, 4, and C2 combine to form a 1.6MHz lowpass filter, effective for reducing M interference. ecause the bus is unterminated, at high frequencies, 3 and 4 perform a pseudotermination. This makes the implementation more flexible, as no specific termination nodes are required at the ends of the bus. 12Ω 12Ω I E E I E E MX13442E MX13443E I E E I E E Figure 13. MX13442E/MX13443E Typical S-485 Network Maxim Integrated 16

17 MX13442E/MX13443E/ E Chip Information PCESS: icmos T X X TX 1 4.7kΩ 3 47Ω C1 2.2nF C2 2.2nF 4 47Ω 2 4.7kΩ J178 US Package Information For the latest package outline information and land patterns (footprints), go to Note that a +, #, or - in the package code indicates ohs status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of ohs status. PCKGE TYPE PCKGE COE OUTLINE NO. LN PTTEN NO. 8 SO S E Figure 14. J178 pplication Circuit (See Tables 2 and 4) Pin Configurations and Typical Operating Circuits (continued) E E TX V 1 CC GN E E TX T GN T E TX SO SO E Maxim Integrated 17

18 MX13442E/MX13443E/ evision History EVISION NUME EVISION TE ESCIPTION PGES CHNGE 1/5 Initial release 1 3/6 2 11/1 3 3/11 Corrected the part numbers in the conditions for ΔV OC in the C Electrical Characteristics table; corrected the, current units from m to F for the, Current vs., Voltage (to Ground) graphs in the Typical Operating Characteristics section dded lead(pb)-free parts to the Ordering Information table; added the soldering temperature to the bsolute Maximum atings section; updated Table 2 outputs dded an automotive qualified part to the Ordering Information; added the Package Thermal Characteristics section 2, 7 1, 2, 12 1, 2 For pricing, delivery, and ordering information, please contact Maxim irect at , or visit Maxim Integrated s website at Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. 211 Maxim Integrated Products, Inc. 18