5 th Generation Non-Orthogonal Waveforms for Asynchronous Signaling. Final Review. Brussels, Work Package 5
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1 5 th Generation Non-Orthogonal Waveforms for Asynchronous Signaling Final Review Brussels, Work Package 5
2 Outline Work Package Overview Motivation Demonstrators FBMC UFMC GFDM System Simulator Conclusions Outlook
3 Work Package Overview and Motivation
4 Workpackage Overview WP5: Proof-of-concept Validation of the 5GNOW concept Practical implementation with focus on basic scenarios Proving the benefits and showing challenges of non-orthogonal 5G system design Interfacing WP2: Scenarios and KPI WP3: PHY transceiver algorithms WP4: MAC algorithms VTC13, ICC13, FUNEMS13, VIP13, EUCNC14, NIWEEK14, GLOBECOM14, WMC15, ICC15, ISWCS
5 D5.1/D5.2 Demonstrators Concept and Implementation. Provides a comparison of SOTA OFDM and the proposed non-orthogonal PHY design with regard to the KPIs Evaluation and quantification, to which extent the expected advantages of non-orthogonal modulation (e.g. robustness) could be shown under realistic side conditions. Investigation of critical implementation components for asynchronous 5G systems. Lessons learned contributes to better plan and execute the future 5G hardware and algorithm design
6 Motivating Scenarios Asynchronous access with low latency Fragmented spectrum access Challenges: Round trip delays within 100 μs Asynchronous reception Random access Reduced signaling overhead Challenges: Control of out-of-band emissions Flexible waveform and resource allocation Tolerance to offsets
7 Prototyping Roadmap (1) WP 2 System Concept & Specification WP 3 Algorithm Specification WP 5 Step 1 (1) Tx offline (2) Rx offline WP 5 Step 2 (1) Tx online (2) Rx online WP 5 Step 3 (1) Primary/Secondary (2) Multiuser Online = running on FPGA Offline = running non-real-time in Matlab/LabVIEW
8 Prototyping Roadmap (2)
9 Filter Bank Multi-Carrier Demonstrator
10 PHY Layer Prototyping TiWi-R2 WiFi module DVI Digital Visual Interface Camera Connector Cameras Connectors Oscillators Clocks generator AD FPGA Kintex 7 + ARM processor - Specific analog daughter board designed for the project clocks Quartz: 32,768 khz 26 MHz 2 Gbits LPDDR SDRAM 4 Gbits Nand Flash Texas DM3730 Xilinx XC7K325T Rx I/Q Tx I/Q 2 Dual ADC AD9643 Quad DAC AD9148 Daughter Board SMA connectors External Flash Memory µsdcard PHY MAC LAN9220 USB Link OTG JTAG ARM Buffer RS232 JTAG Xilinx Flash PROM Xilinx XCF128X - 1 FPGA Xilinx XC7K325T-1FFG676C: Logic cells / 840 DSP (25x18 multiplier) / 445 Blocks RAM 36Kb - 1 ARM microcontroller DM3730CBP100 (cortex A-8) - 2 dual ADC AD bits / 250 MHz - 1 quad DAC AD bits / 1 GHz Ethernet 10/100 Mbits/s High-speed USB 480 Mbds PC JTAG ARM: XDS560 Emulator JTAG Xilinx: USB Xilinx Probe
11 Demonstration Platform (1) Clk ext Main Digital Board Leds JTAG Xilinx Reset RJ9 RS232 Clk ext 43 mm CEA-Leti s main board Daughter Board with SMA connectors QSE QSE Case Leti : 160 * 78 * 43 mm Interfaces between main board and daughter board Connections between Baseband board and NI RF modules
12 Demonstration Platform (2) NI HW UP/DOWN converter NI PXIe-1062Q UP/DOWN converter FPGA board Digital I/O board LabView and Drivers
13 Demonstration Platform (3) chassis Component interconnection: PC analog frontend Multi-chassis synchronization: FPGA board
14 Transceiver Concept (1) Transmitter Processing
15 Transceiver Concept (2) Receiver Processing
16 Transmitter Transmitter Structure Detail Complexity of the FBMC transmitter: ~1.5 compared to OFDM Framing: Burst strategy (Like RACH) LTE pilot pattern (1 scrambled BPSK pilots every 4 carriers) + Synchronization pilot pattern for time synchronization (in FD) Time domain signal
17 Performance: complexity (1/2) FS-FBMC RX implementation relative complexity 2 Users, up to 10MHz Bandwidth
18 Performance: complexity (2/2) FS-FBMC vs OFDM FPGA complexity Function Resource utilization Xilinx Kintex-7 (XC7K325T) Slice Regs LUTs DSP48E1 RAM BLKs OFDM FFT Inner Receiver Fec Decoder Control OFDM Total FS-FBMC FFT Inner Receiver Fec Decoder Control FS-FBMC Total FS-FBMC / OFDM resource usage ratio memory cost in submicron technology is limited
19 Performance: coexistence Coexistence OFDM/FBMC enodeb receiver evaluated in presence of asynchronous adjacent user (FBMC and OFDM) Quality of Service can be guaranteed with FBMC, but not with OFDM OFDM generates more interference than FBMC
20 Remarks FS-FBMC properties Time synchronization may be performed independently of the position of the FFT in the frequency domain. Channel equalization may be limited to a one-tap complex-multiply operation while still sustaining significant channel impulse response delay spread 30% of complexity overhead compared with classical OFDM receiver architecture IMPLEMENTATION OF A MULTIUSER RECEIVER BASED ON THE FS-FBMC ARCHITECTURE FS-FBMC receiver could fit in a Kintex-7 XC7K325T FPGA Receiver complexity smoothly scales with the number of users, as only a limited number of building blocks need to be duplicated FS-FBMC is a valid approach for 5G scenarios, e.g. fragmented spectrum and asynchronous multiple access communications
21 UF-OFDM OFFLINE Demo UFMC Demonstrator
22 UFMC OFFLINE Demo Globecom 2014 Open loop set up for new waveform trials with synchronous and asynchronous traffic with multiple users Emulator End User Devices Air- Interface Fading and Noise Emulator Basestation Emulator Tx Rx Tx Rx uplink
23 UFMC Real-Time Demo MWC 2015 Bell Labs 5G UF-OFDM waveform supports reduced interference for mixed traffic and a significant side lobe level reduction which improves the spectral efficiency. HD Video Different time, frequency and power settings Video MTC Video Monitor Frequency IoT nodes Radio Channel Experimental NodeB Sensor Performance Visualization
24 Remarks UFMC properties Offline and Online demo prototyping Synchronous and asynchronous traffic with multiple users Supports reduced interference for mixed traffic Significant side lobe level reduction which improves the spectral efficiency
25 Generalized Frequency Division Multiplexing Demonstrator
26 Transceiver Concept Transmitter Receiver
27 Transmitter Implementation GFDM transmitter FPGA pipelined implementation
28 Receiver Implementation Highlight: Concept for Successive Interference Cancellation
29 Receiver Implementation Highlight: Concept for ZF/MMSE filter
30 Software defined waveform LabVIEW FPGA Design (fractional re-sampler used at TUD demo) to transmit test vectors
31 2x2 offline Generator Standard LabVIEW menu Main information panel Signal panel Figure Error! No text of specified style in document.-1: TX GUI Control panel
32 Real Time Implementation GFDM transmitter FPGA pipelined implementation LabVIEW Block Diagram - Timed Loop IFFT of a GFDM Frame LabVIEW front pannel with FPGA signal snapshots GFDM Transmitter compilation results
33 Real Time Implementation The LabVIEW code has been made available at:
34 Real Time Implementation
35 Real-time demonstration: Coexistence between a LTE legacy link and an asynchronous GFDM user 30 db 30 db 30 db LTE legacy link Realized with NI s LTE Application Framework GFDM TX prototype Based on NI s LTE Application Framework 5G demo scenario Fragmented spectrum use case with Synchronous LTE legacy link Asynchronous 5G user using non-orthogonal GFDM waveform Legacy LTE signal NI USRP-RIO LTE TX LTE RX NI USRP-RIO GFD M TX RX Double Spectrum Asynchronous 5G user using GFDM f RF0 RF1 RF0 RF1 Visualization/KPIs BLER of the legacy LTE system RX QAM constellations TX + RX power spectra
36 Real-time demonstration: Coexistence between a LTE legacy link and an asynchronous GFDM user
37 Remarks GFDM implementation Time synchronization may be performed using classic OFDM approaches. Also, channel equalization can be performed in frequency domain Complexity overhead compared with classical OFDM receiver architecture is higher, but still feasible. Investigations is still ongoing, which can contribute to optimize the implementation GFDM base transceiver is available online, supporting other initiatives of 5G PHY research Experiment testing coexistence between a LTE legacy link and an asynchronous GFDM user shows a significant reduction in the distortion of the legacy system
38 System Simulator
39 Simulator Concept
40 OFDM and FBMC
41 Conclusions Impact on ongoing 5G discussions through numerous demonstrations at prestigious conferences throughout 2013 to present! Demonstrator activities FBMC transceiver UFMC transceiver GFDM transceiver System simulator Key scenarios identified (improved spectral efficiency) FBMC access of fragmented spectrum and multiuser UFMC - synchronous and asynchronous traffic with multiple users GFDM real time SISO (low latency)/ coexistence with legacy systems System simulator comparison against LTE-based OFDM
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