INTERLEAVED, MULTI-SWITCH, MULTI-PHASE BOOST CONVERTER FOR BATTERY DISCHARGE REGULATORS

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1 E3S Web o Conerences 16, 141 (17) DOI: 1.151/ e3scon/ ESPC 16 INTELEAVED, MULTISWITCH, MULTIPHASE BOOST CONVETE FO BATTEY DISCHAGE EGULATOS Fernando SobrinoManzanares, Ausias Garrigós Industrial Electronics Group, UMH, Avda. De la Universidad s/n (Spain), augarsir@umh.es ABSTACT Nonisolated stepup voltage converters are commonly required as Battery Discharge egulators (BD s). The Weinberg and boost derived topologies are traditionally employed in modules up to one or two kilowatts. The Interleaved Boost Converter (IBC) is a distributed power processing approach that provides some advantages: reduced power processing () per phase, distributed losses (power semiconductors and magnetics), input and output ripple cancellation, improved dynamic response and better modularity, among others. The IBC converter as BD has been previously treated and advantages and drawbacks discussed. In this paper a new approach is proposed, a multiswitch, multiphase interleaved boost converter (named Multi Interleaved Boost Converter, MIBC) that provides and switching requency decoupling, which in turn aects in dierent aspects, such as, magnetics, input and output ripples or part count. This paper presents and describes the MIBC, the potential beneits compared to the IBC and its application as BD. 1. INTODUCTION This paper is meant to be a general description o a PWM interleaved method or DC/DC converters. This modulation scheme is aimed to increase converter power density by combining number o modules (phases) in parallel and number o switches per module, please reer to igure 1. Vin il1 il CS1 L1 d1,1 L M1,1 M1, d1, d1,m D1 M1,m Vds1 D Vout. MIBC DESCIPTION The MIBC has been devised using several multiswitch boost modules, which are out in phase [1]. Traditional multiswitch approach considers the same driving signal or all switches in order to divide the into several power semiconductors being the reasons or that insuicient handling capability, excessive power dissipation, complex thermal management or switch redundancy. In the MIBC, the driving signal o each power switch keeps the same switching requency but the ontime is reduced by a actor m and they are displaced each other in phase over pi/m radians. This driving scheme decouples switching requency and requency, which actually increases by a actor m. Also the common point, moset drain, has an eective switching requency m times higher than switching requency. Another interesting eature is that only one switch conducts at a given time, so average sharing could be adjusted by increasing the number o switches and decreasing the on time. On the other hand, phase shited paralleled modules, socalled interleaved converters, also oer reduction o input and output ripple, improved dynamic response or power losses distribution, among other advantages. For the MIBC, modules will be displaced pi/(nm) radians. d1,1 d1, d1,3 d1,4 d,1 d, d,3 ton T time CS d,1 M,1 M, d, d,m M,m Vds nphases mcontrolled switches per phase iln Ln Dn d,4 il1 il im1,1 T/m CSn dn,1 Mn,1 dn, Mn, dn,m Mn,m VdsN Figure 1. Multi Interleaved Boost Converter id1 Figure. Sketch o the main waveorms o a 4MIBC ( phase, 4 switches per phase) The Authors, published by EDP Sciences. This is an open access article distributed under the terms o the Creative Commons Attribution License 4. (

2 E3S Web o Conerences 16, 141 (17) DOI: 1.151/ e3scon/ ESPC 16.1 DC equations The MIBC DC analysis has been perormed or the general (n x m) coniguration. Main equations are listed in table 1. Descrip. Equation nb Duty cycle D = t 1 on T Voltage conversion M = V o 1 = ratio V in 1 md Inverse voltage conversion ratio Inductor ripple (pkpk) Average Max. Min. MS Inductor requency Minimum input or MOSFET average MOSFET MS Diode average Diode MS M ' = 1 M 3 Δi L = 1 V o M '1 ( M ') m L i L = i in n i L max = i L ( Δi L 6 ) i L min = i L ( Δi L 7 ) I MS L = i L Δi 8 ( L 1) L = m 9 i inmin = n V ind L i M = Di L 11 I MS M = DI MS L 1 i D = ( 1 md) i 13 L I MS D = 1 mdi MS L 14 = M ' mod n 1 Δi in = n V o m L 1 n in(out ) = nm 17 I out MS X X 1 D' e n n D' e n V in D 1D' e Li in = i in ( X 1 ) D' X 3 e n X X 1 n D' 3 e D' e = 1 md ; X = loor(nd' e ) Table 1. DC equations o the general (n x m) MIBC converter Smallsignal transer unctions Neglecting all parasitic elements, the smallsignal transer unctions o the general (n x m) MIBC converter have also been obtained and listed in table. ipple cancellation index Input ripple (pkpk) Input (output) requency Output MS Descrip. Equation nb duty cycletooutput G vd = ṽo d ( 1 s ω = K z ) 19 vo/d ( s ω voltage o ) sqω o 1 K vo/d = mv in D' e ; ω z nd' e L; Duty cycleto Inductor tooutput voltage ω o = D' e (L / n)c ; Q = D' e (nc)/l ( ) ( ) sqω o 1 G id = ĩl d s ω = K z1 1 il/d s ω o K il/d = m i in G vi = ṽo = ṽo d ĩ L nd' e ; ω z1 = C ĩ L d 1 = K vo/d K il/d ( 1 s ω z ) s ω z1 1 ( ) Table. Smallsignal equations o the general (n x m) MIBC converter 3. COMPAATIVE STUDY: 8IBC vs 4MIBC vs 4MIBC In order to evaluate and compare the MIBC and the IBC converters used as BDs, a theoretical study has been carried out using [] as the baseline speciications, please reer to table 3. Comparative study: BD main parameters Po 1.6kW Vin min 56V (md)max=.44 Vin max 94V (md)min=.6 Vo 1V L 5uH Co 88uF s 15kHz Table 3. BD power module speciications or converter comparison The study assumes the ollowing, three conigurations are evaluated: a) n=8, m=1; b) n=4, m=; c) n=, m=4. All have the same number o MOSFETs and consider the same parameters, listed in table Input & output ripple Substituting values in the equations (16) and (17) result in the input and output ripples represented in igures 3 and 4. 1

3 E3S Web o Conerences 16, 141 (17) DOI: 1.151/ e3scon/ ESPC 16 Figure 3. Input ripple As observed rom igure 3, the 4MIBC coniguration exhibits the lowest input ripple o all three. For certains md, 4MIBC and 8IBC conigurations have less input ripple, but at the extreme values o the duty cycle 4MIBC perorms better ,5,4,3,,1 Δi in (A) n=; m=4 n=4; m= md,1 (md)min,,3,4,5 (md)max Iout rms (A) n=; m=4 n=4; m= md,1,,3,4,5 (md)min (md)max Figure 4. MS output (@Vin=56V, Po=1.6kW) From the point o view o the output, the 4 MIBC has the highest MS value in the whole range, which is a key parameter or output capacitor losses and voltage ripple. Thus, low ES capacitors are mandatory to not impair MIBC perormance. 3. Inductor design Inductor design, using Magnetics toroid MPP cores, has been considered to evaluate size and volume reduction using MIBC. The design considers Dmax and Po max, the same inductance value and switching requency or all three conigurations. The design procedure has been tuned to achieve similar losses (global losses considering the sum o all s) and temperature increment. The most representative parameters have been gathered in table 4. Comparative study: design n=; m=4 n=4; m= Nb o ind. 4 8 Iavg A A A Δi.986 A 1.97 A 3.94 A 5 khz 5 khz 15 khz Core re Turns 1 34 L a.51 mh.51 mh.51 mh Ploss b 8.15 W 4.31 W.83W ΔT 6.6ºC 6.1ºC 56.ºC AWG Win. act. 18.3% 4.8% 1.5% DC res mω 9.58 mω 4.51 mω Finish.OD c 45.5 mm 31.1 mm 6.8 mm Finish.HT d.1 mm 15.4 mm 1.1 mm Area e.7 cm 9.67 cm 7.18 cm Mass 18.8 g 5.5 g 7.6 g Total loss W 17.4 W.64W Total area 41.4 cm 38.7 cm 57.4 cm Total mass 57.6 g g.8 g a) L at ull load; b) Ploss per ; c) Finished Output Diameter; d) Finished Height; e) Area as OD Table 4. Inductor comparison From table 4, 4MIBC exhibits the best outputs in terms o total area and mass, 4MIBC has the lowest losses and 8IBC gives the poorest results in terms o losses and required size, bringing to light that MIBC oers less input ripple, less losses and less area and mass i compared to the traditional IBC. 3.3 /DCM boundary Another interesting eature concerns to and DCM limits when MIBC is considered. As the number o phases and requency changes, the minimum also varies. Since boost transer unctions depend on conduction mode, the wider the range in a particular mode, the better rom the control point o view. Analysing the three conigurations, please reer to table 5, one realises that 4MIBC requires the lowest output power to remain in. Comparative study: /DCM boundary n=; m=4 n=4; m= Iin min avg.986a 3.94 A 15.8 A Pin min 55 W 1 W 883 W Table 5. /DCM limit comparison Table 5 reveals that 8IBC requires more than 88W to work in. In other words, 8IBC will work in both, DCM and, in real conditions. On the contrary, 4MIBC only requires 55.W to work in ; thus, problems related to DCM operation, like parasitic ringing or control loop design are virtually eliminated. 3

4 E3S Web o Conerences 16, 141 (17) DOI: 1.151/ e3scon/ ESPC Power semiconductor stress and impact on losses An important concern regards to part electrical rating, subsequent part selection and converter losses. One o the most signiicant dierences between the three conigurations relates to conduction time and maximum per switch. egarding the power moset, reduction o both, phases and conduction time per moset, implies identical average value, similar MS value but higher peak. Two important considerations arise rom this act, higher peak capacity will be required and switching losses could increment substantially. Since all conigurations will exhibit similar conduction losses, sotswitching techniques can be explored to keep similar perormance. egarding power diodes, one diode per phase is only required, but working at higher level and m times switching requency. Parallel diodes could be also considered to split power losses. Comparative study: electrical rating (Vin=56V, Vo=1V, Pin=16W) n=; m=4 n=4; m= Conduction time.88us 1.76us 3.5us MOS avg 1.57A 1.57A 1.57A MOS MS 4.74A 3.35A.34A MOS max A 8.13A 5.54A D (Irms.47A.47A.49A moset)^ DIODE avg 8A 4A A Table 6. MIBC electrical rating 3.5 Smallsignal transer unctions The MIBC smallsignal transer unctions depend on both, n and m parameters. The number o phases, n, determines the equivalent inductance whereas the number o devices, m, has impact on the duty cycle. Figures 5 and 6 represent the Bode plot o the smallsignal transer unctions Vo/d and il/d obtained by the PSIM simulator or the conigurations speciied in the table 7. Comparative study: smallsignal transer unctions (Vin=56V, Vo=8V, Pin=14W) n=; m=4 n=4; m= Kvo/d 53.dB 47.dB 41.dB z 19.5kHz 39kHz 78kHz o.37khz 3.36kHz 4.75kHz Q Kil/d 4.4dB 8.3dB 16.3dB z1 579Hz 579Hz 579Hz Table 7. MIBC smallsignal transer unctions db degree Figure 5. Duty cycletooutput voltage transer unction. PSIM nonaveraged model (Vin=56V, Vo=8V, Po=14W) db degree Gvd (j) Gvd (j) n=; m=4 n=4; m= n=; m=4 n=4; m= Gid (j) Gid (j) n=; m=4 n=4; m= n=; m=4 n=4; m= 1 Figure 6. Duty cycleto transer unction. PSIM nonaveraged model (Vin=56V, Vo=8V, Po=14W) 4

5 E3S Web o Conerences 16, 141 (17) DOI: 1.151/ e3scon/ ESPC MIBC SIMULATION Computer simulations using PSIM (Powersimtech) have been carried out to compare dierent conigurations: a) n=; m=4, b) n=4; m=, c), using the values o Table 3. (55W@1Vo), only the n=; m=4 coniguration keeps in operation due to higher requency. The other two conigurations, in open loop mode, increase the output voltage because o DCM operation. Figure 1. Input ripple. Moset is depicted in igure 11. As it can be observed, the average value is the same or all conigurations but the peak value and MS value is higher as n decreases. Figure 7. MIBC dierent simulation schemes. Input ripple at the minimum input voltage and maximum power or each coniguration is represented in igure 8. The lowest input ripple corresponds to the n=; m=4, according to (16) and igure 3. Figure 8. Input ripple. Output capacitor at the minimum input voltage and maximum power or each coniguration is represented in igure 9. The lowest MS value corresponds to the, according to (18) and igure 4. Figure 11. Moset. 5. MIBC: ANALOG PWM GENEATO Two methods have been devised to obtain desired PWM signals or the MIBC. First method uses n sawtooth signals and the control signal (Vc) splits into m signals (Vci) with dierent oset (Voi), (). V Oi = (i 1) V p ;i = 1...m () m V ci = V c V Oi Simpliied block diagram o the PWM generator or the 4MIBC and the sketch o the main signals are depicted in igure 1. Vc4 Vc3 Vc Vc1 d1,i ton T Vp SAW1 SAW 1 1 Vo4 Vo3 Vo Vo1 d,i Figure 9. Output capacitor. Vp Vo4 Vo1 Vci Vci Vo Vci SAW1 d1,i SAW Vc Voi Voi Voi Vo3 A B C D Figure 1. Analog PWM: option 1. d,i /DCM boundary is represented in igure 1. Considering a load resistor o ohms 5

6 E3S Web o Conerences 16, 141 (17) DOI: 1.151/ e3scon/ ESPC 16 Another option is to use n m sawtooth signals and only one control signal, which is limited to Vp/m. Figure 13, shows the sketch o this analog PWM generator. Only one comparator is required or each driving signal. SAW1,1 SAW,1 Vc max Vc d1,i d,i ton Figure 13. Analog PWM: option. Figure 14 represents the PWM signal (d1,1) and the sawtooth (SAW1,1) o one power MOSFET using the second method with the commercial multiphase integrated oscillator LTC699 and a constant source that charges a capacitor. Figure 15. Digital PWM signals or one phase: adapted rom circuit option CONCLUSIONS This paper presents an interleaving technique that is suitable or DC/DC converters, BD s is one possible application, as studied here, but other power conditioning unctions could be explored. Design equations, comparative study and analog and digital (FPGA) practical implementation o the PWM generator system is presented. 8. EFEENCES Figure 14. Sawtooth and PWM signal: option. 6. MIBC: DIGITAL (FPGA) PWM GENEATO Analog implementation o the PWM generator oers simplicity as the main advantage. On the contrary, digital approach, FPGA is considered here, is more complex but has some beneits that should be considered. To highlight some, high time resolution to achieve very low duty cycles, synchronous signals with adjustable dead time or bidirectional conversion or sotswitching, hot reconiguration or redundancy, protection or eiciency purposes. 1. Hegazy, O., Van Mierlo, J. & Lataire, P. (1). Analysis, modeling and implementation o a multidevice interleaved DC/DC converter or uel cell hybrid electric vehicles. IEEE Trans. Power Electron. 7(11), Carbonnier, H, Fernandez, A., Triggianese, M. & Tonicello, F. (14). Interleaved boost converter used as a battery discharge regulator or space applications, 1 th ESPC, Noordwijkerhout, The Netherlands. In this paper a digital PWM adapted rom analog method option 1 is presented. Figure 15 shows the our gate signals o one phase switching at 96kHz. 6