CHAPTER 4 4-PHASE INTERLEAVED BOOST CONVERTER FOR RIPPLE REDUCTION IN THE HPS

Transcription

1 71 CHAPTER 4 4-PHASE INTERLEAVED BOOST CONVERTER FOR RIPPLE REDUCTION IN THE HPS 4.1 INTROUCTION The power level of a power electronic converter is limited due to several factors. An increase in current causes an increase in stresses on switching devices. Besides, the diode reverse recovery current and parasitic resonance current become greater than the main switch can handle, and hence, the size of the boost inductor should be increased to avoid saturation and overheating problems. In order to advance the power level significantly the methods, including device paralleling, module paralleling and interleaving are widely utilized. Paralleling two or more switching devices are a widely utilized approach to increase the current handling capability of switches. The same PWM signal is applied to devices and switch currents are shared. This method is useful in devices with positive temperature constant (PTC) such as MOSFETs. Paralleling operation is not easy with negative temperature constant (NTC) devices like IGBTs. The device paralleling method is not practical for all applications. For some applications, boost stages are designed modularly such that the converter stages can be connected in parallel to meet the increasing power requirement. This method is preferable as it is easy to increase the

2 72 power rating by simply stacking converters with increased redundancy. The drawbacks of the method are; it relatively costs high, large volume covered, and cooling difficulties. Furthermore, to provide equal sharing of input current among the converters, additional circuitry should be utilized and the currents of individual converters do not return properly, current of one module can circulate through other module and some unexpected failures may occur. The power stage of the converter consists of semiconductor switches and magnetic components. The drawbacks such as unbalanced current sharing between semiconductor switches and magnetic saturation is partially overcome by the power stage paralleling method shown in Figure 4.1. In this configuration, transistors are not paralleled directly. Therefore current sharing problems mentioned previously are not an issue. Besides, energy storage requirement of the inductors is decreased, so the total magnetic component volume can be reduced significantly. This method is better than the previously mentioned two methods in the safe operation and power density aspects. Furthermore, hot swapping and increasing the power rating by simply stacking modules are possible. Figure 4.1 Boost rectifier with N phase paralleled power stage

3 73 Power Stage paralleling is very practical, but it is not the optimal solution in terms of converter performance and size considerations. The same paralleling method can be utilized with a different switching pattern than the identical switching patterns in order to reduce input current and output voltage ripples. The input EMI filter size and output capacitor size are comparatively larger in power stage paralleling technique, while it is reduced in proportion with the ripple reduction in case of the IBC. The separate power branches are controlled by interleaved switching signals but they have a phase shift. 4.2 INTERLEAVED BOOST CONVERTER During the last few decades, power electronics research has focused on the development of multi-phase parallel DC-DC converters to increase the power processing capability and to improve the reliability of the power electronic system. The advantages of constructing a power converter by means of interleaved parallel connected converters are ripple cancellation in both the input and output waveforms to a maximum extent, and lower value of ripple amplitude and higher ripple frequency in the resulting input and output waveforms (Buerger et al 2014). In addition, multiphase parallel connection of power converters reduces maintenance, increases reliability, achieves faster transient response, and reduced electromagnetic emission and fault tolerance. By splitting the current into many power paths, conduction losses (I 2 R) can be reduced, increasing overall efficiency compared to a conventional boost converter. The structure of a N phase interleaved boost converter (IBC) is shown in Figure 4.2, while a 4-phase IBC is planned for the proposed research work. Mathematically there is no limit for the number of interleaved power branches. But in practice as the phase number increases, the system complexity increases and maintenance becomes difficult. The input EMI filter

4 74 size and output capacitor size are reduced in proportion with the ripple reduction. The disadvantage of the interleaving method is the increase in the gate driving logic complexity, but necessarily the size and cost of the gate drive. Logic signals to all the gates are equally phase shifted by the amount defined in (4.1). 2π PhaseShift k (4.1) N Figure 4.2 N Phase interleaved boost converter In Equation (4.1), N denotes the number of interleaved branches and k denotes the order of discrete interleaved branches (k = 1,, N). In this case, a four phase IBC has gate drive logic signals or pulse width modulated (PWM) signals that are sequentially gated with 90º phase delays with respect to each other as shown in Figure 4.3. From the literature review (Anu Rahavi et al 2012), of the various configurations of the IBCs such as uncoupled, directly coupled and inversely coupled, it is reported that the directly coupled IBC gives a reduced input current ripple rather than the other two systems and it is best suited for renewable energy applications.

5 75 Figure 4.3 PWM signals applied to the discrete legs of a four phase IBC Input Current Ripple Reduction In an IBC, the input current I g is the sum of distinct inductor currents. Inductor currents in separate branches can be assumed to have the same magnitude as the power branches are indistinguishable. The inductor ripple current waveform in the four individual inductors of the 4-phase IBC is shown in Figures 4.4 (a) and (b) the input current waveform of a four phase interleaved boost rectifier is given. From Figure 4.4, it is observed that the amplitude of the input ripple and ripple period are decreased due to the interleaved switching of the solid state devices. The period τ of the input current ripple can be expressed by the equation (4.2). In the equation T s denotes the switching period. T τ s (4.2) N

6 76 Figure 4.4 Current waveforms of a 4-phase IBC, (a) inductor current ripple waveforms (L 1, L 2, L 3, L 4 ), (b) input current ripple waveform (i g ). During a ripple period τ, only one transistor or the switch is switched and other switches are in their ON or OFF states depending on duty cycle. For example, in Figure 4.3, during the sub period (2), S2 is switched while S1 and S4 are in their OFF state and S3 is in its ON state. Equation (4.3) is valid for N phase IBC s. N N N 1 (4.3) ON OFF In the Equation (4.3), N ON and N OFF denote the number of transistors which are in their ON and OFF states during an input current ripple period. N ON and N OFF generally depend on the duty cycle. The rising time of input current can be denoted by τ ON and duty cycle q of input current ripple can be expressed by the Equation (4.4). q τ τ ON (4.4)

7 77 As a result of analysis on Figure 4.3, it is seen that the rising time of input current is dependent on the rising time of inductor current, period of input ripple current, and the number of ON state switches. This relationship can be expressed by the Equation (4.5). τ T N τ (4.5) ON ON ON A generalized expression (4.6) for the duty cycle q of input current ripple can be estimated by substituting (4.2) and (4.4) in the Equation (4.5). q ND N ON (4.6) In Equation (4.6), D denotes the duty cycle of the converter. The input current i g is the sum of all inductor currents and is expressed by (4.7). i g N il,k (4.7) k1 Considering the linearity of the equation (4.7), the rate of change of the quantity i g shall be expressed as in Equation (4.8) and is carried out to substitute in the basic voltage equation of the conventional boost converter. di g dt N dil,k (4.8) k1 dt The basic expression for the inductor current in a boost converter shall be related from the inductor voltage as given by the Equation (4.9). di dt L L Vg S'VOUT (4.9) while V g is the input voltage of the boost converter, S is the switching function of the switch and S is the complementary function of S and is represented by (S =1-S), V out is the output voltage of the boost converter.

8 78 The expression for the input current ripple in an IBC can be estimated by substituting the equation (4.9) in the equation (4.8) as shown in Equation (4.10). N ' dig Vg S V dt k1 L OUT N g g dt L k1 Vg di V SV ' OUT 1 (4.10) The input and output voltage in a conventional boost converter is related by the expression (4.11). V 1 OUT (4.11) V 1 D g D'=1-D is the complementary of D. Hence the Equation (4.11) reduces as presented in Equation (4.12). V 1 OUT ' (4.12) V D g Equation (4.13). Substituting the Equation (4.12) on the Equation (4.10) results in N ' g 1 ' (4.13) k1 dig V S dt L D Thus the change of input current by time in an IBC can be expressed as in Equation (4.14). di N g Vg 1 ' N 1 Sk dt L ND' (4.14) k1

9 79 The expression for the input current ripple for an N-phase IBC is presented in the Equation (4.15) and is derived from (4.14). V 1 N g ' Δig N 1 Sk q L ND' k1 τ (4.15) From the Equation (4.15), it can be seen that the input current ripple depends on the duty cycle and the number of interleaved phases. The ratio of the input current ripple to any inductor current ripple is calculated for two and four phases and their variations depending on the duty cycle change is shown in Figure 4.5. Figure 4.5 Vs duty cycle of an IBC based on number of phases From the analysis made on the IBC, it is inferred that the input current ripple decreases as the number of interleaved phases increases, and zero input ripple can be obtained theoretically at some special duty cycles. It is witnessed from Figure 4.5 that the ratio of input current ripple to inductor current ripple for 2, 3 and 4 phase IBC is unity, at zero and unity duty cycle. The magnitude of the input current ripple in 4-phase IBC is zero at duty cycle

10 80 magnitudes 0.25, 0.5 and 0.75 and is less than 2-phase IBC in the entire duty cycle range. The input current ripple of 3-phase IBC is less than that of the 4- phase IBC for the duty cycle 0.29 to 0.42 and 0.58 to 0.71 and other than that, it is higher that of 4-phase IBC Output Voltage Ripple Reduction The output current of the IBC is the sum of the capacitor current and load current. The output current has a periodical AC component and a DC component. It is assumed that the output capacitor is large enough to suppress all AC ripple current. Therefore, the AC component flows through the capacitor and the average value of the current flows through the load. The amount of charge (ΔQ) accumulated in the capacitor to provide a constant output current is expressed in the Equation (4.16) ' T V qq S OUT ΔQ N 2 R ' LOAD D (4.16) The relationship between the charge and the voltage of a capacitor is given by the Equation (4.17) ΔQ (4.17) C Substituting ΔQ from the equation (4.16) in (4.17) yields the expression for the output voltage ripple (4.18) T V qq ' S OUT OUT 2 ' N RLOADC OUT D (4.18) From the Equation (4.18), it is seen that the output voltage ripple depends on the switching period, output voltage, load resistance, output

11 81 capacitor, and the duty cycle as in conventional single phase boost converter. Additional parameters for interleaving method are the number of interleaved branches and duty cycle of sub periods. In order to show the effect of interleaving on output voltage ripple, the ratio of output voltage ripple to output voltage (given in Equation (4.19)) is divided to common parameters for the single and multi phase IBC s, ' OUT OUT RLOADCOUT qq 2 ' V V T N D OUT NORM OUT S (4.19) The normalized output voltage ripple ratio according to the duty cycle for different number of phases is shown in Figure 4.6. Figure 4.6 Normalized output voltage ripple ratio versus the duty cycle for different number of phases The output voltage ripple is minimized at the points where the input current ripple is minimized. The output current ripple can be decreased by increasing the number of interleaved phases. In both the previous sections, the effect of interleaving on the input current and the output voltage ripples were investigated. It has been inferred that, the ripples are significantly reduced by

12 82 the interleaving method, and also it can be seen that in both the cases the 4- phase interleaved offers better input current ripple as well as the output voltage ripple reduction than the conventional boost and 2-phase IBC. As said earlier, there is no limit in using the number of interleaved branches N, and the increase in N greatly reduces the ripple in the input current and in the output voltage. But it significantly increases the complexity in the logical gate drive system and hence the maintenance becomes difficult. From the mathematical analysis, the 4-phase IBC is found to offer better input current and output voltage ripple reduction as shown in Figures 4.5 and 4.6, which is confirmed from the simulation analysis delineated in chapter IBC AS THE BASIC CONVERTER UNIT OF HPS The RES, such as SPV panel and fuel cell generally have low output voltage which mandates the use of the boost converter to increase and match with the load voltage. But the use of conventional boost converters generally introduce large amounts of ripple content in the input current as well as in the output voltage. It inherently shortens the lifetime of RES sources such as SPV panel and fuel cell and also decreases the performance of the sources. With large input current ripple and output voltage ripple, the control of the system parameters such as output voltage control, power flow control becomes difficult as it mandates a sturdy averaging circuit for each input parameter of the controller. Based on the analysis performed in section 4.2, it is proved that the IBC offers better input current ripple reduction and the output voltage ripple reduction. Hence, in view of the advantages offered, the IBC is recommended as the basic converter unit in the proposed HPS. 4.4 SIMULATION ANALYSIS OF 2 PHASE AND 3-PHASE IBC A 2-phase and 3-phase IBC is simulated in MATLAB/SIMULINK to analyze the ripple performance. An ANN controller as discussed in chapter

13 and 6.6 is designed for handling the power flow control which suitably varies the PWM signal based on the instantaneous power delivered by that source. A phase delay of 180 (time delay of second) and a phase delay of 120 (time delay of second) is created in the PWM signal applied to the successive phases of the IBC to interleave the inductor current signal in the 2-phase and 3-phase IBC respectively Ripple Analysis in 2-Phase IBC The simulation output of the 2-phase IBC connected to SPV panel is shown in Figure 4.7. The magnitude of current ripple in the inductors (I L1, I L2 ), source current and output voltage ripple of the 2-phase IBC s connected to SPV panel, WTG, fuel cell and battery is given in Table 4.1 (a), 4.1 (b), and 4.2 respectively. Figure 4.7 Current and voltage output of SPV panel fed 2-phase IBC

14 84 Table 4.1(a) of the 2-phase IBC connected to SPV panel and WTG Parameter (N=2) in inductor 1 in inductor 2 Input source current ripple SPV panel WTG Table 4.1(b) of the 2-phase IBC connected to the Fuel cell and Battery Parameter (N=2) in inductor 1 in inductor 2 Input source current ripple Fuel cell Battery Table 4.2 Output voltage ripple of the 2-phase IBC connected to RES s Output Voltage Ripple (N=2) (V) (V) (V) SPV Panel Wind Turbine Generator Fuel cell Battery

15 Ripple Analysis in 3-Phase IBC The simulation output of the 3-phase IBC connected to WTG is shown in Figure 4.8. The magnitude of current ripple in the inductors (I L1, I L2, I L3 ) and source current and output voltage ripple of the 3-phase IBC s connected to SPV panel, WTG, fuel cell and battery are given in Table 4.3 (a), 4.3 (b) and 4.4 respectively. Figure 4.8 Current and voltage output of WTG fed 3-phase IBC

16 86 Table 4.3(a) of the 3-phase IBC connected to SPV panel and WTG Parameter (N=3) in inductor 1 in inductor 2 in inductor 3 Input source current ripple SPV panel WTG Table 4.3(b) of the 3-phase IBC connected to fuel cell and battery Parameter (N=3) in inductor 1 in inductor 2 in inductor 3 Input source current ripple Fuel cell Battery Table 4.4 Output voltage ripple of the 3-phase IBC connected to RES s Output Voltage Ripple (N=3) (V) (V) (V) SPV Panel Wind Turbine Generator Fuel cell Battery

17 SIMULINK MODELING AND ANALYSIS OF 4-PHASE IBC Simulink model of the proposed 4-phase IBC connected to AC grid and controlled by ANN as the local controller for voltage control, VDCC and current fine-tuning is shown in Figure 4.9. Figure 4.9 Simulink model of a 4-Phase IBC connected to SPV Panel

18 88 The ANN controller optimizes the duty cycle to restore the V ref_pcc and to deliver I ac_ref at the output of the IBC (detailed in chapter and 6.6.4). The output of the ANN controller is in the form of a numeral and the PWM signal pertaining to that duty cycle is developed by comparing the ANN output with a triangular waveform of 5000Hz frequency using relational operators. The developed pulse width modulation (PWM) signal is interleaved using discrete variable transport delay to create a delay by an angle of 90 (time delay of second) in the PWM signals applied to each of the consecutive phases in an IBC which is shown in Figure Figure 4.10 PWM signals applied to 4-Phase IBC In case of the RE based HPS using the IBC as the basic converter topology, the instantaneous duty cycle of the IBC is mainly determined by the parameters such as the input voltage, the required output voltage, the instantaneous current needed to be delivered at the output of the IBC which is governed by the voltage control and VDCC technique. As the input current ripple and the output voltage ripple of the IBC is also a function of duty cycle as seen in Figure 4.5, there exists a trade-off in estimating the duty cycle as

19 89 the estimated duty cycle should complement all the desired task such as voltage control at PCC, VDCC and also the ripple reduction in input current and the output voltage. From the mathematical analysis performed in the previous section 4.2.2, it is understood that in a 4-phase IBC, the input current and output voltage ripple is zero at the duty cycles 0.25, 0.5 and 0.75, and also the magnitude of the ripple around these duty cycle is negligible. With the primary objectives to reduce the ripple content and also to maintain a constant output voltage (156V), the source voltage is carefully selected to operate the IBC at or nearer to 0.25, 0.5 or The proposed 4-phase IBC proves to achieve a greater reduction in the output voltage and input current ripple which can be revealed from Figure 4.11 which depicts the input current and the output voltage waveform of the IBC connected to SPV panel. Figure 4.11 Input current and output voltage waveforms of the 4-phase IBC connected to SPV panel

20 90 An analysis on input current ripple and output voltage ripple is presented in Tables 4.5 (a), 4.5 (b) and 4.6, shows that the ripple in source current is significantly reduced to around 0.02A by the 4-phase IBC which momentously improves the overall efficiency of the conversion system. Table 4.5(a) of the 4-phase IBC connected to SPV panel and WTG Parameter (N=4) in inductor 1 in inductor 2 in inductor 3 in inductor 4 Input source current ripple SPV panel WTG Table 4.5(b) of the 4-phase IBC connected to fuel cell and battery Parameter (N=4) in inductor 1 in inductor 2 in inductor 3 in inductor 4 Input source current ripple Fuel cell Battery

21 91 Table 4.6 Output voltage ripple of the 4-phase IBC connected to RES s Output Voltage Ripple (V) (V) (V) SPV Panel Wind Turbine Generator Fuel cell Battery On comparing source current and output voltage ripple of the 2, 3 and 4-phase IBC, the ripple magnitude is less in 4-phase IBC. Hence it is proposed as the basic converter unit of HPS.