FlexWave: Development of a Wavelet Compression Unit
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1 FlexWave: Development of a Wavelet Compression Unit Jan.Bormans@imec.be Adrian Chirila-Rus Bart Masschelein Bart Vanhoof ESTEC contract 13716/99/NL/FM imec 004
2 Outline! Scope and motivation! FlexWave image encoder! Local Wavelet Transform (LWT) processor! CCSDS context! Results imec 004 ESA Microelectronics Presentation Days - February 004
3 Outline! Scope and motivation! FlexWave image encoder! Local Wavelet Transform (LWT) processor! CCSDS context! Results imec 004 ESA Microelectronics Presentation Days - February 004 3
4 Scope and Motivation! To develop an image compression device, together with a bit-true SW model and synthesizable HW model! For different missions and usage contexts! Lossless/lossy! Image-based/push-broom! Visual/IR/ data! Different storage and/or transmission characteristics! 10 Msample/s! Enabling low-power solutions imec 004 ESA Microelectronics Presentation Days - February 004 4
5 Outline! Scope and motivation! FlexWave image encoder! Local Wavelet Transform (LWT) processor! CCSDS context! Results imec 004 ESA Microelectronics Presentation Days - February 004 5
6 Wavelet-based Compression! Wavelets: intrinsic scalability characteristics! Quality scalability: graceful increase of the image quality (up to lossless)! Spatial scalability: graceful increase of the image size ( thumbnailing possible)! In lossy mode: type of artefacts can be influenced by wavelet filter choice! No explicit tiling of image needed (as in e.g., DCTbased schemes)! Excellent compression performance in entropy coder chains! But: potentially complex hardware implementation! Large memory sizes! Large latency between input availability and production of minimal data entities for entropy coding! Arithmetic coding imec 004 ESA Microelectronics Presentation Days - February 004 6
7 FlexWave-II: Flexible Wavelet-based Solution! Problem: traditional solutions often sacrifice wavelet functionality to reduce implementation complexity E.g., introduce tiling to reduce memory requirements " FlexWave-II solution! Wavelet processor engine for maximal flexibility! IMEC s Local Wavelet Transform (LWT)! algorithmically equivalent (i.e. no tiling)! block-based computation 1k x 1k Classical RPA LWT Memory Size 1 M 37 k 81 k Memory Accesses/pixel imec 004 ESA Microelectronics Presentation Days - February 004 7
8 FlexWave-II Architecture Parameters ( e.g., Levels, Bitplanes, Quantiser) DC Image Encoder Local Wavelet Transform Quantizer Embedded Zero-Tree Encoder Arithmetic Coding Bit Stuffer Block Processing Tree Processing Bit Processing/Bitstream EZT Coder Chain 1 EZT Coder Chain EZT Coder Chain 3 FlexWave II EZT Coder Chain 4 Resynchronization #" Reorder, Drop (e.g., SNR progressive, Spatial Progressive, bitrate-distortion trade-off ) imec 004 ESA Microelectronics Presentation Days - February 004 8
9 Outline! Scope and motivation! FlexWave image encoder! Local Wavelet Transform (LWT) processor! CCSDS context! Results imec 004 ESA Microelectronics Presentation Days - February 004 9
10 LWT Architecture! Two groups of operations! Filtering operations! Copy operations between small memories! Parallelism for high efficiency and throughput! Between the filter and copy operations! Between the different copy operations hierarchical structure of several controllers LWT: a superscalar, instruction-based custom processor imec 004 ESA Microelectronics Presentation Days - February
11 LWT: Superscalar Hierarchical Controller Structure layer 1 Interface Instr.RAM Main ctrl control signal data layer Filter ctrl syncing Copy ctrl Input TC IPM0 TC Filter IPM1 TC layer 3 ICM TC OMH TC OMV TC TM TC Output TC imec 004 ESA Microelectronics Presentation Days - February
12 LWT Processing Based on Sequence of Instructions! Specific instruction set! Possibility to program specific tasks! Region of Interest! View-dependent texture coding! Standard-depending coding! Push-broom processing imec 004 ESA Microelectronics Presentation Days - February 004 1
13 Software Support Eases Schedule Creation, Debugging & Synchronisation Check imec 004 ESA Microelectronics Presentation Days - February
14 High-Level Simulator! Avoids (slow) VHDL simulations to test sequence! Visually intuitive! Source/destination/filter/symmetrical copy operations! Syncing from/to filter/copy controller! Only relevant information! Facilitates debugging/optimizing of sequence imec 004 ESA Microelectronics Presentation Days - February
15 Outline! Scope and motivation! FlexWave image encoder! Local Wavelet Transform (LWT) processor! CCSDS context! Results imec 004 ESA Microelectronics Presentation Days - February
16 Consultative Committee for Space Data Systems (CCSDS)! SLS Data Compression panel! FlexWave-II demonstrated the feasibility of lowcomplexity wavelet encoding! LWT compatible with NASA s Bit Plane Encoder (BPE) " FlexWave-II played an important role in the acceptance by CCSDS of wavelet-based schemes, in line with ESA requirements imec 004 ESA Microelectronics Presentation Days - February
17 Outline! Scope and motivation! FlexWave image encoder! Local Wavelet Transform (LWT) processor! CCSDS context! Results imec 004 ESA Microelectronics Presentation Days - February
18 FlexWave-II Compression Performance PSNR (db) JPEG000-1Layer JPEG Layers FlexWave II JPEG000 4 Tiles, 4 Layers,(-,,0.5,0.1) CCSDS JPEG Tiles, 16 Layers,(log) Bit Per Pixel imec 004 ESA Microelectronics Presentation Days - February
19 Visual Performance 0.1 bpp JPEG000 15L FlexWave II JPEG000 1L CCSDS JPEG 000 4L-4T JPEG000 16L-16T imec 004 ESA Microelectronics Presentation Days - February
20 Visual Performance 0.5 bpp JPEG000 15L FlexWave II JPEG000 1L CCSDS JPEG 000 4L-4T JPEG000 16L-16T imec 004 ESA Microelectronics Presentation Days - February 004 0
21 Visual Performance 0.5 bpp JPEG000 15L FlexWave II CCSDS JPEG 000 4L-4T imec 004 ESA Microelectronics Presentation Days - February 004 JPEG000 1L JPEG000 16L-16T 1
22 LWT FPGA implementation report on Xilinx Virtex XCV6000 Target Device : xv6000 Target Package : bf957 Target Speed : -6 Design Summary Number of Slices: 3,66 out of 33,79 10% Number of Slices containing unrelated logic: 0 out of 3,66 0% Number of Slice Flip Flops:,93 out of 67,584 3% Total Number 4 input LUTs: 6,176 out of 67,584 9% Number used as LUTs: 5,730 Number used as a route-thru: 446 Number of bonded IOBs: 138 out of 684 0% IOB Flip Flops: 14 Number of Block RAMs: 18 out of % Number of MULT18X18s: 1 out of % Number of GCLKs: out of 16 1% Number of DCMs: out of 1 16% Total equivalent gate count for design: 8,551,309 Additional JTAG gate count for IOBs: 6, Max. Clock Frequency 50 MHz imec 004 ESA Microelectronics Presentation Days - February 004
23 LWT Processing Performance Results (FPGA) 5-3 Filter 9-7 Filter Frm/Sec Clk/Pix Memory (words) Levels Block Size Frm/Sec Clk/Pix Memory (words) Levels Block Size Image , , , , , , , , , , , , , , , , , , imec 004 ESA Microelectronics Presentation Days - February 004 3
24 FlexWave-II FPGA implementation report on Xilinx Virtex XCV6000 Target Device : xv6000 Target Package : bf957 Target Speed : -6 Design Summary Number of Slices: 14,571 out of 33,79 43% Number of Slices containing unrelated logic: 0 out of 14,571 0% Number of Slice Flip Flops: 11,957 out of 67,584 17% Total Number 4 input LUTs: 19,987 out of 67,584 9% Number used as LUTs: 17,396 Number used as a route-thru: 75 Number used for 3x1 RAMs: 1,840 (Two LUTs used per 3x1 RAM) Number used as 16x1 ROMs: 6 Number of bonded IOBs: 105 out of % IOB Flip Flops: 10 Number of Tbufs: 40 out of 16,896 1% Number of Block RAMs: 144 out of % Number of MULT18X18s: 30 out of 144 0% Number of GCLKs: out of 16 1% Number of RPM macros: 8 Additional JTAG gate count for IOBs: 5, Max. Clock Frequency 41 MHz Resources LWT LWT part of FlexWave II FlexWave II Slices 3, % 14,571 Memory Blocks % 144 Multipliers % 30 Clk/Pix (1k 1k, 3 3, 5) % 5.7 imec 004 ESA Microelectronics Presentation Days - February 004 4
25 FlexWave-II processing performance for the 5/3 wavelet filter (FPGA) Image Size Nr of Clock BlockSize levels Cycles/Pix imec 004 ESA Microelectronics Presentation Days - February 004 5
26 FlexWave-II Estimated Synthesis and Timing Results for 0.18µm UMC Technology Block Gate Percentage Count LWT % Quantisation % unit CoderBlock % CoderBlock % CoderBlock % CoderBlock % DC coder % Glue % Total % Operating conditions RAM Delay Critical path Clock frequency Best Case 3 ns 8.84 ns 113 MHz Typical Case 4 ns ns 84 MHz Worst Case 5 ns ns 50 MHz imec 004 ESA Microelectronics Presentation Days - February 004 6
27 FlexWave-II Scalability Demonstrator Photo imec 004 ESA Microelectronics Presentation Days - February 004 7
28 Conclusions! FlexWave-II: combining compression performance, flexibility and low implementation complexity! Programmable/tunable for different usage contexts! Key component: LWT enabling block-based processing without image tiling! Impacted CCDSS standardization! Design kit and FPGA prototype imec 004 ESA Microelectronics Presentation Days - February 004 8
29 Worldwide collaboration with more than 500 companies and institutes. IMEC Kapeldreef 75 B-3001 Leuven Belgium Tel Fax
30 imec 004 ESA Microelectronics Presentation Days - February
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THIS work focus on a sector of the hardware to be used
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