Lecture Notes in Computer Science

Transcription

1 Lecture Notes in Computer Science Edited by G. Goos and J. Hartmanis 818 Advisory Board: W. Brauer D. Gries J. Stoer

2 David L. Dill (Ed.) Computer Aided Verification 6th International Conference, CAV '94 Stanford, California, USA, June 21-23, 1994 Proceedings Springer-Verlag Berlin Heidelberg NewYork London Paris Tokyo Hong Kong Barcelona Budapest

3 Series Editors Gerhard Goos Universit~it Karlsruhe Postfach Vincenz-Priessnitz-StraBe 1 D Karlsruhe, Germany Juris Hartmanis Cornell University Department of Computer Science 4130 Upson Hall Ithaca, NY 14853, USA Volume Editor David L. Dill Department of Computer Science, Stanford University Stanford, CA 94305, USA CR Subject Classification (1991): E3, D.2.4, D.2.2, B.7 ISBN Springer-Verlag Berlin Heidelberg New York ISBN Springer-Verlag New York Berlin Heidelberg CIP data applied for This work is subject to copyright. All rights are reserved, whether the whole or part of the material is concerned, specifically the fights of translation, reprinting, re-use of illustrations, recitation, broadcasting, reproduction on microfilms or in any other way, and storage in data banks. Duplication of this publication or parts thereof is permitted only under the provisions of the German Copyright Law of September 9, 1965, in its current version, and permission for use must always be obtained from Springer-Verlag. Violations are liable for prosecution under the German Copyright Law. 9 Springer-Verlag Berlin Heidelberg 1994 Printed in Germany Typesetting: Camera-ready by author SPIN: / Printed on acid-free paper

4 Preface This volume contains the proceedings of the Sixth Conference on Computer- Aided Verification (CAV'94), held at Stanford University on June The purpose of the CAV conference is to bring together researchers and practitioners who are interested in the theory and practice of formal verification. Traditionally, CAV has placed a strong emphasis on finite-state concurrent systems; but as the art advances, the line between "finite-state" and unbounded or infinite state systems is becoming increasingly fuzzy. There has always been an emphasis at CAV on methods that can be applied in practice to important problems. Of the 121 papers submitted this year, 37 were accepted for publication in the proceedings. There were papers on a wide variety of topics. This year, there were many papers on verification of real-time systems, introducing new results of both practical and theoretical importance. There were also several papers on hybrid systems which broke new ground. There were papers proposing new symbolic representations for large state spaces. There were many papers that advanced the capabilities of verification for particular application areas (for example, verification of pipelined processors and mobile processes), and several studies of verification methods applied to real examples from hardware and protocols. There were also various papers on improving the efficiency or generality of verification techniques, and papers advancing the theory of synthesis, probabilistic checking, and branching-time temporal logic. CAV was sponsored by six generous (and forward-looking) companies who provided essential financial support: AT&T, IBM, Intel, Motorola, Redwood Design Automation, and Sun Microsystems. The papers to be presented were chosen by the conference Program Committee. The Steering Committee consisting of conference founders Edmund M. Clarke (Carnegie Mellon University), Robert Kurshan (AT&T Bell Laboratories), Amir Pnueli (Weizmann Institute), and Joseph Sifakis (VERIMAG) helped with reviewing and provided advice in the organization of the conference. Also on the program committee were R. Alur (AT&T Bell Laboratories), R. Brayton (U. of California, Berkeley), E. Brinksma (U. of Twente), R. Bryant (Carnegie Mellon U.), R. Cleaveland (N. Carolina St. U.), C. Courcoubetis (U. of Crete), R. de Simone (INRIA), A. EITIe,'SO,I (U. of Texas, Austin), M. Fujita (Fujitsu Laboratories), S. German, O. Grumberg (Technion), N. Ilalbwachs (IMAG), G. ttolzmann (AT&T Bell Laboratories), K. Larsen (Aalborg U.), K. McMillan (AT&T Bell Laboratories), L. Paulson (Cambridge U.), N. Shankar (SRI International), F. Somenzi (U. of Colorado, Boulder), B. Steffen (Techical U. of Aachen), P. Varaiya (g. of California, Berkeley), P. Wolper, (U. de Liege), and T. Yoneda (Tokyo Inst. of Tech.). David Dill of Stanford University is the General and Program Chair of the conference. The conference was held on the Stanford campus under the sponsor-

5 yl ship of the Department of Computer Science. Nancy Millikin, Stanford's Conference Coordinator, and Cecilia Sanchez of Events Plus assisted in planning of the local arrangements. Jerry Burch helped with the assembly of the final camera-ready copy. We would also lille to thank the following additional reviewers, who helped with the evaluation of one or more papers: A. Alkar, H. Reif Andersen, P. Attie, A. Aziz, F. Balarin, I. Beer, S. Ben-David, O. Bernholtz, R. Bharadwaj, G. Bhat, B. Boigelot, A. Bouajjani, A. Bouali, F. Boussinot, J.R. Butch, O. Burkart, K. C. Chen, A. Carruth, S.T. Cheng, F. Corno, P. Curzon, D. Cyrluk, A. Deshpande, A. Dicky, H. Eertink, J.-C. Fernandez, G. Gamage', H. Garavel, A. Geser, P. Godefroid, D. Goldschlag, A. Gollu, S. Graf, B. Graham, G. Hachtel, L. Heerink, T. Henzinger, H. IIiguehi, ti. Itiraishi, R. Hojati, I. Honma, A.J. Hu, H. Hungar, H. Huttel, N. C-W. Ip, M. Kaltenbach, S. Kalvala, P. Kars, J.-P. Katoen, D. Kirkpatrick, S. Krishnan, Y. Kukimoto, C. Laneve, T. Langerak, G. Luettgen, E. Macii, E. Madelaine, T. Margaria, Y. Matsunaga, J, McManis, L. Mounier, K. Nakane, K. Namjoshi, M. Nesi, X. Nicollin, A. Nymeyer, S. Owre, A. Pardo, S. Park, D. Peled, D. Pirottin, A. Puri, R. Ranjan, Y.S. Ramakrishna, It. Schlingloff, T. Shiple, J. Sifakis, V. Singhal, A. Skou, M. Lara de Souza, M.K. Srivas, P. Stephan, A. Takahara, S. Tasiran, R. Trefler, L. Tumlin, C. Weise, W. Wong, E. Wu, and M. Yoeli. Stanford, April 1994 David L. Dill

6 Table of Contents Real Time A Determinizable Class of Timed Automata... 1 R. Aiur, L. Fix and T.A. Henzinger Real-Time System Verification Using P/T Nets R. Gorrieri and G. Siliprandi Criteria for the Simple Path Property in Timed Automata W.K.C. Lain and R.K. Brayton Symbolic Verification 1 Hierarchical Representations of Discrete Functions, with Application to Model Checking K.L. McMillan Symbolic Verification with Periodic Sets B. Boigelot and P. Wolper Automatic Verification of Pipelined Microprocessor Control J.R. Butch and D.L. Dill Hybrid Systems Using Abstractions for the Verification of Linear tiybrid Systems A. Olivero, J. Sifakis and S. Yovine Decidability of Hybrid Systems with Rectangular Differential Inclusions 95 A. Puri and P. Varaiya Suspension Automata: A Decidable Class of tiybrid Automata J. McManis and P. Varaiya Verification of Context-Free Timed Systems Using Linear Hybrid Observers A. Bouajjani, R. Echahed and R. Robbana Theory 1 On the Random Walk Method for Protocol Testing M. Mihail and C.H. Papadimitriou An Automata-Theoretic Approach to Branching-Time Model Checking 142 O. Bernholtz, M.Y. Vardi and P. Wolper

7 VIII Realizability and Synthesis of Reactive Modules A. Anuchitanukul and Z. Manna Model Checking of Macro Processes H. Hungar Applications Methodology and System for Practical Formal Verification of Reactive Hardware L Beer, S. Ben-David, D. Geist, R. Gewirtzman and M. Yoeli Modeling and Verification of a Real Life Protocol Using Symbolic Model Checking V.G. Naik and A.P. Sistla Verification of a Distributed Cache Memory by Using Abstractions S. Graf Invited Talk Beyond Model Checking Z. Manna Theory 2 Models Whose Checks Don't Explode R.P. Kurshan On the Automatic Computation of Network Invariants F. Balarin and A.L. Sangiovanni-Vincenlelli Hardware Verification 1 Ground Temporal Logic: A Logic for Hardware Verification D. Cyrluk and P. Narendran A Hybrid Model for Reasoning about Composed Hardware Systems E. T. Schubert Symbolic Verification 2 Composing Symbolic Trajectory Evaluation Results S. Hazelhurst and C.-].H. Seger The Completeness of a IIardware Inference System Z. Zhu and C.-J.H. Seger Efficient Model Checking by Automated Ordering of Transition Relation Partitions D. Geist and L Beer

8 Ix The Verification Problem for Safe Replaceability V. Singhal and C. Pixley Model Checking 1 Formula-Dependent Equivalence for Compositional CTL Model Checking 324 A. Aziz, T.R. Shiple, V. Singhal and A.L. Sangiovanni-Vincentelli An Improved Algorithm for the Evaluation of Fixpoint Expressions D.E. Long, A. Browne, E.M. Clarke, S. Jha and W.R. Marrero Incremental Model Checking in the Modal Mu-Calculus O.V. Sokolsky and S.A. Smolka Improving Efficiency Performance Improvement of State Space Exploration by Regular and Differential Hashing Functions B. Cousin and J. Hdlary Combining Partial Order Reductions with On-the-Fly Model-Checking D. Peled Improving Language Containment Using Fairness Graphs R. Hojati, R. Mueller-Thuns and R.I(. Brayton A Parallel Algorithm for Relational Coarsest Partition Problems and Its Implementation L Lee and S. Rajasekaran Model Checking 2 Another Look at LTL Model Checking E. Clarke, O. Grumberg and K. Hamaguchi The Mobility Workbench: A Tool for the Pi-Calculus B. Victor and F. Moller Hardware Verification 2 Compositional Semantics of Esterel and Verification by Compositional Reductions R. de Simone and A. Ressouche Model Checking Using Adaptive State and Data Abstraction D. Dams, R. Gerlh, G. Db'hmen, R. Herrmann, P. Kelb and H. Pargrnann Automatic Verification of Timed Circuits T.G. Rokicki and C.J. Myers