2018 MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS

Transcription

1 FINAL PROGRAMME 25 th International Conference MIXDES 2018 MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS Gdynia, Poland June 2018

2 th 25 International Conference MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS Gdynia, Poland June 2018 MIXDES 2018 Timetable Day 1 st Thursday, June 21, 2018 Room A Room B Room C 8:30 Conference Opening 8:40 Plenary Session I 9:40 Vendor Presentation 10:00 Session 1 (Part 1) Session 3 (Part 1) Special Session I (Part 1) 11:00 Coffee Break 11:20 Session 1 (Part 2) Session 3 (Part 2) Special Session I (Part 2) 13:00 Lunch 14:00 Session 9 Session 8 Session 6 15:20 Coffee Break 19:00 Welcome Party Day 2 nd Friday, June 22, 2018 Room A Room B Room C 8:30 Plenary Session II 10:00 Session 1 (Part 3) Session 2 (Part 1) IEEE EDS Poland Meeting 11:00 Coffee Break 11:20 Session 1 (Part 4) Session 2 (Part 2) Special Session II (Part 1) 13:00 Lunch 14:00 Tourist Activities Day 3 rd Saturday, June 23, 2018 Room A Room B Room C 8:15 Plenary Session III 9:50 Session 1 (Part 5) Session 7 (Part 1) Special Session II (Part 2) 11:10 Coffee Break 11:30 Session 1 (Part 6) & Session 4 Session 7 (Part 2) Innoreh Project Meeting 13:00 Lunch 14:00 Introduction to Poster Session 15:30 Coffee Break during the Poster Session 19:00 Closing Ceremony & Conference Banquet at ship-museum Dar Pomorza

3 WELCOME TO MIXDES 2018 This year the International Conference "Mixed Design of Integrated Circuits and Systems" celebrates its 25 th edition. For the past twenty four years the conference has been a unique forum for promoting different approaches to mixed VLSI design and an esteemed venue for presenting multidisciplinary research. This year we meet together in Gdynia, the town which is an important seaport on the south coast of the Baltic Sea. MIXDES 2018 consists of plenary lectures, regular, special and poster sessions focusing on recent trends and advances on all aspects of main conference topics, reviewed and selected from all submissions from 26 countries. During the plenary lectures, the following 8 invited papers will be presented: Artificial Intelligence Contribution to ehealth Applications Joan Cabestany (Universitat Politecnica de Catalunya, Spain) Commissioning and First User Operation of European XFEL Holger Schlarb (DESY, Germany) Footprints of RF CMOS Compact Modeling Technology: From Wireless Communication to IoT Applications Sadayuki Yoshitomi (Toshiba, Japan) Learning Robust Feature Representations in Deep Networks for Image Classification Breton Minnehan and Andreas Savakis (Rochester Institute of Technology, USA) Modern Physical Verification for Advanced Technology Nodes Wojciech Wójciak (Cadence, USA) Qualification of Electronic Components/Systems for a Radiation Environment of Particle Accelerators: When Standards Do Not Exist Sławosz Uznański (CERN, Switzerland) Towards a World of More Functions in Integrated Sustainable Systems Simon Deleonibus (CEA, France) Virtual Prototyping of µ-structured Devices and Systems by High-Fidelity Predictive Simulation Gerhard Wachutka (Technische Universitaet Muenchen, Germany) The program includes 2 special sessions, aiming at complementing the regular program with emerging topics of interest to the circuit design community: Compact Modeling for Characterization and Design of Micro- and Nanoelectronic Systems organised by Daniel Tomaszewski (Institute of Electron Technology, Poland) and Władysław Grabiński (GMC, Switzerland) Large Scale Research Facilities organised by Stefan Simrock (ITER, France) and Dariusz Makowski (Lodz University of Technology, Poland) In addition to the technical sessions, the conference attendees will have an opportunity to participate (free of charge) in an EDS Distinguished Lecturer Mini-Colloquium: "SiC: technology, devices, modeling", organized by ED Poland Chapter with collaboration of Institute of Electron Technology, Warsaw, Poland and Gdynia Maritime University, that will take place on June 20 th at the Gdynia Maritime University. The organisers would like to thank all the distinguished scientists who have supported the conference by taking part in the International Programme Committee and reviewing the contributed papers. We hope that you will enjoy your visit to Gdynia and next year we invite you to Rzeszów to continue our tradition of visiting the most beautiful places in Poland. Yours Sincerely, MIXDES 2018 Organising Committee 1

4 ORGANIZED BY Department of Microelectronics and Computer Science, Lodz University of Technology, Poland Department of Marine Electronics, Gdynia Maritime University, Poland Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, Poland IN COOPERATION WITH Poland Section IEEE - ED & CAS Chapter Section of Microelectronics and Electron Technology of the Committee of Electronics and Telecommunication of the Polish Academy of Sciences Commission of Electronics and Photonics of Polish National Committee of International Union of Radio Science - URSI SUPPORTED BY Silicon Creations ORGANISING COMMITTEE Prof. A. Napieralski (Chairman) Dr. M. Orlikowski (Secretary) Dr. M. Napieralska (Vice-Chairman) Dr. G. Jabłoński Department of Microelectronics and Computer Science, Lodz University of Technology, Poland Prof. K. Górecki Dr. J. Dąbrowski Department of Marine Electronics, Dr. D. Bisewski Gdynia Maritime University, Poland Prof. W. Kuźmicz Institute of Micro- and Optoelectronics, Warsaw University of Technology, Poland 2

5 PROGRAMME COMMITTEE Prof. M. Bucher Technical University of Crete, Greece Prof. J. Cabestany Universitat Politecnica de Catalunya, Spain Prof. J. Collet LAAS - CNRS, Toulouse, France Prof. A. Dąbrowski Poznan University of Technology, Poland Prof. G. De Mey University of Ghent, Belgium (Vice-Chairman) Prof. J. Deen McMaster University, Canada Prof. M.H. Fino Universidade Nova de Lisboa, Portugal Dr. D. Foty Gilgamesh Associates, USA Prof. L. Golonka Wrocław University of Science and Technology, Poland Prof. K. Górecki Gdynia Maritime University, Poland Dr. W. Grabiński GMC, Switzerland Prof. P. Gryboś AGH University of Science and Technology, Poland Prof. V. Hahanov Kharkiv National University of Radioelectronics, Ukraine Prof. A. Handkiewicz Poznan University of Technology, Poland Prof. A. Hatzopoulos Aristotle University of Thessaloniki, Greece Dr. S. Hausman Lodz University of Technology, Poland Dr. G. Jabłoński Lodz University of Technology, Poland Prof. A. Jakubowski Warsaw University of Technology, Poland Prof. A. Kos AGH University of Science and Technology, Poland Prof. W. Kuźmicz Warsaw University of Technology, Poland (Programme Chairman) Prof. C. Lallement Strasbourg University, France Prof. M. Lobur State University Lviv, Ukraine Dr. M.M. Louerat Université Pierre et Marie Curie, Paris, France Prof. T. Łuba Warsaw University of Technology, Poland Prof. B. Macukow Warsaw University of Technology, Poland Prof. J. Madrenas Universitat Politecnica de Catalunya, Spain Prof. A. Martinez LAAS - CNRS, Toulouse, France (Honorary Chairman) Prof. A. Materka Lodz University of Technology, Poland Prof. W. Mathis Leibniz University of Hannover, Germany Prof. J.M. Moreno Universitat Politecnica de Catalunya, Spain Dr. M. Napieralska Lodz University of Technology, Poland Prof. A. Napieralski Lodz University of Technology, Poland (General Chairman) Prof. J. Nishizawa Semiconductor Research Institute, Japan Dr. J.L. Noullet INSA de Toulouse, France Prof. L. Opalski Warsaw University of Technology, Poland Prof. A. Pfitzner Warsaw University of Technology, Poland Prof. E. Piętka Silesian University of Technology, Poland Prof. W. Pleskacz Warsaw University of Technology, Poland Dr. B.F. Romanowicz Nano Science and Technology Institute, USA Prof. J.A. Rubio Universitat Politecnica de Catalunya, Spain Prof. J. Rutkowski Silesian University of Technology, Poland Prof. A. Rybarczyk Poznan University of Technology, Poland 3

6 Dr. J.-M. Sallese Swiss Federal Institute of Technology, Switzerland Prof. D. Sankowski Lodz University of Technology, Poland Dr. M. Schwarz Robert Bosch GmbH, Germany Prof. N. Stojadinović University of Niš, Serbia Prof. V. Székely Technical University of Budapest, Hungary Prof. T. Szmuc AGH University of Science and Technology, Poland Dr. P. Śniatała Poznań University of Technology, Poland Prof. M. Tadeusiewicz Lodz University of Technology, Poland Dr. D. Tomaszewski Institute of Electron Technology, Warsaw, Poland Dr. P. Tounsi INSA de Toulouse, France Dr. M. Turowski Silvaco Inc., USA Prof. R. Ubar Tallinn Technical University, Estonia Prof. G. Wachutka Technische Universitaet Muenchen, Germany Prof. K. Wawryn Technical University of Koszalin, Poland Prof. B. Więcek Lodz University of Technology, Poland Prof. S. Yoshitomi Toshiba Corporation, Japan Prof. J. Zarębski Gdynia Maritime Academy, Poland Prof. M. Zubert Lodz University of Technology, Poland MAIN TOPICS 1. Design of Integrated Circuits and Microsystems Design methodologies. Digital and analog synthesis. Hardware-software codesign. Reconfigurable hardware. Hardware description languages. Intellectual property-based design. Design reuse. 2. Thermal Issues in Microelectronics Thermal and electro-thermal modelling, simulation methods and tools. Thermal mapping. Thermal protection circuits. 3. Analysis and Modelling of ICs and Microsystems Simulation methods and algorithms. Behavioural modelling with VHDL-AMS and other advanced modelling languages. Microsystems modelling. Model reduction. Parameter identification. 4. Microelectronics Technology and Packaging New microelectronic technologies. Packaging. Sensors and actuators. 5. Testing and Reliability Design for testability and manufacturability. Measurement instruments and techniques. 6. Power Electronics Design, manufacturing, and simulation of power semiconductor devices. Hybrid and monolithic Smart Power circuits. Power integration. 7. Signal Processing Digital and analog filters, telecommunication circuits. Neural networks. Artificial intelligence. Fuzzy logic. Low voltage and low power solutions. 8. Embedded Systems Design, verification and applications. 9. Medical Applications Medical and biotechnology applications. Thermography in medicine. 4

7 The conference will take place in: Hotel Mercure Gdynia Centrum ul. Armii Krajowej Gdynia Tel CONFERENCE CENTER MIXDES 2018 ACCOMMODATION The accommodation will be offered for the Conference participants at conference site in Hotel Mercure Gdynia Centrum located in the Gdynia city centre. Please note that the MIXDES 2018 Conference participants reserve the hotel rooms on their own. REGISTRATION The standard conference registration fee includes the admission to the conference, a copy of the Book of Abstracts, Conference Proceedings CD-ROM and other conference materials, tourist activities, all lunches, the welcome party, the banquet, coffee and tea during the breaks. To encourage students to participate in the Conference, the student registration fee is available (welcome party and banquet not included). The Book of Abstract and other conference materials will be distributed to participants at the registration desk. The Conference Proceedings CD-ROM will be distributed to the participants after the conference. The registration desk will be located in the conference center. It will be working during the following hours: 21 June (Thursday) 07:30 13:00 h, 14:00 17:00 h 22 June (Friday) 08:00 11:00 h 23 June (Saturday) 08:00 13:00 h, 14:00 16:00 h GENERAL INFORMATION AND INQUIRIES Dr. Mariusz Orlikowski Lodz University of Technology Department of Microelectronics and Computer Science ul. Wólczańska 221/223 (building B18), Łódź, Poland mixdes2018@dmcs.p.lodz.pl tel.: +48 (0) www: fax: +48 (0)

8 THE CITY OF GDYNIA Gdynia is a city located in northern Poland, and is a part of the 3-city agglomeration (Tri-City or in Polish Trójmiasto). Tri-City consists of three Polish towns (Gdynia, Gdańsk and Sopot) on the Gdańsk Bay, characterized by a close cooperation between the towns and a common infrastructure. With a city population of over 240,000 Gdynia is the 12 th largest city in Poland. Gdynia is the newest part of 3-city and probably the most dynamic, with lots of international and profitable companies, so the unemployment rate is lower than 3%. At first, Gdynia was a small fishing village. In 1920 a decision was made on the building of a Polish port on the Gdańsk Bay and nowadays Gdynia is a large port located on the Baltic Sea with a transhipment reaching over thousand tons. Moreover, the city has huge traditions in maritime education and is home to the Gdynia Maritime University. The University is the largest state school of higher maritime education in Poland and one of the largest in Europe. Since 1920 the University has been preparing graduates for officer positions on board merchant marine vessels and for managerial positions at the land-based institutions and companies representing the maritime industry and seaside regions. The University four Faculties offer degree in Navigation, Marine Engineering, Electrical Engineering and Entrepreneurship and Quality Science. At present Gdynia Maritime University provides studies for 5000 students. Gdynia is a popular tourist destination thanks to its attractive location on the Baltic Sea. The city has excellent conditions for sailing enthusiasts, with a modern marina. Unrivalled, the most important recreational area of Gdynia is the public part of the port. A popular place for walks is Aleja Jana Pawła II (John Paul II Avenue), which runs along port basins, many small bars, fish restaurants and a small park. Mass events, concerts and other cultural events take place here. The top tourist attractions in Gdynia, just to mention: Gdynia Aquarium an unusual place in the city center, where can be found unusual species of fish, amphibians and reptiles from different parts of the world, such as Africa, North America or the north of Europe. Naval Museum with the old warship destroyer Lightning (Błyskawica) from 1937, which was a participant of sea convoys in the Atlantic during the II World War. Ship-museum Dar Pomorza called White Frigate, built in 1909 at the shipyard in Hamburg, purchased in 1929 from social donations for the needs of maritime education in Poland. Gdynia City Museum tens of thousands of objects gathered in the Museum are a source of knowledge about the past and today s life of the city. Stone Mountain (Kamienna Góra) the best view over Gdynia located about half a kilometer from John Paul II Avenue and the port, the highest point is at 52 m above sea level and there is an excellent view of the bay, port and mainland. Cliff in Orłowo (Klif Orłowski) a large cliff, rising towards the sea about 60 m. 6

9 Gdynia is known in Europe for the organization of exceptional cultural events, such as the Open'er Festival, where the best music artists from around the world play. In addition, every year the Film Festival in Gdynia is organized - the largest festival of filmmakers in Poland and the only one that has been promoting large-scale Polish cinematography in Europe for decades. Gdynia is also perceived as a shopping paradise. Among the recommendable shops is the Riviera shopping center. It is the largest shopping center in northern Poland. More information: TOURIST ACTIVITIES The guided tour will start at 14:00 in front of the conference site. At first, the guides will walk you to the Emigration Museum. Poland has one of the world s biggest diaspora population and you can learn all about it here. Thereafter we will walk around the city to finish at the Gdynia Seafront Promenade, running right from the beach to the famous Gdynia Maritime Monument, the aquarium and the harbour. Our excursion will finish in front of the ship Dar Pomorza, which in 1982 was handed over to the Maritime Museum and now is one of the main attractions of Gdynia. On Saturday the Conference Closing Ceremony and Banquet will take place aboard of this ship. The guided tour will finish approximately at 5 pm. 7

10 TRANSPORT The main conference building (hotel Mercure Gdynia Center) is located about 1 km from Gdynia Główna Railway Station and about 22 km from Gdansk Lech Walesa Airport. There are direct trains from Gdansk Lech Walesa Airport to Gdynia Główna Railway Station. The journey time is about 25 minutes and the ticket price is 6.50 PLN. Please check your connections at For the trip from Gdynia Główna Railway Station to hotel Mercure Gdynia Center you can take the trolleybus numbers: 21 (direction Sopot Reja) 23 (direction Kacze Buki) 24 (direction Dąbrowa Miętowa) 30 (direction Cisowa Sibeliusa) The journey time is about 7 minutes and the ticket price is 3.20 PLN. The trolleybus destination station name is: Skwer Kościuszki-InfoBox. Please check your connections at The hotel is located 200 m from the trolleybus stop - see the map below. 8

11 Taxi is also available, the price from Gdynia Główna Railway Station to hotel Mercure Gdynia Center is about 15 PLN. Caution! The taxi ride time is close to the time of public transportation. We recommend using corporate taxis, which may be requested by phone call: AD-MIR Taxi, City Plus Taxi, or Hallo Express Taxi, or Merc Taxi, or There are direct trains from Warsaw Chopin Airport to Warszawa Centralna Railway Station (the railway line S3, direction Wieliszew). The journey time is about 25 minutes and the ticket price is 4.40 PLN. Please check your connections at For the trip from Warszawa Centralna Railway Station to Gdynia Główna Railway Station you can use trains, as shown below: Train type Direction Warszawa Centralna Gdynia Główna Train type Direction Warszawa Centralna Gdynia Główna TLK EIP EIP EIP EIP TLK EIP EIP EIP 6:00 6:20 7:20 8:20 9:20 9:55 10:20 11:20 12:20 10:23 9:34 10:37 11:34 12:37 14:31 13:34 14:37 15:34 EIP TLK EIP EIP EIP EIP TLK EIP 14:20 14:35 15:30 16:20 17:20 18:30 19:28 19:38 17:33 19:03 18:47 19:34 20:34 21:45 23:33 22:52 In Gdynia, purchase of public transport tickets including buses and trolleybuses is possible at press points and from the driver of the vehicle (one must get in the vehicle with the first door). Tickets for transport must be registered in the vehicle as soon as possible. Price of ticket [PLN] Full price Reduced price Ticket pass from driver Single trip valid on standard lines (5 x 1.6 PLN) 1 hour ticket valid on standard lines (2 x 1.9 PLN) 1 hour ticket or single trip valid on night, rapid and standard lines 24 hour ticket valid on night, rapid and standard lines (2 x 2.1 PLN) (2 x 6.5 PLN) 9

12 PROGRAMME OF THE CONFERENCE The programme of the MIXDES 2018 Conference will include oral presentations of contributed and invited papers, special sessions and poster session. Except for the plenary and poster sessions, the programme of the conference will be divided into three parallel sessions, in accordance with discussed topics. The language of the Conference is English, neither translation nor interpretation will be provided. The time of oral presentations: for invited papers: min. for presentation and 5-10 min. for questions, for regular papers: 15 min. for presentation and 5 min. for questions. Poster presentations: The authors presenting their papers at the poster sessions will have at their disposal an A0 panel with all the accessories necessary to attach your poster. On the third conference day (June 23 rd after lunch, an introduction to poster session is planned, in which the authors are asked to present their work very shortly in front of the audience: 2-3 slides, within 1-2 minutes. The questions and discussions will be continued at the poster panels. Lunches: Lunches will be served each day at the conference center at the times indicated in the programme. Welcome Party and Conference Banquet: The Welcome Party will be organised on Thursday (the first conference day) at 19:00 at the conference center. The Conference Banquet and the Awards Ceremony will take place on Saturday at 19:00 at ship-museum Dar Pomorza (see map at the end of the programme for the location). Note that the Welcome Party and the Conference Banquet are not included in the student registration fee. IMPORTANT PHONE NUMBERS Ambulance 999 Fire Brigade 998 Police 997 Emergency phone

13 BANKING Foreign exchange facilities are available at major airports and at larger hotels, as well as in many private offices, called Kantor. Credit cards can be used in many places such as banks, hotels, car-rental offices, restaurants, and large shops. Approximate currency exchange rate: 1 = 4.28 PLN, 1 $ = 3.63 PLN (for the up-to-date information refer to Credit cards: Visa and MasterCard are the most common cards. However, other cards might be accepted. Currency: Generally, everywhere in Poland you pay in Polish zlotys. The currency units are złoty (zł, PLN) and grosz (gr), 1 zł = 100 gr. The Polish zloty is a fully convertible currency internally in Poland. WEATHER June in Poland is generally sunny, with some showers, the temperatures can be typically 15 to 28 C during days. During nights, the temperature can go down to 8-10 C. So, we can suggest you to bring summer clothes, with a quite warm jacket or pullover, and an umbrella. 11

14 Time First day: June 21 st 2018 (Thursday) Room A 08:30 Conference Opening Chairmen: Prof. Gilbert De Mey, Prof. Wiesław Kuźmicz and Prof. Andrzej Napieralski 08:40 Plenary Session I Chairman: Prof. A. Napieralski Towards a World of More Functions in Integrated Sustainable Systems S. Deleonibus (LETI-CEA Grenoble, France) Modern Physical Verification for Advanced Technology Nodes W. Wójciak (Cadence, USA) 09:40 Vendor Presentation Silicon Creations Corporate Overview - Innovative Circuit Solutions for High Performance Applications A. Gołada (Silicon Creations, Poland) 10:00 Session 1 (Part 1): Design of Integrated Circuits and Microsystems Chairman: Prof. Paweł Gryboś A Discrete Implementation of a Semi-Floating Gate Front End for Resonating Sensors L. Marchetti, Y. Berg, M. Azadmehr (Univ. College of Southeast Norway, Norway) A Low Power Programmable Gain Integrated Front-End for Electromyogram Signal Sensing E.A. Hamed, M. Atef, M. Abbas (Assiut Univ., Egypt) Using Verilog-to-Routing Framework for Coarse-Grained Reconfigurable Architecture Routing Z. Mudza (Lodz Univ. of Techn., Poland) 11:00 Coffee Break 11:20 Session 1 (Part 2): Design of Integrated Circuits and Microsystems Chairman: Prof. Krzysztof Górecki A New Semi-Digital Low Power Low Jitter and Fast PLL In 0.18µm Technology F. Noruzpur, S. Mahdavi, M. Poreh, S. Tayyeb Ghasemi, M. Zeynali Golmarz (Urmia Graduate Inst., Iran) A Zener-Based Voltage Reference Design Compensated Using a VBE Stack V. Bucur, G. Banarie (Analog Devices Inc., Ireland), S. Marinca, M. Bodea (Univ. Politehnica of Bucharest, Romania) 12

15 First day: June 21 st 2017 (Thursday) 13:00 Lunch MIXDES 2018 Design of Matrix Controller for Hybrid Pixel Detectors B. Tutro, K. Urbański, R. Szczygieł (AGH Univ. of Science and Techn., Poland) Low Power, Low Chip Area, Programmable PID Controller Realized in the CMOS Technology T. Talaśka, R. Długosz (UTP Univ. of Science and Techn., Poland) 14:00 Session 9: Medical Applications Chairman: Prof. Witold Pleskacz Evaluation of Pattern Recognition in Myoelectric Signal Using Netlab GLM G. Souza, R. Moreno, T. Pimenta (Federal Univ. of Itajubá, Brazil) Lab-on-chip for Mechanical Characterization of Oocyte A. Pokrzywnicka, D. Lizanets (Wrocław Univ. of Science and Techn., Poland), P. Śniadek (Poznan Univ. of Life Sciences, Poland), R. Walczak (Wrocław Univ. of Science and Techn., Poland) Multi-sensor Data Fusion for Object Rotation Estimation J. Napieralski, W. Tylman (Lodz Univ. of Techn., Poland) Optimizing the Automated Detection of Atrial Fibrillation Episodes in Long-term Recording Instrumentation J. Wrobel, K. Horoba, A. Matonia, T. Kupka, N. Henzel, E. Sobotnicka (ITAM Zabrze, Poland) 15:20 Coffee Break 19:00 Welcome Party 13

16 Time First day: June 21 st 2018 (Thursday) Room B 10:00 Session 3 (Part 1): Analysis and Modelling of ICs and Microsystems Chairman: Dr. Paweł Śniatała Characterization of MTL Hybrid Circuits with Stochastic Parameters through SDAE Approach L. Brancik, E. Kolarova, M. Sigmund (Brno Univ. of Techn., Czech Republic) Different Methods of MEMS Gyroscope Simulations in Matlab/SIMULINK J. Nazdrowicz (Lodz Univ. of Techn., Poland) Feasibility Studies of EEPROM Implementations in VESTIC Technology B. Dec, A. Pfitzner (Warsaw Univ. of Techn., Poland) 11:00 Coffee Break 11:20 Session 3 (Part 2): Analysis and Modelling of ICs and Microsystems Chairman: Dr. Wojciech Wójciak On Advanced Current Conveyor Applications Having Capacitor Connected to Current Input Terminal R. Sotner, J. Petrzela, J. Jerabek, L. Langhammer (Brno Univ. of Techn., Czech Republic), T. Dostal (College of Polytechnics Jihlava, Czech Republic) On the Novel Approach of Parallel Coupled-Line Bandpass Filters that Have Diverse-Wavelenght Impedance-Scaling I/O Transformers M.B. Zaradny (Wrocław Univ. of Science and Techn., Poland) 13:00 Lunch Optimization of the VeSFET Structure Dedicated to Basic Logic Cells in VeSTIC Technology M. Pałgan, A. Pfitzner (Warsaw Univ. of Techn., Poland) Parallel Critical Path Tracing Fault Simulation in Sequential Circuits J. Kõusaar, R. Ubar, S. Kostin, S. Devadze, J. Raik (Tallinn Univ. of Techn., Estonia) 14:00 Session 8: Embedded Systems Chairman: Dr. Daniel Tomaszewski Adaptive Wireless Lighting System M. Zbieć, M. Jakubowski, D. Obrębski, P. Boguszewicz, K. Zaraska, W. Grzesiak, P. Guzdek, P. Maćków, G. Kołaszczyński (Institute of Electron Techn., Poland), D. Solnica, P. Iwanicki (Lars Lighting sp. z o.o., Poland) 14

17 First day: June 21 st 2017 (Thursday) MIXDES 2018 Alvis Data Graphs M. Szpyrka (AGH Univ. of Science and Techn., Poland) IP Core of Coprocessor for Multiple-Precision-Arithmetic Computations K. Rudnicki (Brightelligence Inc., Glasgow, UK, Poland), T. Stefanski (Gdansk Univ. of Techn., Poland) Towards Embedded Systems Formal Verification. Translation from SysML into Petri Nets W. Szmuc, T. Szmuc (AGH Univ. of Science and Techn., Poland) 15:20 Coffee Break 19:00 Welcome Party 15

18 Time First day: June 21 st 2018 (Thursday) Room C 10:00 Special Session I (Part 1): Compact Modeling for Characterization and Design of Micro- and Nanoelectronic Systems Chairman: Dr. Władysław Grabiński Qucs Frequency Domain Non-Linear Compact Modelling and Simulation of IC Spiral Inductors on Silicon M. Brinson (London Metropolitan Univ., UK) On the Use of Modified Biolek Window for Memristor Modeling in VerilogA M.H. Fino, T. Pina (Univ. Nova de Lisboa, Portugal) Process and Device Simulation of Schottky Barrier MOSFETs for Analysis of Current Injection M. Schwarz (Robert Bosch GmbH, Germany), L.E. Calvet (Univ. Paris-Sud, France), J.P. Snyder (JCap, LLC, USA), T. Krauss, U. Schwalke (Tech. Univ. Darmstadt, Germany), A. Kloes (Tech. Hochschule Mittelhessen, Germany) 11:00 Coffee Break 11:20 Special Session I (Part 2): Compact Modeling for Characterization and Design of Micro- and Nanoelectronic Systems Chairman: Dr. Mike Schwarz An Area Equivalent WKB Approach to Calculate the B2B Tunneling Probability for a Numerical Robust Implementation in TFET Compact Models F. Horst, A. Farokhnejad (Tech. Hochschule Mittelhessen, Germany), B. Iniguez (Univ. Rovira i Virgili, Spain), A. Kloes (Tech. Hochschule Mittelhessen, Germany) 13:00 Lunch Analog RF and mm-wave Design Tradeoff in UTBB FDSOI: Application to a 35 GHz LNA S. El Ghouli (STMicroelectronics, France), W. Grabiński (GMC, Switzerland), J.-M. Sallese (EPFL, Switzerland), A. Juge (STMicroelectronics, France), C. Lallement (Univ. Strasbourg, France) An Effect of Device Topology in VeSTIC Process on Logic Circuit Operation: A Study Based on Ring Oscillator Operation Analysis D. Tomaszewski, K. Domański, G. Głuszko, A. Sierakowski, D. Szmigiel (Institute of Electron Techn., Poland) 16

19 First day: June 21 st 2017 (Thursday) 14:00 Session 6: Power Electronics Chairman: Prof. Gilbert De Mey MIXDES 2018 Monolithic Complementary Multi-terminal RC-IGBT Chips for Compact Multi-phase Power Converter A. Lale (LAAS-CNRS/LAPLACE, France), A. Bourennane (LAAS-CNRS, France), F. Richardeau (LAPLACE-CNRS, France) New Model of Solar Cells for SPICE J. Dąbrowski, E. Krac, K. Górecki (Gdynia Maritime Univ., Poland) Universal Behavioural Model for SiC Power MOSFETs under Forward Bias A. Stefanskyi, Ł. Starzak, A. Napieralski (Lodz Univ. of Techn., Poland) 15:20 Coffee Break 19:00 Welcome Party 17

20 Time Second day: June 22 nd 2018 (Friday) Room A 08:30 Plenary Session II: General Invited Papers Chairman: Prof. Wiesław Kuźmicz Footprints of RF CMOS Compact Modeling Technology: From Wireless Communication to IoT Applications S. Yoshitomi (Toshiba, Japan) Artificial Intelligence Contribution to ehealth Applications J. Cabestany (Univ. Politecnica de Catalunya, Spain), D. Rodriguez-Martin (SENSE4CARE SL, Spain), C. Pérez, A. Sama (Univ. Politecnica de Catalunya, Spain) Qualification of Electronic Components/Systems for a Radiation Environment of Particle Accelerators: When Standards Do Not Exist - High Energy Physics S. Uznański (CERN, Switzerland) 10:00 Session 1 (Part 3): Design of Integrated Circuits and Microsystems Chairman: Dr. Paweł Śniatała Ka Band Digitally Controlled Oscillator for FMCW Radar in 130 nm SiGe BiCMOS Technology I. Butryn, Ł. Wiechowski, D. Pietron, W. Pleskacz (Warsaw Univ. of Techn., Poland) Multithreshold Pattern Recognition Algorithm for Charge Sharing Compensation in Hybrid Pixel Detectors P. Otfinowski, A. Krzyżanowska, P. Gryboś, R. Szczygieł (AGH Univ. of Science and Techn., Poland) Redundant Double Conversion Based Digital Background Calibration of SAR ADC with Convergence Acceleration and Assistance X. Ding, K. Hofmann (Tech. Univ. Darmstadt, Germany), L. Zhang, D. Yi, Y. Ma (Gree Electric Appliances Inc., China) 11:00 Coffee Break 11:20 Session 1 (Part 4): Design of Integrated Circuits and Microsystems Chairman: Prof. Adam Dąbrowski Application of Inkjet 3D Printing in MEMS Technique R. Walczak (Wrocław Univ. of Science and Techn., Poland) Design of FPGA-based Mealy FSMs with Counters A. Barkalov, L. Titarenko (Univ. of Zielona Gora, Poland), S. Chmielewski (State Univ. of Applied Sciences in Głogów, Poland), K. Mielcarek (Univ. of Zielona Gora, Poland) 18

21 Second day: June 22 nd 2018 (Friday) MIXDES 2018 Encoding of Terms in LUT-based Mealy FSMs A. Barkalov, L. Titarenko, M. Mazurkiewicz, K. Mielcarek (Univ. of Zielona Gora, Poland) Twofold State Assignment for LUT-based Mealy FSMs K. Mielcarek, L. Titarenko, A. Barkalov (Univ. of Zielona Gora, Poland) 13:00 Lunch 14:00 Tourist Activities 19

22 Time Second day: June 22 nd 2018 (Friday) Room B 10:00 Session 2 (Part 1): Thermal Issues in Microelectronics Chairman: Prof. Paweł Gryboś Determining Parameters of the Dual-Phase-Lag Model of Heat Flow M. Zubert, T. Raszkowski, J. Topiłko, Ł. Starzak, G. Jabłoński (Lodz Univ. of Techn., Poland), P. Janus (Institute of Electron Techn., Poland), M. Janicki, A. Napieralski (Lodz Univ. of Techn., Poland) Effective Temperature Control Approach for ICs A. Samake, P. Kocanda, A. Kos (AGH Univ. of Science and Techn., Poland) Investigation of the Influence of Thermal Phenomena on Dynamic Parameters of the IGBT P. Górecki (Gdynia Maritime Univ., Poland) 11:00 Coffee Break 11:20 Session 2 (Part 2): Thermal Issues in Microelectronics Chairman: Prof. Gilbert De Mey 13:00 Lunch Influence of Cooling Conditions of Power LEDs on Their Electrical, Thermal and Optical Parameters K. Górecki, P. Ptak (Gdynia Maritime Univ., Poland), M. Janicki, T. Torzewicz (Lodz Univ. of Techn., Poland) LED Characterization for Combined Electrical-Optical-Thermal LED Modeling G. Farkas, L. Gaal (Mentor Graphics, Hungary) More on Structural Information from Thermal Impedance Measurements in Time Domain F. Masana (Barcelona Semiconductors, Spain) Thermal-aware Floorplanning Guidelines for 3D ICs with Integrated Microchannels P. Zając (Lodz Univ. of Techn., Poland), M. Galicia (Motorola Solutions, Poland), A. Napieralski (Lodz Univ. of Techn., Poland) 14:00 Tourist Activities 20

23 Second day: June 22 nd 2018 (Friday) Time Room C MIXDES :00 IEEE EDS Poland Meeting 11:00 Coffee Break 11:20 Special Session II (Part 1): Large Scale Research Facilities Chairman: Dr. Stefan Simrock 13:00 Lunch Plasma Diagnostics for ITER: A Contribution to Solve the World s Energy Problems S. Simrock (ITER, France) Integration and Testing of Large Scale Diagnostic Systems P. Plewiński, D. Makowski, P. Perek, A. Napieralski (Lodz Univ. of Techn., Poland) Device Support for Giga-sampling Digitizers M. Basiuras, D. Makowski, P. Perek, A. Mielczarek, A. Napieralski (Lodz Univ. of Techn., Poland) ITER diagnostics: IFJ PAN contribution to design of the High Resolution Neutron Spectrometer (HRNS) and the Radial Neutron Camera (RNC) M. Scholz, D. Bocian (IFJ PAN, Poland) 14:00 Tourist Activities 21

24 Time Third day: June 23 rd 2018 (Saturday) Room A 08:15 Plenary Session III: General Invited Papers Chairman: Prof. Gilbert De Mey Learning Robust Feature Representations in Deep Networks for Image Classification B. Minnehan, A. Savakis (Rochester Inst. of Techn., USA) Virtual Prototyping of µ-structured Devices and Systems by High-Fidelity Predictive Simulation G. Wachutka (Tech. Univ. Muenchen, Germany) Commissioning and First User Operation of European XFEL H. Schlarb (DESY, Germany) 09:50 Session 1 (Part 5): Design of Integrated Circuits and Microsystems Chairman: Prof. Paweł Gryboś High-Speed 32*32 bit Multiplier in 0.18um CMOS Process E. Hosseini, M. Mousazadeh (Urmia Univ., Iran), A. Amini (Urumi Graduate Inst., Iran) No Static Power Excess Bias Voltage Monitoring Circuit (EBVMC) for SPAD Applications N. Lilic, R. Kappel, G. Roehrer (ams AG, Austria), H. Zimmermann (Tech. Univ. Wien, Austria) Performance Optimization of Implementation of Lattice Boltzmann Method in ARUZ G. Jabłoński, J. Kupis (Lodz Univ. of Techn., Poland) Two Step Power Attack on SHA-3 Based MAC C.-Y. Chu, M. Łukowiak (Rochester Inst. of Techn., USA) 11:10 Coffee Break 11:30 Sessions 1 (Part 6) & 4: Design of Integrated Circuits and Microsystems & Microelectronics Technology and Packaging Chairman: Prof. Sadayuki Yoshitomi Design of 4.5GHz, 64-bit Digital Comparator in 0.18µm CMOS Technology M. Ghasemzadeh, A. Amini, K. Hadidi (Urmia Univ., Iran) Topology-Driven Reliability Assessment of Integrated Circuits T. Hillebrand, S. Paul, D. Peters-Drolshagen (Univ. Bremen, Germany) 22

25 Third day: June 23 rd 2018 (Saturday) 13:00 Lunch MIXDES 2018 Investigation of Scaling and Temperature Effects in Total Ionizing Dose (TID) Experiments in 65 nm CMOS L. Chevas, A. Nikolaou, M. Bucher, N. Makris, A. Papadopoulou, A. Zografos (Tech. Univ. Crete, Greece), G. Borghello (Univ. degli Studi di Udine, Italy and CERN, Switzerland), H.D. Koch (Univ. de Mons, Belgium and CERN, Switzerland), F. Faccio (CERN, Switzerland) Photoelectric Measurements of the Modern Graphene-Insulator-Semiconductor (GIS) Test Structures K. Piskorski, H. Przewłocki (Institute of Electron Techn., Poland), V. Passi, J. Ruhkopf (Siegen Univ., Germany), M.C. Lemme (RWTH Aachen Univ., Germany) 14:00 Introduction to Poster Session Chairman: Prof. Witold Pleskacz Comparison of Methods of Fuzzy Functions Minimization A. Wielgus, H. Jatkowski (Warsaw Univ. of Techn., Poland) Design of a Wideband Low Noise Amplifier for a FMCW Synthetic Aperture Radar in 130 nm SiGe BiCMOS Technology D. Pietron, I. Butryn, Ł. Wiechowski, W. Pleskacz (Warsaw Univ. of Techn., Poland) High Resolution Latched Comparator Implemented in 22 nm FD-SOI Process Z. Jaworski (Warsaw Univ. of Techn., Poland) Low-Power 13-Bit DAC with a Novel Architecture in SA-ADC T. Aspokeh, A. Amini, A. Baradaranrezaeii, M. Yazdani (Urumi Graduate Inst., Iran) Parallel Asynchronous Winner Selection Circuit for Hardware Implemented Self-Organizing Maps T. Talaśka, M. Kolasa, R. Długosz (UTP Univ. of Science and Techn., Poland) Ultra Low-power, High-speed Digital Comparator M. Ghasemzadeh, S. Najafibisfar, A. Amini (Urumi Graduate Inst., Iran) Analysis of the Principles of the Relational Network as a Multilevel Structure of Natural Language Modeling G. Chetverykov, I. Gruzdo (Kharkiv National Univ. of Radio Electronics, Ukraine), G. Sklyar (Univ. of Szczecin, Poland), A. Puzik (Kharkiv National Univ. of Radio Electronics, Ukraine) 23

26 MEMS Gyroscope FEM Modeling and Simulation J. Nazdrowicz (Lodz Univ. of Techn., Poland) Third day: June 23 rd 2018 (Saturday) Reflow Oven for Heating and Soldering SMD and BGA Components A. Dąbrowski, P. Pawłowski (Poznan Univ. of Techn., Poland) Nonlinear Activation Functions for Artificial Neural Networks Realized in Hardware Z. Długosz (Poznan Univ. of Techn., Poland), R. Długosz (UTP Univ. of Science and Techn., Poland) Processing and Simulation of Output from Lab-on-a-Chip Devices in Cell Mechanical Analysis D. Lizanets, R. Walczak (Wrocław Univ. of Science and Techn., Poland) Computer-aided Diagnosis in Lungs Radiography P. Śniatała, A. Lis (Poznan Univ. of Techn., Poland), M. Konkol (Greater Poland Cancer Centre and Poznan Univ. of Medical Sciences, Poland) Diagnosis of Epilepsy Utilizing Time-Series Distribution of EEG Signals N. Khiabanmanesh, A. Amini (Urumi Graduate Inst., Iran), S. Mihandoost (Urmia Univ., Iran) Low Complexity Multichannel Neural Data Compression by Exploiting Spatial Signal Correlation P. Turcza, K. Duda (AGH Univ. of Science and Techn., Poland) Modelling and Cancellation of the Stimulation Artifact for ASIC-based Bidirectional Neural Interface K. Kołodziej, M. Szypulska, W. Dąbrowski, P. Hottowy (AGH Univ. of Science and Techn., Poland) Tests for Pilots Under Simulated Hypergravity Conditions - Technological Challenges and Research Methodology E. Sobotnicka, A. Sobotnicki, M. Czerw, G. Badura, M. Sobiech (ITAM Zabrze, Poland), M. Krej (Military Inst. of Aviation Medicine, Poland), L. Puchalska (Medical Univ. of Warsaw, Poland), Ł. Dziuda (Military Inst. of Aviation Medicine, Poland) 15:30 Coffee Break during Poster Session 19:00 Closing Ceremony & Conference Banquet 24

27 Third day: June 23 rd 2018 (Saturday) Time Room B MIXDES :50 Session 7 (Part 1): Signal Processing Chairman: Prof. Krzysztof Górecki A New Approach to Stability Evaluation of Digital Filters Ł. Grzymkowski, T. Stefanski (Gdansk Univ. of Techn., Poland) Chaotic Admittance with Commercially Available Active Elements J. Petrzela (Brno Univ. of Techn., Czech Republic) Design of a Third Order Butterworth Gm-C Filter for EEG Signal Detection Application A. Deo, S.K. Pandey, A. Joshi, S.K. Sharma, H. Shrimali (Indian Inst. of Techn. Mandi, India) Edge Aware Adaptive Filtering Method for Image Denoising W. Więcławek, M. Rudzki (Silesian Univ. of Techn., Poland) 11:10 Coffee Break 11:30 Session 7 (Part 2): Signal Processing Chairman: Prof. Adam Dąbrowski ECG Signal Enhancement with Serial Cascade OWA Filter T. Pander, T. Przybyła (Silesian Univ. of Techn., Poland) Modified Neighborhood Determination in Nonlinear State-Space Projective Filtering T. Przybyła, T. Pander (Silesian Univ. of Techn., Poland) 13:00 Lunch Nonparametric Spectral Analysis of Periodically Nonstationary Vibration Signals for Electrical Rotary Machines Testing I. Javorskyj (UTP Univ. of Science and Techn., Poland), P. Semenov (PORTTECHEXPERT, Ukraine), R. Yuzefovych (Karpenko Physico- Mechanical Inst. NAS, Ukraine), Z. Zakrzewski (UTP Univ. of Science and Techn., Poland) Study of Wireless Communications Link at Subterahertz Frequencies Using FET-based Detectors C. Kołaciński, D. Obrębski (Institute of Electron Techn., Poland), P. Zagrajek (Military Inst. of Aviation Medicine, Poland) 19:00 Closing Ceremony & Conference Banquet 25

28 Time Third day: June 23 rd 2018 (Saturday) Room C 09:50 Special Session II (Part 2): Large Scale Research Facilities Chairman: Dr. Dariusz Makowski Design of the Cost Effective AMC Board for Supporting RTM Units in LLRF Systems of the European Spallation Source P. Krawczyk, M. Gosk, D. Rybka, J. Kopeć, J. Szewiński, Z. Gołębiewski (NCBJ, Poland) Preliminary Design of the PolFEL Control, Data Acquisition and Synchronization Systems J. Szewiński, R. Nietubyć, P. Krawczyk, P. Czuma, K. Szamota-Leandersson, M. Dryll, M. Staszczak, M. Terka (NCBJ, Poland) Optimization of Class-D Amplifier Output Stage for Piezoelectric Actuator Control A. Szubert, D. Makowski, G. Jabłoński, A. Napieralski (Lodz Univ. of Techn., Poland) Phase Reference Line for the European Spallation Source: Concept and Status M. Żukociński, J. Berliński, K. Czuba, Ł. Czuba, E. Fistek, M. Kalisiak, T. Leśniak, M. Mielnik, K. Oliwa, R. Papis, D. Sikora, W. Wierba (Warsaw Univ. of Techn., Poland), R. Zeng, A. Sunesson (European Spallation Source ERIC, Sweden) 11:10 Coffee Break 11:30 Innoreh Project Meeting 13:00 Lunch 19:00 Closing Ceremony & Conference Banquet 26

29 Notes MIXDES

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31 Gdynia City Map Gdańsk, Sopot The Conference Site Hotel Mercure Gdynia Centrum Armii Krajowej 22 Train Station Gdynia Główna Closing ceremony Ship-museum Dar Pomorza ~200m

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