Communication & Semiconductor Technology (Digital & Analog IC Design)

Transcription

1 Name Designation Sunil Jadav Assistant Professor Date of joining 14 Feb 2011 Qualification Area of specialization Teaching experience Address:- B.Tech, M.Tech Communication & Semiconductor Technology (Digital & Analog IC Design) 06.5 Years MEMBERSHIP IN PROFESSIONAL ASSOCIATIONS 1. Member of IA ENG 2. Life Membership of ISTE 3. Life Member of ISCA 4. Member of Institution of Engineers (IE) THESIS /DISSERATION/PROJECT SUPERVISION EXPERIENCE M.Tech Project: 12 M.Tech Thesis: 13 LIST OF PUBLICATION/STC/FDP/ACHIVEMENTS INTERNATIONAL JOURNAL/CONFERENCE PUBLICATION 1. Sunil Jadav, Gargi Khanna, and Ashok Kumar, High Speed Energy Efficient signal Transmission on Global VLSI Interconnect, has been published in International Journal of Information and Telecommunication Technology, pp. No on Nov. 06, Sunil Jadav, Gargi Khanna, and Ashok Kumar, Analysis of Current mode Drivers for VLSI Interconnect System, has been published in Proc. 14 th IEEE/VSI VLSI Design and Test Symposium, Organized by the VLSI Society of India, on July 7-9, Sunil Jadav, Ashok Kumar, and Gargi Khanna, Low Power High Throughput Current Mode Signalling Technique For Global VLSI Interconnect, has been published in IEEE proceeding of ICCCT 10, pp. No , Sept, Sunil Jadav, Gaurav Saini, Pankaj Kr.Pal, Ashwani Rana, Leakage Behavior of Under Lap Finfet Structure: A simulation Study, has been published in IEEE proceeding of ICCCT 10, pp. No , Sept, 2010.

2 5. Atul Kumar Maurya, Sunil Jadav, Gagnesh Kumar, Devendra Giri Performance Analysis of Various Adiabatic Logic Circuits, has been published in International Conference on Advances in Computing & Communication proceeding of ICACC 11, pp. No , April, A. K. Nishad, R. Chandel, S. Jadav, D. Solanki Gate Diffusion Input: A Power Efficient Design Technique for VLSI Circuits, has been published in International Conference on Advances in Computing & Communication proceeding of ICACC 11, pp. No , April, Sunil Jadav, Vikrant, Munish Vashistha Design And Performance Analysis Of Ultra Low Power 6t SRAM Using Adiabatic Technique, has been published in International Journal of VLSI Design and Communication System (VLSICS) Vol.3, No.3, June 2012, pp. No Sunil Jadav, Puneet Goyal, Munish Vashistha, Rajeevan Chandel Study and Performance Analysis of Two Stage High Speed Operational Amplifier Using Indirect Compensation, has been published in International Journal Engineering Science and Technology, ISSN: , Vol.2, No. 4, August 2012, pp. No Nisha Goyal, Sunil jadav, Vikrant, Sandeep Kaushal, Khushboo Leakage Control in Logic Gates Using Optimum Body Bias has been published in International Conference on VLSI, MEMS & NEMS, Sunil Jadav, Munish Vashistah, Rajeevan Chandel Carbon Nanotube Based Delay Model For High Speed Energy Efficient on Chip Data Transmission Using: Current Mode Technique in Electrical and Electronics Engineering: An International Journal, published by wirellia journals, November Puneet Sunil Jadav, Munish Vashistah, Rajeevan Chandel, Study and Performance Analysis of Two Stage High Speed Operational Amplifier Using Indirect Compensation in IRACST- Engineeering science & technology : An international Journal, Vol 2 (4), Aug Sunil jadav, Munish Vashistah Design and Validation of threshold Model Using BSIM3v in International Journal of Advance Research in Electrical & Electronics engineering, Vol 2, Issue 10,oct Sunil jadv, Munish Vashishath Rajeevan Chandel A Superior Delay Estimation Model for VLSI Interconnect in Current Mode Signaling has published in World academy of science, engineering & technology, IJCE Vol. 9 (2), Jadav, S.; Vashishth, M.; Chandel, R., "Close form delay model for on chip signalling with resistive load termination using: Current mode technique," in Industrial and Information Systems (ICIIS), th International Conference on, vol., no., pp.1-6, Dec Nisha Yadav, Sunil jadav Efficient Energy Recovery in 9T Adiabatic SRAM Cell Using Body Bias has published in International Journal of VLSI Embedded System, March Jadav Sunil Vashishth Munish Chandel Rajeevan RLC equivalent RC delay model for global VLSI interconnect in current mode signaling in International Journal of Modelling & Simulation published by Taylor and Francis Group Shubham Tayal, Sunil jadav, Munish Vashisth IMPLEMENTATION OF LOGIC GATES USING CHARGE RECYCLING MTCMOS TECHNOLOGY in International Journal VLSI & Embedded System Vol 2 May 2014.

3 18. Sunil Jadav munish Vashisth, Rajeevan Chandel A Review on Global VLSI interconnect has published in YMCAUST Journal of Research, in PUBLICATIONS (NATIONAL CONFERENCE) 19. Paper Published on Graphene-Promising Candidate of Nanoelectronics in RAEEE- 09 December 23-24,2009,National Conference on Recent Advances in Electrical & Electronics Engineering,Organized by Department of Electrical Engineering National Institute of Technology Hamirpur, pp Paper Published on Recent Advances in High Resolution Lithography for VLSI Application in ETCC-08 December 30-31,2008,National Conference on Emerging Trends in Computing and Communication,Organized by Department of Computer Science National Institute of Technology Hamirpur, pp Paper Published on Low Power Ultra Wideband Amplifier for Wireless Application, in E-Manthan-2010 April 02-03,2010,National Conference on Electronics Comm. & Instrumentation Collaboration with IETE, Organized by Department of Electronics & Comm. College of Science & Engineering, Jhansi (U.P), pp Paper Published on Source Follower Based Track-and-Hold Circuit for High Speed Wireless Communication in ETIC-2010 march 27,2010,National Conference on Emerging Trends in IT and Computing, Organized by Department of IT/MCA Gurgaon Institute of Technology & Management, Gurgaon (Haryana), pp Paper Published on Analysis of Wideband Amplifier with Different Load Condition in ETIC-2010 march 27,2010,National Conference on Emerging Trends in IT and Computing, Organized by Department of IT/MCA Gurgaon Institute of Technology & Management, Gurgaon (Haryana), pp Paper Published on Low Power Track-and-Hold Circuit for Wideband Acquisition System in 0.18um CMOS Technology in NCWCVD-2010 march 27-28, 2010,National Conference on Wireless Communication & VLSI Design, Organized by Department of Electronics & Comm., Technically Supported By: IEEE (MP SS) Gwalior Engineering College, Gwalior (M.P) 25. Paper Published on Carbon Nanotubes & its Application for VLSI Interconnects in Wireless Comm. in E-Manthan-2010 April 02-03,2010,National Conference on Electronics Comm. & Instrumentation Collaboration with IETE, Organized by Department of Electronics & Comm. College of Science & Engineering, Jhansi (U.P), pp Paper Published on Chanel Width Tapering to Reduce the Delay and Power Dissipation in Domino CMOS Circuits in E-Manthan-2010 April 02-03,2010,National Conference on Electronics Comm. & Instrumentation Collaboration with IETE, Organized by Department of Electronics & Comm. College of Science & Engineering, Jhansi (U.P), pp

4 27. Nitin Goel, Shakuntla Boora & Sunil Jadav, Diagnose of Transformer Using DR Technique, National Conference on Recent Technologies in Electronics, VCE Meerut April Sunil Jadav, Gaurav Saini, Anand Pratap Singh and Nitin Goel, Investigation on Different Parasitic of Current Mode Receiver, National Conference on Recent Technologies in Electronics,VCE Meerut April Sunil jadav shubham tayal Power efficient 1bit comparator published in National conference at NIT HAMIRPUR HIMACHAL, AUG Sunil Jadav, vikrant, Munish Sub-threshold Leakage Reduction of 6T SRAM Cell Using Optimum Bulk Bias has published in proceeding of NATIONAL CONFERENCE AT DELHI NCRDE, 2013 LIST OF STC & FDP ATTENDED Attended workshop on Research issues in Modern VLSI Devices (RIMVD-09) organized by Department of Electronics and Communication Engineering, NIT Hamirpur (HP) held on Nov Attended workshop on Usages of E-Recourses organized by Central Library, NIT Hamirpur (HP) held on 09 Aug Attended workshop on Engineering Applications of EDA tools- Verilog and Spice (EDAT-09) organized by Department of Electronics and Communication Engineering NIT Hamirpur (HP) held on July, Attended workshop on Innovation in Technology organized by Continuing Education Centre, NIT Hamirpur (H.P) held on 05 th -08 th August Participated in Conducting a Lab session in Short Term Course on e- Communication & Its Applications (e-com 09) organized by Department of Electronics & communication Engineering, NIT Hamirpur, under TEQIP from 24 th to 28 th Feb Attended two week workshop on Nanotechnology & Embedded System organized by YMCAUST 23 rd July-3 rd Aug 12. Attended a two week Faculty Development Program on Entrepreneurship at UIET KUK. 08 th Jan -22 nd Jan Attended one week STC on Embedded systems and Hardware description language at NIT Hamirpur 20 th may-24 th may Attended on week STC on Emerging materials: Characterization and applications at NIT kuk june Attended one week STC on Synthesis and characterization techniques of smart materials at NIT kuk sept Attended one week STC on Emerging trends on Electronics & communication system at YMCAUST Aug 2015.

5 Attended one week STC on Effective teaching at NITTTR Chandigarh, Jan Attended a workshop on Cyber Forensics & Information Security at YMCAUST, 25-27/09/2013. Attended two day workshop on Atomic energy: BARC, 2-3 SEPT AWARDS/ACHIVEMENTS Qualified Graduate Aptitude Test (GATE) In Electronics and Communication Engineering. Secured a Winner Position in Inter Year Volley Ball Tournament organized by Sports Department, NIT Hamirpur, during Secured a Runner-up Position in Inter Branch Cricket Tournament organized by Sports Department, NIT Hamirpur, during Represented the Guru Jambheshwar University of Science & Technology, Hisar in the North Zone/All India Inter University Championship in Volley Ball, organised by Kurukshetra University, Kurukshetra from th Dec Secured a Runner -up Position in Cluster Level Games Meet in HandBall, organized by M.H.R.D, Education Deptt. Govt of India, at J.N.V Mothuka, Faridabad. Selected for Regional Level Handball Meet at J.N.V Nagina, Gurgaon, organized by Navodaya Vidyalaya Samiti, Regional Office Jaipur, during Participated in Regional Level Games Meet, 1999 in Hand Ball, organized by M.H.R.D, Deptt. Of Education, Govt. Of India, at J.N.V Hurda, Bhilwara (Raj.). Secured a Runner-up Position in District Rural Sports Competition organized by Sport & Youth Welfare Department, Haryana, during August 1999.