Investigation of electrically-active defects in AlGaN/GaN high electron mobility

Transcription

1 Investigation of electrically-active defects in AlGaN/GaN high electron mobility transistors by spatially-resolved spectroscopic scanned probe techniques. Dissertation Presented in Partial Fulfillment of the Requirements for the Degree Doctor of Philosophy in the Graduate School of The Ohio State University By Drew W. Cardwell, B.S. Graduate Program of Physics The Ohio State University 2013 Dissertation Committee: Professor Jonathan P. Pelz, Adviser Professor P. Chris Hammel Professor David G. Stroud Professor Gregory Lafyatis

2 Copyright by Drew W. Cardwell 2013

3 Abstract In this work, scanned probe microscopy (SPM) based methods are developed and used to spatially resolve particular electrically-active defects that degrade the performance of GaN-based high electron mobility transistors (HEMTs). Surface potential transients (SPTs) resulting from electron emission from defect-related trap states were measured in AlGaN/GaN HEMTs with nm-scale spatial resolution using a modified scanning Kelvin probe microscopy (SKPM) setup. Simultaneous measurements of SPTs and channel resistance transients as a function of temperature allowed particular traps affecting device performance to be resolved both spatially and spectroscopically. GaN-based HEMTs offer high-power radio-frequency (RF) performance, though their ultimate performance and reliability are still limited by electrically-active trap states. Knowledge of the spatial distribution of specific traps that affect device performance is important for understanding and controlling degradation in AlGaN/GaN HEMTs. However, the macro-scale trap spectroscopy techniques typically used to identify traps in HEMTs are sensitive to the transistor output characteristics, and are therefore quite limited in their ability to determine the spatial distribution of traps. ii

4 To directly probe the spatial distribution of specific traps affecting device performance, nm-scale atomic force microscopy (AFM) based trap spectroscopy techniques, sensitive to the local surface potential, were developed and coupled with macro-scale methods, enabling the spatial distribution of specific trap species to be measured, with both lateral and vertical spatial resolution, in operating AlGaN/GaN HEMTs. To probe traps throughout the AlGaN/GaN bandgaps, both thermal and optical spectroscopy techniques were implemented. The nm-scale trap spectroscopy techniques were used to spatially resolve particular traps in AlGaN/GaN HEMTs grown by metal-organic chemical vapor deposition (MOCVD) and molecular beam epitaxy (MBE). Typically, deeper traps were observed in the AlGaN barrier layer, within several hundred nanometers of the gate edge in the drain access region, in both MOCVD and MBE-grown HEMTs. Measurements on MOCVD-grown HEMTs with Fe-doped GaN buffer layers indicated that an E c ev trap is located in the GaN buffer layer and is correlated with the presence of Fe in the GaN buffer. iii

5 This is dedicated to my family. iv

6 Acknowledgements First, I would like to thank my adviser, Prof. Jonathan Pelz, for supporting my work. Through our discussions, I ve learned a great deal about physics and research. I especially appreciate his advising style, which provided me with ample guidance and direction while also allowing me to pursue my own research ideas. In addition, I d like to thank our collaborators. Prof. Steve Ringel and Prof. Aaron Arehart from the Electrical and Computer Engineering department at OSU have been critical in supporting and guiding much of the work. I d like to thank Aaron for tolerating my impromptu visits, which often led to invaluable discussions and exciting ideas. I ve enjoyed working with ECE students including Andrew Malonis, Qilin Gu, and Anup Sasikumar. I especially want to thank Anup for our collaborative work together. Also, I want to thank Prof. Jim Speck and Prof. Umesh Mishra, and members of their groups, including Steve Kaun, Jing Lu and Dr. Stacia Keller, for providing a variety of samples and for their valuable insights. I d also like to thank my colleagues in the physics group, including Camelia Marginean, Jonas Beardsley, Wei Cai, and Yulu Che. Wei, Yulu, and Camelia were very helpful in getting me up to speed in the lab. It has been a pleasure working alongside v

7 Camelia and Jonas over the last several years. I want to thank Camelia for the many valuable discussions. My work would also not have been possible without the support of the physics staff. I greatly appreciated John Spaulding, Pete Gosser, Josh Gueth, and Jon Shover from the machine shop for striving for perfection in everything they produce. I also want to thank the folks in the physics electronics shops and facilities, including Kent Ludwig, Phil Davids, Mark Reed, Mark Studor, and Jim Burns for always being helpful despite my interruptions. In addition, I want to thank the physics administrative and computer support staff for rapidly responding to issues and for providing guidance and support. Finally, I d like to thank my family and those closest to me for their unwavering support, love and encouragement. vi

8 Vita December 25, Born Cottage Grove, OR B. S. Physics and Mathematics, Pacific Lutheran University Graduate Research Associate, The Ohio State University Research Publications Publications D. W. Cardwell, A. Sasikumar, A. R. Arehart, S. W. Kaun, J. Lu, S. Keller, J. S. Speck, U. K. Mishra, S. A. Ringel, and J. P. Pelz, Spatially-resolved spectroscopic measurements of E c 0.57 ev traps in AlGaN/GaN high electron mobility transistors, Applied Physics Letters, vol. 102, no. 19, pp , D. W. Cardwell, A. R. Arehart, C. Poblenz, Y. Pei, J. S. Speck, U. K. Mishra, S. A. Ringel, and J. P. Pelz, Nm-scale measurements of fast surface potential transients in an AlGaN/GaN high electron mobility transistor, Applied Physics Letters, vol. 100, no. 19, pp , Major Field: Physics Fields of Study vii

9 Table of Contents Abstract... ii Acknowledgements... v Vita... vii List of Figures... xi Chapter 1 - Overview... 1 Chapter 2 - Introduction Crystal structure and material properties: GaN, AlN, Al x Ga 1-x N Electric polarization Polarization-induced two dimensional electron gas GaN-based high electron mobility transistors (HEMTs) Crystal defects and their impact on GaN HEMTs Chapter 3 - Background on deep levels and deep level spectroscopy techniques Deep level capture and emission Thermal emission Optical emission Transient response Fundamentals of deep level spectroscopy techniques Deep level transient spectroscopy (DLTS) Deep level optical spectroscopy (DLOS) Macro-scale trap spectroscopy in GaN HEMTs viii

10 3.5.1 HEMT terminal characteristics Impact of electrically-active defects Macro-scale deep level spectroscopy on HEMTs Limitations of macro-scale trap spectroscopy on HEMTs Chapter 4 - Experimental techniques: nm-scale deep level trap spectroscopy Overview Atomic force microscopy (AFM) Park XE-NSOM AFM AFM probe as a damped harmonic oscillator Topography imaging Scanning Kelvin probe microscopy (SKPM) Electrostatic tip-sample force ( : metal sample : charged laterally-uniform insulating sample Lateral resolution of SKPM Amplitude-Modulation SKPM Time-resolved SKPM measurements of emission from deep levels in HEMTs Adaptive SKPM feedback technique nano-dlts nano-dlos capabilities Chapter 5 - Imaging trapped charge emission in AlGaN/GaN HEMTs Introduction Motivation SPTs on an unpassivated MBE HEMT as a function of temperature Chapter 6 - Spatially-resolved trap spectroscopy in AlGaN/GaN HEMTs Introduction Motivation Fe-Series AlGaN/GaN HEMTs ix

11 6.4 Simultaneous surface potential and 2DEG resistance measurements Temperature dependent resistance transient measurements Surface potential transient mapping Temperature dependent surface potential transients Resistance transients vs. Fe concentration in GaN buffer Relating the electric fields in the GaN buffer to filling of the E c 0.57 ev traps Conclusions Future directions Chapter 7 - Summary Appendix A - Attofarad-level absolute capacitance detection A.1 DLTS/DLOS probe station implementation A.2 SCM implementation in the Park AFM Appendix B - Computer simulations B.1 Sample FLEXPDE code for simulations of the measured surface potential near the gate edge B.2 Sample 2D Silvaco ATLAS device simulations Bibliography x

12 List of Figures Figure 2.1: Wurtzite crystal structure of tetrahedally coordinated GaN with out of plane and in-plane lattice constants, c and a, respectively. From Ref. [15] Figure 2.2: Bandgap vs. lattice constant a for several III-V binary compound semiconductors. From Ref.[16] Figure 2.3: Depiction of the a-, c-, m-, and r-planes of the wurtzite crystal structure. From Ref. [13] Figure 2.4: Wurtzite crystal structure with Ga-face and N-face polarity showing the lack of inversion symmetry along the c-axis. From Ref. [19] Figure 2.5: (a) Schematic of a Ga-face AlGaN/GaN heterostructure. (b) Total polarization charge resulting from the spontaneous polarization charge in the thick relaxed GaN and the spontaneous and piezoelectric polarization charge in the thin strained AlGaN layer. (c) The electric potential caused by the polarization charge alone, referenced to 0 V at the bottom of the GaN layer. (d) Polarization charges (black bars) along with compensating charges (blue bars). (e) Schematic energy band diagram Figure 2.6: Specific on-resistance vs. breakdown voltage for Si, SiC, and GaN transistors. From Ref. [23] Figure 2.7: Schematic cross-section of a simple Ga-face AlGaN/GaN HEMT. A polarization-induced 2DEG channel forms at the AlGaN/GaN interface. A voltage applied to the gate modulates the underlying 2DEG charge, thereby controlling the channel current xi

13 Figure 2.8: Tunneling electron microscopy (TEM) image of a 5 micron thick MOCVD GaN layer grown on a sapphire substrate showing threading dislocations defects extending from the sapphire substrate to the GaN surface. From Ref. [32] Figure 2.9: Current transients, recorded after switching from an applied drain bias of 30 V on an AlGaN/GaN HEMT, increase with time as trapped electron emit. From Ref. [43] Figure 2.10: 500 ns pulse IV measurements on an AlGaN/GaN HEMT where the solid black line and the dotted red line correspond to quiescent bias conditions of V GS = V DS = 0 V and V GS = -4.8 V and V DS = 15 V, respectively. The significant reduction in the current for bias points in intermediate region between the linear and saturation regimes, is referred to as knee walkout, and is significant for the dotted red curves where trap filling is maximized during the quiescent bias. From Ref. [1] Figure 2.11: Constant drain-current transients measured on an AlGaN/GaN HEMT as a function of temperature after switching from bias conditions where V GS = -3.3 V and V DS = 15 V to V GS = 0 and I DS ~ 72 ma/mm. The time constants of the exponential fits (dotted curves) are plotted in the inset in red, along with previous CI D -DLTS measurements in black, both revealing a dominant E c 0.57 ev drain access region trap. From Ref. [1] Figure 2.12: (a) The surface potential recorded as a function of position from the gate edge in the drain access region after switching from a fill pulse of V GS = -12 V and V DS = 20 V applied for fill pulse times from 0 to 28 minutes. (b) Drain current and surface potential transients recorded at a fixed probe location after bias switching. From Ref. [45] Figure 3.1: Trap capture and emission processes, including (a) electron capture from the conduction band, (b) electron emission to the conduction band, (c) hole capture from the valence band, and (d) hole emission to the valence band Figure 3.2: Trap capture and emission in the depletion region of a n-type Schottky junction under different bias conditions. (a) A fill pulse bias is applied to the xii

14 junction so that nearly all traps beyond a distance x 0 from the junction are filled. (b) Switching to a measurement pulse with a larger reverse bias quickly sweeps out electrons and extends the depletion region. Occupied traps above the Fermi level emit over time, causing a slight reduction in the width of the depletion region, resulting in a junction capacitance transient. Figure from [46] Figure 3.3: Pulse bias sequence and corresponding junction capacitance. (a) The fill pulse is applied for a time t f to fill traps, followed by a measurement pulse for a time t m, which extends the depletion region, causing traps to empty over time. (b) The junction capacitance as a function of time during bias switching. The capacitance transient during the measurement pulse results from trap emission. Figure from [46] Figure 3.4: The DLTS signal, C(t 1 ) C(t 2 ), is extracted from measurements of capacitance transients at various temperatures. The times, t 1 and t 2, are referred to as a rate window. The DLTS signal peaks when the rate window times are similar to the trap emission time constant. From Ref. [46] Figure 3.5: (a) DLTS on an n-type GaAs Schottky diode after high energy electron irradiation. The DLTS signal is plotted using four rate windows. The curves are offset vertically for clarity. (b) Arrhenius plot showing the extracted trap energy and capture cross section. Figure from [46] Figure 3.6: (a) Schematic cross section of an AlGaN/GaN HEMT and (b) a model equivalent circuit diagram composed of an intrinsic transistor in series with a drain resistance R D Figure 3.7: Current-voltage characteristics of an AlGaN/GaN HEMT showing the triode and saturation regions. V gs = 0, -1, -2, -3, and -4 V Figure 3.8: An equivalent circuit for a HEMT biased in the linear part of the triode regime, and composed of a drain resistance, R D, along with an under gate resistance R G controlled by V gs xiii

15 Figure 3.9: Schematic of an AlGaN/GaN HEMT showing trapped electrons in the AlGaN barrier and GaN buffer. The trapped electrons reduce the local 2DEG density Figure 3.10: Cross-section under the gate of an AlGaN/GaN HEMT with laterally uniform sheets of trapped charge in the AlGaN barrier and GaN buffer Figure 3.11: Schematic diagram showing laterally uniform sheets of trapped charge located in the drain access region, which reduce the local 2DEG density and thereby increase the drain resistance R D Figure 3.12: Schematic showing the fill pulse and measurements pulse biasing conditions for (a) CI D drain control and (b) CI D gate control macro-scale transient measurements. (c) Drain bias V ds, gate bias V gs, and measured channel current I ds, while switching from the fill pule to the measurement pulse biasing conditions. Electron emission from traps during the measurement pulse result in a transient in the drain current. Adapted from Ref. [49] Figure 3.13: (a) Drain-control CI D DLTS measurements on an MOCVD-grown AlGaN/GaN HEMT reveal transients having temperature dependent emission time constants. The emission time constants plotted in the inset are consistent with emission from an E c 0.57 ev trap. (b) Arrhenius plot showing the emission time constant of the E c 0.57 ev trap along with the DLTS signal (inset) showing the E c 0.57 ev peak shift as a function of the DLTS rate window. From Ref. [1] Figure 3.14: Drain-control CI D -DLOS measurements on unpassivated and passivated HEMTs show that the impact of traps located in the drain-access region depend strongly on the passivation of the access region AlGaN surface. From Ref. [11] Figure 4.1: Scanning electron microscopy (SEM) images of (a) a commercially available rectangular Si AFM cantilever/tip attached to a larger Si chip and (b) a zoomed in view of the end of the AFM tip. From Ref. [57] Figure 4.2: A schematic showing the typical AFM experimental setup. Tip-sample forces cause the AFM cantilever to deflect. The deflection is detected by the position of the reflected laser spot on the 4 quadrant photo-detector. The z piezo scanner and x-y xiv

16 piezo scanner allow the tip height and lateral tip position to be controlled. Due to the limited range of the piezo scanners, x, y, and z course positioners are also used. An AC bias can be applied to the z dither piezo to drive cantilever oscillations Figure 4.3: (a) Park Systems NSOM AFM with an optical column designed for an optical microscope and NSOM access. (b) Zoom in view of the AFM head the x-y piezo stage. The AFM head, designed for side optical access enables monochromatic illumination of the sample via a fiber optic/lens. (c) Underside of the AFM head showing the AFM probe chip mounted to a steel chip holder held magnetically to the probe hand Figure 4.4: Oscillation amplitude of a damped driven harmonic oscillator as a function of the driving force frequency for Q = 100, 200, and Figure 4.5: Oscillation phase of a damped driven harmonic oscillator as a function of the driving force frequency for Q = 100, 200, and Figure 4.6: AFM contact mode topography setup. Repulsive tip-sample forces cause a DC deflection of the AFM cantilever that is detected by the location of the reflected laser spot on the 4 quadrant photo-detector, which produces a corresponding A B voltage output signal. A proportional-integral (PI) feedback circuit controls the voltage applied to the z piezo scanner to maintain a constant A B signal, and therefore, a fixed cantilever deflection. If the x-y piezo scans the sample, the sample topography can be extracted from the applied z piezo scanner voltage Figure 4.7: Non-contact mode imaging setup. An AC bias applied to the z dither piezo vibrates the cantilever at a frequency slightly above the free cantilever resonant frequency, ideally near the maximum slope of the amplitude vs. frequency curve. A lockin amplifier detects the corresponding oscillations of the A-B signal, and outputs the oscillation amplitude or phase. A feedback loop controls the z piezo scanner to maintain a fixed amplitude or phase Figure 4.8: Conductive AFM probe in close proximity to a sample with an arbitrary distribution of positive (+) and negative (-) charges. The electrostatic force on the xv

17 probe is the sum of all the forces between charge on the probe and sample. The voltage V, modulates the charge on the probe and sample Figure 4.9: Schematic of charge distributions on a metal coated AFM probe and a metal sample having different work functions with the probe and sample (a) electrically isolated, (b) electrically connected by a wire, and (c) electrically connected with an applied bias equal to the difference in the work functions. Charge transferred from the probe to the sample after connecting the wire in (b) is forced back by the applied bias in (c), nulling out the electrostatic tip-sample forces Figure 4.10: Charged laterally-uniform insulating sample. The insulator in green, has a uniform density n of trapped negative charge a distance d above a metal with work function Figure 4.11: Simultaneous measurements of (a) topography and (b) V sp on a sample consisting of two sets of interpenetrating gold fingers on a Si wafer. A voltage bias of 0.5 V was applied between the sets of gold fingers. (c) A V sp line profile corresponding to the red line shown in (b) Figure 4.12: Schematic of a typical AM-SKPM setup. A sinusoidal AC bias at frequency ω is applied to the AFM probe through a summing circuit. Oscillations of the AFM probe at frequency ω are detected using a lockin amplifier. The SKPM feedback circuit controls the DC bias, V sp, applied to the AFM probe to null out the lockin output. V sp is recorded as the local surface potential Figure 4.13: (a) Schematic of the experimental setup showing a HEMT device with the gate and drain biased to V gs and V ds, respectively, and the source connected to a current amplifier at virtual ground. The AFM probe measures the local surface potential, V sp. (b) Schematic of measured resistance transients (RTs) and surface potential transients (SPTs) that result from trap emission during the measurement pulse xvi

18 Figure 4.14: (a) Schematic showing the 1250 Ω resistor added to protect the AFM probe and sample from damage cause by large current flow. The resistor is soldered into a removable cable that is connected in the AFM head as shown in (b) and (c) Figure 4.15: (a) Schematic of an AM-SKPM setup over a biased drain contact with a typical PI SKPM feedback. (b) Typical measured V sp and V sp error signal at a fixed probe location measured as a function of time with a rectangular voltage pulse applied to the drain contact. The measured V sp is inaccurate for a time t res after bias switching Figure 4.16: SKPM experimental setup with an additional adaptive feedback signal. The output of the function generator is added to the PI feedback output. The function generator output is controlled by Labview software on a PC. The output settings of the function generator are determined by previous surface potential measurements and/or user inputs Figure 4.17: An example of the signals applied and SKPM signals measured during the first two bias cycles with adaptive SKPM feedback with the AFM probe located over the drain contact undergoing 10 V bias switching. The cycle 1 and cycle 2 (a,f) drain bias V ds, (b,g) function generator output V fg, (c,h) PI feedback output V PI, (d,i) SKPM signal V sp, and (e,j) SKPM error signal Figure 4.18: (a) Photograph of the miniature magnetic probe station/sample stage with integrated heater and thermocouple mounted on the AFM x-y piezo scanner. (b) Zoomed in photograph of one of the magnetic XYZ probes in electrical contact. (c) Photograph of the probe setup station where samples are mounted and electrical contacts are made. The microscope is connected to a CCD camera and computer monitor Figure 4.19: Schematic of the nano-dlos system. A fiber optic delivers ~1.2 ev to >4.3 ev light from a Xe lamp, monochromator system to sample. A computer-controlled shutter turns the light on and off xvii

19 Figure 5.1: Schematic top view of the AlGaN/GaN High Electron Mobility Transistor (not to scale) Figure 5.2: Experimental Setup (side view of device): The gate and drain are biased to V gs and V ds, respectively, using a dual-channel function generator. The current is measured at the source. V sp, applied to minimize the attractive electrostatic force between tip and sample, is recorded as the local surface potential Figure 5.3: (a) Schematic of the local surface potential, V sp, and channel conductance, G ds, resulting from device switching between the off-state (V gs = -5.6 V, V ds = 9 V) and the on-state (V gs = 0 V, V ds = ~0.1 V). During the on-state, electron emission from traps in the AlGaN result in increasing SPTs and CTs. (b) Simultaneous measurement of a SPT and a CT recorded during the on-state with the probe located over the AlGaN surface, near the drain-side gate edge Figure 5.4: Measurement and simulation of the (a) SPT amplitude and (b) tip height near the drain-side gate edge. A schematic (c) of the sample structure, probe tip, and trapped electrons having a density of 7 x cm -2 and a lateral extent of 200 nm from the gate edge Figure 5.5: (a) Topography and (b) ΔV sp maps extracted from SPT measurements performed over a 2D grid of points near the drain-side gate edge along the entire width of the device. The fill pulse biasing conditions were V gs = -5 V and V ds = 9 V. The ΔV sp rate window was t 1 = 4 ms and t 2 = 125 ms Figure 5.6: (a) Topography and (b) ΔV sp measured as a function of position from the gate to the drain at several fill pulse drain bias conditions. The fill pulse gate bias was V gs = -5 V. The ΔV sp rate window was t 1 = 4 ms and t 2 = 125 ms Figure 5.7: Simultaneously measured RTs and SPTs at several fill pulse drain bias conditions. The fill pulse gate bias was V gs = -5 V. The ΔV sp rate window was t 1 = 4 ms and t 2 = 125 ms Figure 5.8: Simultaneously measured (a) RTs and (b) SPTs at several temperatures on an unpassivated MBE device. RTs and SPTs have similar shape, suggesting that traps xviii

20 affecting the surface potential also have a significant effect on the channel resistance. The weak temperature dependence of RTs and SPTs indicates that the observed trap emission is not dominated by either the E c 0.57 ev or E c 0.45 ev traps Figure 6.1: Schematic cross-section of the AlGaN/GaN HEMT device with applied gate bias (V gs ) and drain bias (V ds ), and measured source current (I s ). The AFM probe measures the local surface potential (V sp ) Figure 6.2: Secondary ion mass spectrometry measurements showing the Fe concentration as a function of depth in MOCVD grown GaN. After the Fe injection is switched off, the Fe concentration decreases exponentially with depth Figure 6.3: Schematics of RTs and SPTs recorded after switching from the fill pulse bias condition to the measurement pulse bias condition. During the measurement pulse, trap emission causes RTs and SPTs to vary with time Figure 6.4: (a) Arrhenius plot showing the E c 0.57 ev trap with a capture cross section of 1.5 x cm 2, extracted from CI D -DLTS on an AlGaN/GaN HEMT. (b) RTs, recorded at several temperatures, have emission time constants consistent with those of CI D -DLTS measurements of the E c 0.57 ev trap Figure 6.5: Schematic top-view of the HEMT device. The magenta lines are used to locate the gate edge, drain metal edge, and the edges of the AlGaN mesa in subsequent maps. The AlGaN is etched away to expose bare GaN off the edges of the device Figure 6.6: (a) Topography, (b) surface potential at the end of the fill pulse V sp, fill, (c) surface potential at the end of the measurement pulse V sp (t = 125 ms), and (d) ΔV sp extracted from a single set of transient measurements on an unpassivated AlGaN/GaN HEMT, with fill pulse bias conditions of V gs = -4 V and V ds = 9 V. The rate window in the ΔV sp map was t 1 = 5 ms and t 2 = 25 ms Figure 6.7: Averaged (b) topography and (c) ΔV sp profiles taken from the gate to the drain across the drain access region over the AlGaN barrier xix

21 Figure 6.8: (a) Topography and (b) ΔV sp maps taken over a region off the edge of the AlGaN barrier over exposed GaN with fill pulse conditions of V gs = -4 V and V ds = 9 V, and a rate window of t 1 = 5 ms and t 2 = 25 ms. (c) SPTs measured at several temperatures over the GaN, within several microns of the drain-side gate edge and the AlGaN barrier edge Figure 6.9: Averaged resistance transients measured on devices with d = 500, 800, and 1300 nm. A fill pulse of V gs = -4 V and V ds = 9 V was applied for 125 ms Figure 6.10: (a) ΔR ds measured as a function of applied V dg, under both Type 1 (black solid squares) and Type 2 (red open circles) fill pulse biasing conditions. (b) Schematic device cross section showing the two locations, marked by the white solid circles, where the simulated vertical electric fields in the (c) GaN buffer, and (d) AlGaN barrier, under a Type 1 fill pulse, are plotted as a function of V dg Figure 6.11: Silvaco ATLAS simulations showing the vertical electric fields with (a) V gs = V ds = 0 V, (b) V gs = -5 V and V ds = 0 V, (c) Type 2 fill conditions with V gs = -5 V and V ds = 9 V, and (d) Type 1 fill conditions with V gs = -10 V and V ds = 0 V Figure 6.12: In (a) and (b), the drain current at times 5 ms, 25 ms, and 125 ms after switching to the measurement pulse bias are plotted as a function of the measurement pulse drain bias, for Type 2 and Type 1 fill pulses, respectively. In saturation we see that the drain current changes noticeably between the measurement times in the case of a Type 1 pulse, while, in the case of a Type 2 pulse, it does not. (c) A plot of the change in the drain current between 25 ms and 5 ms, as a function of V ds during the measurement pulse, for Type 1 and Type 2 fill pulse conditions Figure 6.13: Line scans from the gate towards the drain of the (a) topography and the (b) surface potential measured after the sample was illuminated with 4.3 ev light (black) and after a fill pulse was applied (red line). The fill pulse was applied in the dark for ~1 minute with V gs = -4 V and V ds = 9 V xx

22 Figure 6.14: Measurements of the steady-state shift in the (a) surface potential and (b) resistance as a function of incident light energy with the AFM probe over the drain access region within several hundred nanometers of the gate edge Figure A.1: Basic circuit diagram for the low noise capacitance detection technique Figure A.2: (a) Top-view image of a sample consisting of square n-type Gan Schottky diodes with edge dimensions from 128 microns to 125 nm. (b) Schematic cross section of the Schottky diode structure Figure A.3: Schematic circuit diagram of the low noise capacitance detection circuit implemented on a LakeShore vacuum probe station for capacitance measurements on Schottky diode structures Figure A.4: (a) Image of the LakeShore TTP4 probe station. (b) Autocad rendition of a model XYZ piezo manipulator integrated into the TTP4 stage. (c) XYZ piezo manipulator with the X, Y, and Z piezo stages, X, Y, and Z piezo twisted pair power cables, and probe and probe wire identified. (c) Coupling capacitor box. The top contact and the input to the current amplifier are connected to the top and right BNCs, respectively. The amplitude and phase shifted AC signal is connected to the left BNC Figure A.5: Schematic circuit showing the implementation of the low noise capacitance detection circuit for AFM measurements Figure A.6: Photographs of modified electronics boxes that mount to the Park AFM head, which contain (a) a current amplifier and a coupling capacitor, and (b) only a coupling capacitor xxi

23 Chapter 1 - Overview In this work, spectroscopic atomic force microscopy (AFM) based techniques were developed and utilized to investigate the spatial distribution of particular electrically active defects in GaN-based high electron mobility transistors (HEMTs). Simultaneous time-resolved nm-scale scanning Kelvin probe microscopy (SKPM) and macro-scale channel resistance measurements were recorded after bias switching on AlGaN/GaN HEMTs to determine the location of trapped charge affecting device performance, with both vertical and lateral spatial resolution. We perform such measurements as a function of temperature and incident photon energy hv, to identify trap signatures. In devices grown by molecular beam epitaxy (MBE) and metal-organic chemical vapor deposition (MOCVD), we observe weakly temperature dependent emission from deeper electron traps in the AlGaN barrier layer, near room temperature. In MOCVD-grown devices, we find that a trap with energy 0.57 ev below the conduction band (E c 0.57 ev), which is filled in the drain access region [1] [2], has been linked to stress-induced degradation in GaN HEMTs [1] [3], and was thought to exist in the AlGaN barrier [3] [4], is actually located in the GaN buffer below the transistor s conducting channel. 1

24 GaN-based transistors have emerged as a leading candidate for applications in high power, high frequency switching applications due to the performance capabilities enabled by the properties of the AlGaN/GaN material system. However, the ultimate performance and reliability of GaN transistors remains limited by electrically active defects that are linked to gate leakage [5] [6], charge trapping [7] [8], current collapse, and and reliability issues [1] [2] [9] [10]. Macro-scale trap spectroscopy techniques sensitive to the transistor terminal characteristics have been developed to identify particular trap levels that affect GaN- HEMT performance [2] [11]. These techniques are able to distinguish between traps under the gate and traps between the gate and the drain (drain access region) in HEMT devices. However, such macro-scale measurements are unable to directly measure the lateral distribution of trapped charge in the drain access region and are unable to distinguish between trapped charge in the AlGaN barrier (above the transistor channel) and in the GaN buffer (below the transistor channel). The nm-scale techniques developed and applied in this work provide a valuable tool for spatially resolving particular traps in electrical devices with vertical and lateral resolution. This work is organized as follows: In chapter 2, a brief introduction to the AlGaN/GaN material system, GaN-based electrical devices, and electrically-active defects in GaN is given. Properties of the AlGaN/GaN material system are first discussed, including the wurtzite crystal structure, GaN material properties relevant to transistor switching applications, and polarization charge. After this, the formation of a polarization-induced two-dimensional electron gas (2DEG) in AlGaN/GaN heterostructures is described. The performance capabilities of 2

25 GaN HEMTs are then introduced and related to the material properties. Finally, the degradation of HEMT performance by electrically active defects is discussed. In chapter 3, background material on the physics of trap capture and emission is introduced. Thermally and optically induced trap emission are briefly discussed. Then, the standard deep level transient/optical spectroscopy (DLTS/DLOS) on Schottky diode structures is described. Finally, the macro-scale deep level spectroscopy techniques applied to AlGaN/GaN HEMTs is presented. In chapter 4, background on atomic force microscopy and scanning Kelvin probe microscopy (SKPM) are first presented. Several examples are given to demonstrate how the SKPM surface potential signal can be related to sample properties. Then, the SKPM setup, which includes capabilities for time-resolved surface potential transient (SPT) measurements recorded after bias switching, and an adaptive feedback circuit that enables milli-second SKPM time response following large (~10 V) changes in sample bias for measurements of fast trap emission, is described. Finally, the experimental setups for SPT measurements as a function of temperature (nano-dlts) and incident photon energy (nano-dlos) are presented. In chapter 5, we report on simultaneous measurements of resistance transients (RTs) and fast milli-second time-scale SPTs in AlGaN/GaN high electron mobility transistors (HEMTs) grown by molecular beam epitaxy (MBE). We observe largeamplitude SPTs after bias switching, located in the drain access region within several hundred nanometers of the gate edge that are similar in shape to RTs, suggesting that the traps that cause SPTs have a significant effect on the channel resistance. Electrostatic simulations of the measured surface potential and channel resistance indicate that the 3

26 observed transients are consistent with emission of trapped electrons having a density of 7 x cm -2 extending 200 nm from the drain-side gate edge. Simultaneous SPT and RT measurements on MBE-grown HEMTs performed at several temperatures show that SPTs and RTs have no observable temperature dependence near room temperature, suggesting that the observed traps are likely quite deep and that they emit electrons by a mechanism other than direct thermal activation to the conduction band. In chapter 6, we report on transient measurements performed on MOCVD-grown AlGaN/GaN HEMTs having different Fe-doping profiles in the GaN buffer. Resistance transients measured as a function of temperature show the presence of a trap with energy E c 0.57 ev below the conduction band that has been linked to radio-frequency (RF) stress induced degradation in AlGaN/GaN HEMTs [1] [3]. Surprisingly, SPT measurements performed in the drain access region, over the AlGaN barrier, show no evidence of the E c 0.57 ev trap, suggesting that this trap isn t filled in the AlGaN barrier. Surface potential transients measured off the edge of the AlGaN mesa, over exposed GaN, show signatures of this trap, indicating that it is located in the GaN buffer. Resistance transient measurements and simulations of the electric fields suggest that the E c 0.57 ev trap is filled in the GaN buffer only when vertical electric fields extend into the GaN buffer that force electrons downward. A summary of the major findings is presented in chapter 7. 4

27 Chapter 2 - Introduction In this chapter, we give a brief introduction to the material properties and device applications of the AlGaN/GaN material system. We start by discussing the crystal structure and materials properties of GaN. The large spontaneous and piezoelectric polarization in GaN will be discussed in the context of an AlGaN/GaN heterostructure to explain the formation of a high-density high-mobility two dimensional electron gas (2DEG) at the AlGaN/GaN interface. The 2DEG acts as the conducting channel in AlGaN/GaN HEMTs. The benefits of GaN for high-frequency high-power electronics applications results from GaN s combination of materials properties. However, the performance of GaN electronics remains limited by defects. We will discuss defects in GaN devices, and the impact that they have on performance. Finally, previous measurements of trapped charge transients in AlGaN/GaN HEMTs will be presented. 2.1 Crystal structure and material properties: GaN, AlN, Al x Ga 1-x N Both AlN and GaN typically have the wurtzite crystal structure shown in Figure 2.1. The nitrogen and the group III element/s form hexagonally close-packed sublattices, with bonding between sublattices that is partially ionic and partially covalent. Notice that the wurtzite structure lacks inversion symmetry along the c-axis. For an ideal wurtzite 5

28 structure consisting of four touching hard spheres, the ratio of the out of plane lattice constant c, and in-plane lattice constant a, is. The experimental measured values of c/a for AlN and GaN are and 1.634, respectively [12]. Figure 2.2 shows the bandgap of several wurtzite and zinc-blende binary compounds as a function of lattice constant a. GaN and AlN have direct bandgaps of 3.4 ev and 6.2 ev and bulk lattice constants a ( c ) of 3.19 Å (5.19 Å) and 3.11 Å (4.98 Å), respectively [13]. The bandgap and lattice constants of the ternary compounds Al x Ga 1-x N can be calculated using Vegard s law by linearly interpolating in x between the bandgaps of AlN and GaN [14]. Figure 2.1: Wurtzite crystal structure of tetrahedally coordinated GaN with out of plane and in-plane lattice constants, c and a, respectively. From Ref. [15]. 6

29 Figure 2.2: Bandgap vs. lattice constant a for several III-V binary compound semiconductors. From Ref.[16]. GaN has properties that make it well-suited for a variety of electronics and optoelectronics applications. GaN has a high breakdown electric field of ~4 x 10 6 MV/m at 300K [16] a high electron saturation velocity of ~1.4 x 10 7 cm/s and a high thermal conductivity of 2.3 W/(cm K) at 300K [13]. AlGaN/GaN heterostructures are capable of developing a high density, high mobility polarization-induced two dimensional electron gas (2DEG) in the Al x Ga 1-x N material system, making the AlGaN/GaN system promising for high power, high frequency electronics applications. Also, the wide range of direct bandgaps available in the Al x Ga 1-x N material system make GaN suitable for UV light detection and UV light emitting diodes (LEDs). 7

30 2.2 Electric polarization The III-nitride materials with the wurtzite crystal structure are highly polar along the c-axis, relative to other III-V materials, due to their large spontaneous polarization charge and large piezoelectric coefficients. The spontaneous polarization is enabled by the lack of inversion symmetry along the c-axis and the partially ionic bonding between the nitrogen and group III atoms. Figure 2.3 shows various planes in the wurtzite structure. Figure 2.3: Depiction of the a-, c-, m-, and r-planes of the wurtzite crystal structure. From Ref. [13]. 8

31 GaN is typically grown along the c-axis. Due to the high cost of GaN substrates, SiC, sapphire, or Si substrates are often used. Two direction of c-axis growth are possible, resulting in either a Ga terminated surface (Ga-face) or a N terminated surface (N-face). Ga-faced growth is currently more common than N-faced growth, though N- face growth offers some key advantages over Ga-face growth in some transistor applications [17]. Figure 2.4 shows a schematic of the Ga-face and N-face of GaN growth along the c-axis. The inverted orientations of the Ga-face and N-face structures results in opposite polarization directions. An effective negative spontaneous polarization charge exists at the Ga-terminated face and an effective positive charge of the same magnitude exists at the N-terminated face. The very high spontaneous polarization, P SP, of GaN and AlN are C/m 2 and C/m 2, respectively, corresponding to electron densities of 1.8 x cm -2 and 5.1 x cm -2, respectively [18]. The spontaneous polarization for ternary Al x Ga 1-x N compounds can be calculated approximately, using Vegard s law, with [13] 2.1 9

32 Figure 2.4: Wurtzite crystal structure with Ga-face and N-face polarity showing the lack of inversion symmetry along the c-axis. From Ref. [19]. The III-nitrides with the wurtzite crystal structure all have large piezoelectric coefficients along the c-axis given by [18] 2.2 where is the in-plane strain (assumed to be isotropic) and is the strain along the c-axis. Here, and are the equilibrium values of the lattice parameters. The piezoelectric constants, and, are 0.73 and C/m 2 for GaN, and 1.46 and C/m 2 for AlN, respectively [18]. GaN HEMTs are often grown with a thick relaxed GaN buffer layer below a strained Al x Ga 1-x N barrier layer having a thickness typically below 40 nm and x values typically from 0.15 to In such a configuration, the unstrained GaN buffer layer does not have a piezoelectric polarization charge while the strained Al x Ga 1-x N layer does. The piezoelectric constant of a pseudomorphic Al x Ga 1-x N layer on GaN can be calculated by [20] 10

33 2.3 which, for x = 0.25, results in a piezoelectric polarization of C/m Polarization-induced two dimensional electron gas The polarization charge in the III-nitrides can produce large internal electric fields in heterostructures, which are often screened by compensating mobile charges. The use of polarization fields to tailor the charge distribution has been referred to as polarization doping. Figure 2.5 demonstrates the effects that polarization charge can have on the charge distribution and the band structure in a Ga-face Al x Ga 1-x N heterostructure. The AlGaN/GaN heterostructure in Figure 2.5(a) has polarization charge (spontaneous and piezoelectric) shown in Figure 2.5(b). The polarization points in the same direction in the AlGaN and GaN layers, but the polarization charge is larger in the AlGaN layer, producing a net positive polarization charge at the AlGaN/GaN interface. Figure 2.5(c) shows the variation in the electric potential caused by the polarization charge, with the potential defined as 0 V at the GaN-substrate interface. The polarization-induced internal electric fields are energetically unfavorable and are often at least partially screened by mobile charges, some of which are thought to originate from surface states [21]. Figure 2.5(d) shows a schematic of the fixed polarization charge along with compensating charges (in blue) that are assumed to originate predominantly from electrons in surface states. The compensating charge redistributes to reduce the energy associated with the internal electric fields. If we consider a case where electrons from surface states are the only source of mobile electrons, then these electrons will first accumulate near the GaN- 11

34 substrate interface, possibly in the conduction band or in trap states, until the polarization charge at the bottom of the GaN layer is fully compensated and the magnitude of the electric field in the GaN layer is significantly reduced. After this, electrons from the surface states will accumulate very close to the AlGaN/GaN interface to reduce the electric field remaining in the AlGaN layer. The mobile compensating electrons that accumulate in the GaN within several nanometers of the AlGaN/GaN interface can have a sufficiently high density so that the Fermi level is above the conduction band minimum. This high-density sheet of free electrons is referred to as a two dimensional electron gas (2DEG). In AlGaN/GaN heterostructures, the 2DEG density depends strongly on the Al x Ga 1-x N thickness and composition, with measured densities as high as ~2 x cm -2 [22]. The resulting conduction band minimum, valence band maximum, and Fermi energy are shown schematically in Figure 2.5(e). 12

35 Figure 2.5: (a) Schematic of a Ga-face AlGaN/GaN heterostructure. (b) Total polarization charge resulting from the spontaneous polarization charge in the thick relaxed GaN and the spontaneous and piezoelectric polarization charge in the thin strained AlGaN layer. (c) The electric potential caused by the polarization charge alone, referenced to 0 V at the bottom of the GaN layer. (d) Polarization charges (black bars) along with compensating charges (blue bars). (e) Schematic energy band diagram. 13

36 2.4 GaN-based high electron mobility transistors (HEMTs) The electronic properties of the AlGaN/GaN material system have enabled GaNbased high electron mobility transistors (HEMTs) to perform well in high-power switching and radio-frequency (RF) power applications. The high mobility, high saturation velocity, and very high 2DEG densities possible in the AlGaN/GaN material system enable low on-state channel resistances (on-resistances). The large bandgap, high thermal conductivity, and high breakdown field allow GaN devices to function under high power conditions, at high temperatures and with large applied voltages. Together, these characteristics enable GaN HEMTs to simultaneously achieve low on-resistance, handle high voltages and large power dissipation, and maintain a small physical footprint for small gate capacitance. The possibility of low on-resistance and low input capacitance enables efficient switching and high-frequency performance. Figure 2.6 shows a plot of the specific on-resistance vs. breakdown voltage for Si, SiC, and GaN transistors, indicating that GaN-devices can simultaneously achieve low specific on-resistances and large breakdown voltages, relative to other materials. Also in Figure 2.6, it is clear that the performance of GaN transistors is far from GaN s theoretical limit. 14

37 Figure 2.6: Specific on-resistance vs. breakdown voltage for Si, SiC, and GaN transistors. From Ref. [23]. Figure 2.7 shows a schematic cross-section of a simple Ga-face AlGaN/GaN HEMT. GaN is usually grown by metal-organic chemical vapor deposition (MOCVD) or by molecular beam epitaxy (MBE). Typically, a nm Al x Ga 1-x N layer is grown atop a relatively thick GaN buffer layer. Due to the current high price of native GaN substrates, GaN is most often grown on non-native SiC, Si, or sapphire substrates. For growth on non-native substrates, an AlN nucleation layer is typically first deposited on 15

38 the substrate to reduce the number of dislocation defects extending into the GaN buffer. The GaN buffer is usually doped to make it semi-insulating, with C or Fe for example, so that the current flowing from the source to the drain is confined near the AlGaN/GaN interface [24] [25]. The thickness and composition of the Al x Ga 1-x N layer are chosen to produce a polarization-induced high-density 2DEG at the AlGaN/GaN interface without the need for intentional donor doping. Typically, 0.15 < x < Ohmic source and drain contacts are made to the 2DEG channel. The gate enables modulation of the underlying 2DEG charge. The regions between the source and the gate, and the gate and the drain, are referred to as the source access region and the drain access regions, respectively. To date, most Ga-face AlGaN/GaN HEMTs are depletion-mode (normally-on) devices, so that the channel conductance is high when the gate-to-source bias V GS, is zero. Enhancement-mode (normally-off) GaN HEMTs are a current topic of research and development efforts [26]. GaN-based transistors are also produced with additional features including dielectrics under the gate [27], access region surface passivation [28] [29], and field plates [30] [31], to optimize performance for specific applications. 16

39 Figure 2.7: Schematic cross-section of a simple Ga-face AlGaN/GaN HEMT. A polarization-induced 2DEG channel forms at the AlGaN/GaN interface. A voltage applied to the gate modulates the underlying 2DEG charge, thereby controlling the channel current. 2.5 Crystal defects and their impact on GaN HEMTs Although the AlGaN/GaN material system has intrinsic properties that make it an ideal choice for electronics applications, the ultimate performance of GaN-devices, and in particular AlGaN/GaN HEMTs, remains limited by degradation related to electricallyactive defects. Electrically active defects can produce deep levels capable of trapping charge. In this section, electrically-active defects in GaN will first be discussed. Then previous work showing the undesireable effects that defects can have on GaN HEMT performance will be presented. The performance of GaN devices is affected by a variety of crystal defects, including point and line (extended) defects. The lattice mismatch between a GaN layer grown atop a non-native substrate results in a high density of extended dislocation defects. Figure 2.8 shows a tunneling electron microscopy (TEM) cross-sectional image 17

40 of a 5 micron thick layer of MOCVD-grown GaN on a sapphire substrate, with dislocations extending vertically through the GaN layer [32]. Dislocation densities in GaN grown on non-native substrates are typically between 10 8 and cm -2. In some cases, dislocations are thought to act as leakage paths. Conductive-mode atomic force microscopy (AFM) and scanning Kelvin probe microscopy (SKPM) have shown conduction through negatively charged dislocations in GaN [33] [34] [35]. The magnitude of leakage through dislocations can be quite sensitive to growth conditions, with Ga-rich growth conditions resulting in a 3 orders of magnitude increase in the dislocation leakage compared with Ga-lean growth conditions [36]. Defects that are electrically active can produce deep levels in the bandgap capable of trapping charge. Standard deep level transient spectroscopy (DLTS) and deep level optical spectroscopy (DLOS) measurement have shown the presence of a variety of deep levels in GaN. In a study of n-type GaN grown by MOCVD, deep levels having energies , 1.35, , and 3.22 ev below the conduction band, with densities between and cm -3 have been reported [37]. Deep level optical spectroscopy measurements on MOCVD AlGaN/GaN heterostructures have shown a trap with energy 3.85 ev below the conduction band, located in the AlGaN layer [38]. 18

41 Figure 2.8: Tunneling electron microscopy (TEM) image of a 5 micron thick MOCVD GaN layer grown on a sapphire substrate showing threading dislocations defects extending from the sapphire substrate to the GaN surface. From Ref. [32]. Defects in GaN-based HEMTs can degrade performance by acting as gate leakage pathways and electron traps. The reverse-bias gate leakage has been correlated with the threading dislocation defect density in AlGaN/GaN HEMTs grown by molecular beam epitaxy under Ga-rich conditions [6]. In addition, gate leakage has been attributed to conduction through trap states and surface states [5] [39]. Besides acting as leakage paths, electrically-active defects near the 2DEG channel that trap electrons during transistor operation reduce the local 2DEG density and cause current collapse. Under HEMT biasing conditions where large electric fields are present near the drain-side gate edge, it has been observed that electrons can leak and fill traps in the drain access region in the AlGaN barrier, creating what has been referred to as a virtual gate [40], which reduces the local 2DEG density in the drain access region. When the biasing conditions are switched, the virtual gate persists as long as the trap states remain filled, thereby limiting the high-frequency performance. Charge trapping has also been thought to occur 19

42 beneath the conducting 2DEG channel, in the buffer layer [8] [41]. One way to observe the impact of trapped charge on HEMT performance is to record the transistor output characteristics as a function of time after switching the device from a condition where traps tend to fill to one where they do not. The output characteristic recorded as a function of time as traps emit is called a transient. Figure 2.9 shows drain-lag measurements where the channel current transient is recorded after switching from a biasing condition where there are intense electric fields between the gate and drain. The current transient increases with time as electrons emit from traps. Traps also manifest themselves in pulsed current-voltage (IV) measurements. Figure 2.10 shows 500 ns pulsed IV characteristics taken on an AlGaN/GaN HEMT, where the device was switched between a quiescent bias and the measurement bias. The solid black lines correspond to quiescent biasing conditions of V GS = V DS = 0 V, where trap filling is minimized. The dotted red lines correspond to quiescent biasing conditions of V GS = -4.8 V and V DS = 15 V, where trap filling is maximized resulting in current collapse. The significant reduction in the current for measurement bias conditions corresponding to the intermediate region between the linear and saturated regimes is referred to as kneewalkout, and can result from trapped charge in the drain access region within several hundred nanometers of the gate edge [42]. The performance of GaN HEMTs degrade under stressing conditions. Both radio-frequency (RF) and DC bias stressing can result in increased gate leakage and stronger trapping effects, both of which are correlated with defects [1] [3] [10]. 20

43 Figure 2.9: Current transients, recorded after switching from an applied drain bias of 30 V on an AlGaN/GaN HEMT, increase with time as trapped electron emit. From Ref. [43]. Figure 2.10: 500 ns pulse IV measurements on an AlGaN/GaN HEMT where the solid black line and the dotted red line correspond to quiescent bias conditions of V GS = V DS = 0 V and V GS = -4.8 V and V DS = 15 V, respectively. The significant reduction in the current for bias points in intermediate region between the linear and saturation regimes, is referred to as knee walkout, and is significant for the dotted red curves where trap filling is maximized during the quiescent bias. From Ref. [1]. 21

44 Particular electrically-active defects that affect AlGaN/GaN HEMT performance can be identified by spectroscopic macro-scale techniques where transients in the HEMT output characteristics are recorded as a function of temperature or incident photon energy to determine the signatures of particular traps. The signatures of a trap are the trap energy (relative to the conduction or valence band edges) and the trap cross section (thermal or optical). These spectroscopic techniques are referred to as deep level transient spectroscopy (DLTS) and deep level optical spectroscopy (DLOS), and will be described in more detail in the following chapter. Macro-scale deep level transient spectroscopy measurements on HEMTs allow traps located under the gate and in the drain access region to be distinguished, and enable trap densities to be estimated. Figure 2.11 shows transients at several temperatures from drain-control constant drain current DLTS (CI D - DLTS) measurements on a MOCVD-grown AlGaN/GaN HEMT. The transient amplitudes are dominated by a particular trap having an emission time constant on the order of 10 ms at room temperature, and a characteristic energy and thermal cross-section of E c 0.57 ev and 6 x cm 2, respectively. Under the bias conditions applied here, the trap is filled predominantly in the drain access region. A trap with these signatures has recently been observed in AlGaN/GaN HEMTs by several groups [1] [2] [3] [4] [44], correlates with stress induced degradation [1] [3], and has been thought to exist in the AlGaN barrier layer [3] [4] [44]. 22

45 Figure 2.11: Constant drain-current transients measured on an AlGaN/GaN HEMT as a function of temperature after switching from bias conditions where V GS = -3.3 V and V DS = 15 V to V GS = 0 and I DS ~ 72 ma/mm. The time constants of the exponential fits (dotted curves) are plotted in the inset in red, along with previous CI D -DLTS measurements in black, both revealing a dominant E c 0.57 ev drain access region trap. From Ref. [1]. The atomic force microscopy (AFM) based technique of scanning Kelvin probe microscopy (SKPM) has been used to directly measure trapped charge emission in AlGaN/GaN HEMTs with nm-scale resolution. Such measurements improve upon the spatial resolution of the macro-scale trap measurements by enabling traps to be resolved along the length and width of the drain access region. In Figure 2.12(a), previous SKPM measurements of the relative surface potential as a function of position near the drainside gate edge reveal negative trapped charge above the 2DEG within several hundred nanometers of the gate edge filled during the application of a large drain-to-gate bias, consistent with the virtual gate model [40]. Measurements of the surface potential at a 23

46 fixed location as a function of time after bias switching are shown in Figure 2.12(b). The surface potential transient has a shape similar to that of the drain current transients, suggesting that the traps observed in the surface potential affect the HEMT performance. However, the response time of these previous SKPM transient measurements was on the order of seconds after bias switching, making it impossible to resolve faster traps. In addition, these measurements are not spectroscopic, so that the signatures of particular deep levels cannot be identified. 24

47 Figure 2.12: (a) The surface potential recorded as a function of position from the gate edge in the drain access region after switching from a fill pulse of V GS = -12 V and V DS = 20 V applied for fill pulse times from 0 to 28 minutes. (b) Drain current and surface potential transients recorded at a fixed probe location after bias switching. From Ref. [45]. 25

48 Chapter 3 - Background on deep levels and deep level spectroscopy techniques In this chapter, we discuss the physics of capture and emission from deep levels and the macro-scale trap spectroscopy techniques used to identify particular deep level in standard capacitance structures and high electron mobility transistors (HEMTs). First, the occupation of traps is discussed in terms of the capture and emission rates. Thermal emission and photoemission are described. Then standard deep level transient spectroscopy (DLTS) and deep level optical spectroscopy (DLOS) measurement techniques on capacitance structures are discussed. Next, HEMT terminal characteristics are described and related to the spatial distribution of trapped charge. Finally, the macroscale deep level spectroscopy techniques applied to HEMTs are described. 3.1 Deep level capture and emission Semiconductor defects can produce electronic energy levels in the bandgap. If these energy levels are further from the band edges than the typical hydrogenic levels, then they are referred to as deep levels (or traps). For example, in Si or GaAs, states in the bandgap are considered deep if they are further than 0.05 ev from either band edge [46] 26

49 Particular deep levels can be associated with specific semiconductor defects. For example, a so-called EL2 level widely observed in GaAs has an energy level 0.75 ev below the conduction band (E c 0.75 ev), a thermal cross section ~1 x cm 2, and has been linked to AsGa antisites [47] [48]. In this section, we will discuss the capture and emission of electrons and holes to and from deep levels. Much of the content in this section and the following section on the standard DLTS technique, comes from Chapters 7 and 8 of The Electrical Characterization of Semiconductors: Majority Carriers and Electron States by Blood and Orton [46]. Neglecting transitions between trap states, there are four processes involving capture or emission that can change the occupancy of a deep level, as shown schematically in Figure 3.1. These processes include electron capture from the conduction band in Figure 3.1(a), electron emission to the conduction band in Figure 3.1(b), hole capture from the valence band in Figure 3.1(c) and hole emission to the valence band in Figure 3.1(d). In this treatment, the capture and emission rates per level, and, respectively, have units of. The subscripts, n and p, refer to electrons and holes, respectively. 27

50 Figure 3.1: Trap capture and emission processes, including (a) electron capture from the conduction band, (b) electron emission to the conduction band, (c) hole capture from the valence band, and (d) hole emission to the valence band. The rate at which electrons accumulate in or are expelled from a particular deep level is described by the rate equation for trap occupancy, 3.1 where is the trap concentration and is the concentration of traps occupied by an electron. Equation 3.1 asserts that the concentration of occupied deep levels increases when unoccupied states capture electrons or emit holes and decreases when occupied states capture holes or emit electrons Thermal emission To relate the thermal emission rates to the properties of a particular trap, we consider the case of thermal equilibrium, which requires that the concentrations of holes, electrons, and occupied traps remain constant. This enables the principle of detailed 28

51 balance to be invoked, which requires that the rate of electron emission must equal the rate of electron capture, and similarly for holes. This results in the following relations, and 3.2 In thermal equilibrium, Fermi-Dirac statistics apply which gives in terms of the trap energy, and the Fermi energy, as ( ( )) 3.3 where is Boltzmann s constant and is the absolute temperature. Here, we make a distinction between the nature of the capture rates per deep level,, and the emission rates per deep level,. Emission involves a transition from a deep level to a band containing many unoccupied states, thus the emission rates per deep level typically don t depend on the carrier concentrations, but on the intrinsic properties of the trap and semiconductor. Capture processes, on the other hand, require electrons or holes to transition to deep levels, so the capture rates per deep level depend strongly on the carrier concentrations. For electrons (and similarly for holes) we can write where is the capture cross section, is the root-meansquared (RMS) thermal velocity of conduction band electrons, and is the effective mass of electrons in the conduction band. In equilibrium, the carrier concentration,, depends on the Fermi energy and the density of states in the conduction band, and for nondegenerate semiconductors, can be written as ( ) where 29

52 ( ) is the effective density of states in the conduction band, and is the number of conduction band minima. The capture rates per deep level can now be written as ( ) and ( ) 3.4 Combining Equation 3.4 with Equations 3.2 and 3.3 gives the following expressions for the emission rates per deep level ( ) and ( ) 3.5 As expected, in Equation 3.5 are defined by the intrinsic properties of the trap and semiconductor while the have an additional dependence on the carrier concentration through the Fermi energy in the exponential terms in Equation 3.4. Thus, the capture rates per level can be modified with an applied bias, which changes the Fermi level, while thermal emission rates per deep level cannot. If, for simplicity, the exponential prefactors are all taken to be the same in Equations 3.4 and 3.5, then we can rank the emission and capture rates per level based upon the Fermi level and trap level. If the Fermi level is located near the conduction band, as is the case in unbiased n-doped semiconductors, and the trap energy is in the upper half of the bandgap but below the Fermi level, then, so that most of the traps will be filled with electrons. If the Fermi level is shifted to the middle of the bandgap, then, so that most traps will be empty. The inequalities used here to relate the emission and 30

53 capture rates per level are often strong inequalities ( > s can be replaced by s), unless the Fermi level is near the trap level, or is larger than or on the order of both and. Equation 3.5 can be written, for future use, as ( ) 3.6 where ( ) [49] Optical emission Trap emission can also be excited optically. If incident photons have energy,, larger than either or, trap emission is possible. If is less than half of the bandgap, then for a particular trap species, only one emission pathway is possible (either or ). If is larger than half of the bandgap, then optically stimulated electron and hole emission are possible from the same trap species. The optical emission rates for electrons or holes can be written as 3.7 where is the photon flux and is the optical cross section for electron or hole emission. The optical cross section is zero for less than and. For greater than or equal to either or, the energy dependent part of the cross section can be fit, for electron emission in this case, to [50]. [ ] 3.8 If the local bonding and/or the lattice arrangement is perturbed due to the change in occupancy of a deep level, Equation 3.8 may not describe the optical cross section 31

54 well. Since the optical emission process is fast compared with the time required for lattice rearrangement, the light energy required to excite emission may be larger than the actual trap energy by an amount referred to as the Franck-Condon energy. Models that take account of this affect can be used, if necessary, to fit the optical cross section [51] [52] Transient response The time-dependent trap occupancy,, is given by the solution of Equation 3.1, along with the initial occupation of the traps,. For particular trap species, where the concentration is much less than the doping concentration and the energy is sufficiently separated from the hydrogenic doping levels, we can take the emission and capture rates per level to be constants and the solution to Equation 3.1 is [ ] ( ) 3.9 where, and. The steady state trap occupancy for any initial trap occupancy is given by. With all traps initially filled, the exponential decay of trap occupancy is ( ) 3.10 If electron emission is dominant, then τ = 1/e n and Equation 3.10 reduces to ( )

55 3.2 Fundamentals of deep level spectroscopy techniques Deep level spectroscopy is achieved by analyzing trapped charge transients recorded at different sample temperatures or incident photon energies. These techniques can determine the trap density, trap energy (relative to the conduction band or valence band), and the thermal or optical trap cross section. In order to observe trap emission, there must be a mechanism to fill traps, and the sample must be such that there is a measureable that can be quantitatively related to the density of filled traps. The standard sample structures for such measurements are p + n (or n + p) diodes or Schottky diodes. The spectroscopic measurements performed on these structures, for thermally and optically stimulated emission, are referred to as deep level transient spectroscopy (DLTS) and deep level optical spectroscopy (DLOS), respectively. These standard techniques are discussed briefly in the following two sections. Similar deep level spectroscopy techniques have been developed to characterize traps in more complicated device structures, such as high electron mobility transistors (HEMTs). Macro-scale thermal and optical spectroscopy techniques sensitive to trap emission by its impact on the terminal characteristics of HEMTs will be described at the end of the chapter. The extension of deep level trap spectroscopy techniques to the nm-scale by detecting electrostatic forces between an atomic force microscopy (AFM) tip and trapped charge is described in the following chapter. 3.3 Deep level transient spectroscopy (DLTS) Developed in 1974 by Lang [53], deep level transient spectroscopy (DLTS) is a trap spectroscopy technique capable of characterizing small concentrations of traps in 33

56 semiconductors by measuring capacitance transients over a range of temperatures on diode test structures. DLTS measurements can determine energies, concentrations, and capture cross sections of traps with energies within ~1 ev of either band edge. It becomes impractical to measure traps outside of this range with DLTS because the thermal emission time constants of such traps can be extremely large. In such cases, deep level optical spectroscopy (DLOS), which relies on optically stimulated trap emission, can be used to characterize the deeper traps. In standard DLTS studies, the semiconductor is grown and processed with onesided pn (typically p + n) diodes or Schottky diodes because such structures enable the depletion region charge to be modulated with the applied bias and allow emission from depletion region traps to be detected via changes in the diode capacitance. Figure 3.2 shows the minimum conduction band energy, donor level, Fermi energy and a trap level in a Schottky diode structure under two different biasing conditions. In Figure 3.2(a), the diode is biased in a fill pulse condition with the Fermi energy more than kt above than the trap energy, so that nearly all of the trap levels are filled. In Figure 3.2(b), the diode is switched to a reverse bias measurement pulse condition so that the depletion region is enlarged and the Fermi level is more than kt below the trap energy to a significant depth into the semiconductor, so that previously filled traps will emit. 34

57 Figure 3.2: Trap capture and emission in the depletion region of a n-type Schottky junction under different bias conditions. (a) A fill pulse bias is applied to the junction so that nearly all traps beyond a distance x 0 from the junction are filled. (b) Switching to a measurement pulse with a larger reverse bias quickly sweeps out electrons and extends the depletion region. Occupied traps above the Fermi level emit over time, causing a slight reduction in the width of the depletion region, resulting in a junction capacitance transient. Figure from [46]. Figure 3.3 shows a schematic of the diode bias and diode capacitance plotted as a function of time. The diode is biased in a fill pulse for time t f, and then switched to the measurement pulse for a time t m with an applied reverse bias during the measurement pulse of V r. As traps emit over time during the measurement pulse, the emitted electrons are swept out of the depletion region, increasing the positive space charge density, reducing the depletion width, and, therefore, causing an increase in the diode capacitance given by [ ] [ ]

58 where N d is the donor concentration and is the steady-state diode capacitance at the end of the measurement pulse. By performing a Taylor expansion in Equation 3.12, we can write the change in diode capacitance due to trap emission,, as 3.13 If all of the traps are initially filled ( ), which is often a good assumption in standard DLTS measurements, then the total trap concentration from Equation 3.13 is where 3.14 is the total change in capacitance resulting from emission from a particular trap. In DLTS, it is possible to probe the vertical distribution of traps by carefully controlling the depletion depth during the measurement pulse and/or fill pulse biasing conditions. 36

59 Figure 3.3: Pulse bias sequence and corresponding junction capacitance. (a) The fill pulse is applied for a time t f to fill traps, followed by a measurement pulse for a time t m, which extends the depletion region, causing traps to empty over time. (b) The junction capacitance as a function of time during bias switching. The capacitance transient during the measurement pulse results from trap emission. Figure from [46]. Equation 3.13 relates the diode capacitance transient to the trap emission rate. If thermally induced emission is dominant, it is possible to extract the temperature dependent emission rates of specific traps by performing capacitance transient measurements over a range of temperatures. The thermal trap emission rates are related to the capture cross section and trap energy by Equation 3.6, which can be written in a slight different form as ( ) 3.15 If the thermal emission rates are plotted in an Arrhenius fashion, with ( ) on the vertical axis and 1/kT on the horizontal axis, the trap energy relative to the 37

60 conduction band (E c E t ) and the capture cross section can be extract from the slope and vertical intercept of a linear fit, respectively. The double boxcar analysis method, used since the introduction of DLTS, enables the electron emission rates of distinct traps to be extracted from capacitance transients measured at a series of temperatures. Fundamental to the double boxcar method is the concept of a rate window, defined by times, t 1 and t 2, chosen after switching to the measurement pulse. In standard DLTS, t 2 = 2.5t 1 is standard. The change in the capacitance between times t 1 and t 2 is defined as the DLTS signal. If both t 1 and t 2 are either much larger than or much smaller the emission time constant for a particular trap, the DLTS signal will be small. The peak in the DLTS signal will occur when the trap emission time constant is close to the rate window times. If the DLTS signal is plotted as a function of temperature, for a particular rate window, peaks will occur at various temperatures. The various peaks correspond to different trap levels. Figure 3.4 shows the DLTS signal extracted from capacitance transients recorded as a function of temperature with a single DLTS peak corresponding to a particular trap. The trap emission rate at the temperature at which the DLTS signal peaks, T peak, is given by ln t t en ( Tpeak ) t t Varying the rate window causes T peak to shift. Thus, by applying different rate windows to capacitance transients recorded at a series of temperatures, the emission rates for multiple traps can be determined as a function of temperature. 38

61 Figure 3.4: The DLTS signal, C(t 1 ) C(t 2 ), is extracted from measurements of capacitance transients at various temperatures. The times, t 1 and t 2, are referred to as a rate window. The DLTS signal peaks when the rate window times are similar to the trap emission time constant. From Ref. [46]. Figure 3.5 shows an example of DLTS measurements performed on a n-type GaAs Schottky diode [46]. The sample was irradiated with high energy electrons to produce defects. In Figure 3.5(a), the DLTS signal recorded as a function of temperature using four different rate windows shows a single peak corresponding to a single trap. In Figure 3.5(b), the trap emission rates are plotted in an Arrhenius fashion, and the trap 39

62 energy and cross section are extracted. The trap concentration, determined by the amplitudes of the DLTS peaks, was ~ cm -3. Figure 3.5: (a) DLTS on an n-type GaAs Schottky diode after high energy electron irradiation. The DLTS signal is plotted using four rate windows. The curves are offset vertically for clarity. (b) Arrhenius plot showing the extracted trap energy and capture cross section. Figure from [46]. 3.4 Deep level optical spectroscopy (DLOS) Traps with energies further than ~1 ev from either band edge are impractical to measure with DLTS because the thermal emission time constants of such traps are typically very large. Deep level optical spectroscopy (DLOS) is used to probe these traps [51]. Instead of varying the temperature (thermal energy) and analyzing the temperature 40

63 dependence of trap emission rates, as in DLTS, in DLOS the incident photon energy, is incremented and the trap signatures are determined by the dependence of the optical emission rate on the light energy. Standard DLOS measurements are performed in a fashion similar to DLTS measurements. As in DLTS, the standard DLOS sample is a Schottky diode, which in the case of DLOS measurements, must have a very thin metal Schottky contact to allow light penetration from the top into the depletion region of the diode. In DLOS, a single capacitance measurement starts by first applying a fill pulse bias in the dark. Then, the sample is switched to the measurement pulse bias conditions, and remains in this condition until the thermal trap emission transients decay away. Then, a fast light shutter is opened to expose the sample to light with energy, and, simultaneously, a capacitance transient begins recording. The capacitance transient is recorded until a steady-state condition is reached. Capacitance transient measurements are repeated with progressively higher photon energies until the desired range of energies is reached. The optical cross section can be determined as a function of the light energy using Equation 3.7 and the measured photon flux and emission time constants extracted from measured transients. In DLOS, the trap energies can often be extracted by fitting the measured cross section data using Equation 3.8. In cases where there is a significant Franck-Condon energy, more sophisticated fitting functions can be used [51] [52]. In DLOS studies, it is common to plot the steady-state photocapacitance, often in the form where N T from Equation 3.14 is plotted on the vertical access. 41

64 3.5 Macro-scale trap spectroscopy in GaN HEMTs In this section, the application of the DLTS and DLOS techniques to HEMTs will be presented. While the standard deep level spectroscopy techniques are sensitive to the impact of traps on the diode capacitance, macro-scale trap spectroscopy measurements on HEMTs are sensitive to the impact of traps on the HEMT terminal characteristics. In the following section, the ideal HEMT terminal characteristics will be discussed. Then, the impact of trapped charge and trap emission on the terminal characteristics will be presented. Finally, macro-scale trap spectroscopy techniques that allow discrimination between traps located under the gate and in the drain access region will be explained HEMT terminal characteristics The HEMT is one of a variety of field-effect transistors where the channel current flowing between the source and drain terminals is controlled by a voltage applied to the gate. Figure 3.6(a) shows a schematic cross-section of a very simple AlGaN/GaN HEMT structure. Ohmic source and drain contacts are made to the polarization-induced highmobility high-density two dimensional electron gas (2DEG) to form the transistor s conductive channel. The gate metal deposited over the AlGaN barrier forms a Schottky contact to the 2DEG channel, allowing the electric fields and the 2DEG charge to be modulated with an applied gate bias. Figure 3.6(b) shows a simple circuit representation of a HEMT comprised of an intrinsic transistor along with a series drain resistance, which includes the resistance of the drain-access region. The source terminal is connected to ground, and the gate-to-source and drain-to-source voltages, V gs and V ds, are applied. 42

65 Figure 3.6: (a) Schematic cross section of an AlGaN/GaN HEMT and (b) a model equivalent circuit diagram composed of an intrinsic transistor in series with a drain resistance R D. The terminal characteristics of a field effect transistor reveal the relationships between the terminal voltages and currents. Figure 3.7 shows an example of typical current-voltage (I-V) measurements on an AlGaN/GaN HEMT with applied gate voltages from 0 to -4 V in steps of 1 V. The two regions of the plot called the triode region and the saturation region correspond to regimes of operation in which the current is controlled by different mechanisms. 43

66 Figure 3.7: Current-voltage characteristics of an AlGaN/GaN HEMT showing the triode and saturation regions. V gs = 0, -1, -2, -3, and -4 V. The drain-source current in the triode region can be written as [54] [ ( )] 3.16 where is the 2DEG mobility, is the electron saturation velocity, is the device width, is the length of the device, is the barrier thickness, and is the dielectric constant of AlGaN. If the transport is mobility limited, then and Equation 3.16 reduces to ( ) 3.17 The threshold voltage of the transistor, V T, defined as the gate bias required to fully deplete the 2DEG channel when both the source and drain are connected to ground, is an 44

67 important device parameter. Most AlGaN/GaN HEMTs today are called depletion mode devices because they have negative threshold voltages, and are in the on-state (low resistance state) when V gs = 0 V. In the triode regime, where the gate-to-source and gateto-drain voltages, V gs and V gd, are both greater than the threshold voltage V T, nowhere is the 2DEG channel fully depleted. In the linear part of the triode regime, where ( ) in Equation 3.17, the 2DEG density under the gate is large compared with the variation in the 2DEG density along the length of the gate. Under these conditions, the device behaves as a gate-voltage controlled resistor, and can be modeled by an equivalent circuit, as shown in Figure 3.8 with two resistors in series representing the drain resistance, and gate-voltage controlled 2DEG resistance. Figure 3.8: An equivalent circuit for a HEMT biased in the linear part of the triode regime, and composed of a drain resistance, R D, along with an under gate resistance R G controlled by V gs. If is not much larger than in the triode region, the 2DEG density is lower on the drain-side of the gate, and the difference between the 2DEG density under the source and drain sides of the gate is a significant fraction of the average 2DEG density under the gate, causing to vary nonlinearly with. When, the 2DEG is fully depleted near the drain-side of the gate, and for larger values of the transistor is said to be in the saturation region because does not change significantly with V ds. The current in saturation can be written as [54] 45

68 ( ) 3.18 where. If the transport is mobility limited, then, and Equation 3.18 reduces to 3.19 In the saturation regime, where is greater than, there exists a region on the drain-side of the gate where the 2DEG is fully depleted. In this case, changing the drain bias changes the lateral extent of this drain-side depletion region, but it doesn t significantly affect the 2DEG density or the electric field profile on the source side of the device, therefore, the drain-bias typically doesn t significantly affect the current in the saturation regime. However, in saturation the gate bias does modify both the 2DEG density and the electric field profile on the source-side of the device and thereby controls. Therefore, in the saturation region the transistor can often be modeled as a gatevoltage controlled current source Impact of electrically-active defects. Electrically-active defects in HEMTs can significantly degrade HEMT performance by producing deep levels that trap charge and affect the terminal characteristics, typically by reducing the output current/power. The operation of AlGaN/GaN HEMTs over time results in degradation thought to be related to the generation of electrically-active defects [9]. 46

69 Figure 3.9 shows a schematic device cross-section with trapped electrons. Trap states have been thought to exist and trap charge under the gate and in the drain access region, both above the 2DEG in the AlGaN barrier, at the AlGaN surface, or in the surface passivation (if present), or below the 2DEG in the GaN buffer layer. To maintain charge neutrality, trapped electrons must be compensated by a reduction in the electron density somewhere else. When the trapped electrons are compensated by a reduction in the 2DEG density, the channel current is typically reduced. This is often referred to as current collapse. Figure 3.9: Schematic of an AlGaN/GaN HEMT showing trapped electrons in the AlGaN barrier and GaN buffer. The trapped electrons reduce the local 2DEG density. The impact of trapped charge on the terminal characteristics of HEMTs depends on the spatial distribution of the trapped charge. Charge beneath the gate or in the sourcegate access region tends to affect the threshold voltage V T, while trapped charge in the drain access region affects the drain resistance R D. 47

70 Figure 3.10 shows uniform sheets of trapped electrons underneath the gate, in the AlGaN barrier and in the GaN buffer. If it is assumed that the only sources of mobile screening charge are the gate metal and the 2DEG, then the trapped electrons in the AlGaN barrier will reduce the local electron density in the 2DEG and in the gate metal, while trapped electron in the GaN will reduce only the electron density in the 2DEG. The threshold voltage shift caused by the sheet of charge in the AlGaN is where is the distance between the trapped sheet charge and the gate metal, and is the areal trapped charge density. If the sheet of charge is located in the GaN, the 3.20 threshold voltage shift is independent of, and is given by 3.21 where is the thickness of the AlGaN barrier. Figure 3.10: Cross-section under the gate of an AlGaN/GaN HEMT with laterally uniform sheets of trapped charge in the AlGaN barrier and GaN buffer. 48

71 The threshold voltage shift associated with negative trapped charge reduces I ds in both the saturation and triode regimes. Equations 3.17 and 3.19 relate the threshold voltage shift to I ds in the triode and saturation regimes, respectively. In the linear part of the triode regime, where (V gs V T ) >> V ds and the transistor behaves as a gate-voltage controlled resistor, the V T shift is proportional to a shift in the resistance associated with the 2DEG under the gate, R G. Figure 3.11: Schematic diagram showing laterally uniform sheets of trapped charge located in the drain access region, which reduce the local 2DEG density and thereby increase the drain resistance R D. Trapped charge located in the drain access region primarily affects the drain resistance R D. Figure 3.11 shows a schematic with laterally uniform sheets of trapped charge located in the AlGaN barrier and in the GaN buffer. If the lateral extent of the charge is significantly larger than the distance from the 2DEG, then nearly all of the trapped negative charge will be compensated by a reduction in the local 2DEG density, 49

72 assuming that there are no other sources of screening charge. Assuming uniformity along the width of the device, the drain access resistance can be written as 3.22 where is the 2DEG density after all traps emit which is assumed to be constant in the access region, is the density of trapped charge which can vary with time and position only along the length of the device. The integral in Equation 3.22 is evaluated from the drain-side gate edge to the drain edge. If we consider trapped charge distributions that have a constant density, over a lateral extent, then Equation 3.22 reduces to 3.23 where is the distance from the drain-side gate edge to the drain. The change in drain resistance due to the presence of trapped charge is [ ] 3.24 which can be solved for the trap density giving 3.25 which shows a non-linear relationship between the change in drain resistance and the trap density, in which approaches as approaches. The change in drain resistance resulting from trapped negative charge in the drain access region, in principle, should cause significant changes in I ds in the triode region of the IV curve, and little change in the output current in the saturation region. In the linear 50

73 part of the triode region where the device behaves as a gate-voltage controlled resistor, the increase in drain resistance simply increases the series resistance, and therefore reduces the current. In the nonlinear part of the triode region, the 2DEG is not fully depleted anywhere and the 2DEG density is least near the drain-side gate edge, making most sensitive to trapped charge near the drain-side gate edge under these conditions. In the saturation region, since is typically nearly independent of, changes in the drain resistance do not significantly reduce. Though traps that affect the device are typically not observed in the source access region under normal biasing conditions, such traps would cause a reduction in in both the triode and saturation regions. In the triode region, trapped electrons in the source drain access region add another series resistance. In the saturation region, the additional voltage drop across the source access region resistance cause a decrease in the gate voltage relative to the intrinsic source terminal, which reduces Macro-scale deep level spectroscopy on HEMTs The purpose of trap spectroscopy on AlGaN/GaN HEMTs has been to identify traps that play a role in degrading the transistor terminal characteristics and that may be related to long-term device reliability. The macro-scale trap measurements on HEMTs, discussed here, are similar to the standard deep level spectroscopy measurements on diode structures discussed earlier in this chapter, in that both technique use a fill pulse bias to fill traps, followed by a measurement bias pulse to detect trap emission (thermally or optically induced) via the effects that the trapped charges have on the terminal characteristics. Also, both the standard deep level spectroscopy on diode structures and 51

74 the macro-scale deep level spectroscopy on HEMTs are capable of providing some information about the spatial distribution of traps. In order to produce an initial distribution of filled trap states in a HEMT structure, a fill pulse bias is applied. Unlike standard deep level spectroscopy measurements on diode structures, where the fill pulse bias can be applied so that nearly all traps in the region of interest are filled, in the case of an operating HEMT the fill pulse typically doesn t lower the trap energy below the Fermi level throughout much of the device. Instead, it has been observed that traps tend to fill most significantly under biasing conditions where there are large electric fields, typically strongest near the drain-side gate edge. Under such conditions, it is thought that electrons can leak and fill trap states in the barrier (AlGaN, AlGaN surface, or passivation), or in the buffer. Typical fill pulse biasing conditions that are used to produce large electric fields are ~, so that the 2DEG channel is depleted beneath the gate, and. In this work, the most common fill pulse biasing conditions are ~ ~ -5V and ~10 V, though other conditions are also used. After the fill pulse is applied, the device is switched to the measurement pulse bias conditions where trap emission can be observed via changes in the HEMT terminal characteristics. Since trapped charge located in the drain access region and under the gate affects the terminal characteristics differently, it is possible to distinguish traps under the gate and in the drain access region by choosing appropriate bias conditions during the measurement pulse. Since trapped charge in the access region primarily affects R D, and in the saturation region R D doesn t significantly affect I ds, drain-access region traps don t significantly affect I ds in the saturation region. However, traps located underneath the 52

75 gate can shift, which does cause to change in the saturation region. Therefore, measurement pulses where the transistor is biased in the saturation regime and either the shift or is recorded as a function of time as traps emit, will be most sensitive to trapped charge beneath the gate. The trap densities can be related to I ds and V T using Equations 3.17, 3.19, 3.20, 3.21, and To sense trapped charge in the drain access region, the device is biased in the linear part of the triode regime during the measurement pulse, typically with = 0 V for depletion mode devices. Under such conditions, the resistance associated with the 2DEG under the gate is minimized so that I ds is sensitive to R D, which is affected by trapped charge in the drain access region. The total resistance transient is recorded as a function of time as traps emit, and can be used to determine the density of trapped charge using Equation By comparing the results of the gatesensitive and drain-sensitive trap measurements, it is often possible to determine if a particular trap is filled predominantly under the gate or predominantly in the drain access region. Constant drain-current (CI D ) gate control and CI D drain control are macro-scale techniques capable of discriminating between traps located under the gate and in the drain access region. In gate control measurements the device is biased under saturation conditions, and the gate bias is adjusted to maintain a constant drain current. In drain control measurements, the device is biased in the triode regime with V GS ~ 0 V and the drain bias is adjusted to keep a fixed drain current [2] [11] [49]. Figure 3.12 (a) and (b) show the biasing conditions used for the gate-control and drain-control CI D measurements, respectively. In gate-control measurements, V ds is fixed and V gs is switched from ~ V T during the fill pulse to ~ -2 V during the measurement pulse. The 53

76 device is biased in the saturation regime during the measurements pulse, so that I ds is most sensitive to traps under the gate. A feedback loop adjusts the gate bias in order to maintain a constant I ds. In drain-control measurements, a fill pulse with V gs ~ V T is applied to deplete the channel, and a large positive V DS of ~10 V is applied to produce large electric fields near the drain-side gate edge that extend into the drain access region. The device is switched from the fill pulse to a measurement pulse condition in the linear part of the triode regime, so that the current is sensitive to changes in the drain access region resistance. In this case, a feedback loop controls V DS to maintain a constant I ds. Figure 3.12: Schematic showing the fill pulse and measurements pulse biasing conditions for (a) CI D drain control and (b) CI D gate control macro-scale transient measurements. (c) Drain bias V ds, gate bias V gs, and measured channel current I ds, while switching from the fill pule to the measurement pulse biasing conditions. Electron emission from traps during the measurement pulse result in a transient in the drain current. Adapted from Ref. [49]. 54

77 We have presented two measurement pulse biasing schemes typical used to distinguish gate-related and drain-related traps, though it can be fruitful to consider other biasing schemes for both the fill pulse and the measurement pulse. For example, measurements can be performed in the linear part of the triode regime with different gate biases. In this regime, as the gate bias is reduced from 0 V, the spatially uniform 2DEG density below the gate is reduced, so that resistance transients become more sensitive to traps under the gate. Fill pulse bias conditions where V gs is set well below the threshold voltage and V ds ~ 0 V have also been used [3]. Under these conditions, strong electric fields exist in both the drain and source access regions, and electric fields can extend deep into the buffer layer under the gate. As in the case of the standard trap spectroscopy, trapped charge transients in HEMTs are measured spectroscopically by recording transients in the terminal characteristics as a function of temperature, in the case of DLTS-type measurements, and as a function of photon energy, in the case of DLOS-type measurements. Figure 3.13 shows the results of drain control constant drain current (CI D )-DLTS measurements on an AlGaN/GaN HEMT grown by metalorganic chemical vapor deposition (MOCVD) [1]. Figure 3.13(a) shows CI D drain control measurements of transients in the drain bias V ds, at several temperatures. In this case, the transients are fit with single exponentials to extract the trap emission time constants. In the inset of Figure 3.13(a), the emission time constants corresponding to the exponential fits are plotted in red, and show the presence of a trap with energy 0.57 ev below the conduction band (E c 0.57 ev), extracted from the slope of the Arrhenius data. In the inset of Figure 3.13(b), several double boxcar rate windows are applied to the DLTS transient data. In these CI D drain control 55

78 measurements, the DLTS signal is the change in drain resistance. The emission time constants extracted from DLTS signal are plotted in the Arrhenius plot in Figure 3.13(b), and also correspond to the E c 0.57 ev trap. This demonstrates two methods for extracting emission time constants from transient data, namely by fitting with exponentials or by applying a double boxcar rate window. In this study, gate-controlled CI D -DLTS measurements did not show evidence of this E c 0.57 ev trap, which suggests that it is not filled significantly under the gate. Therefore, it has been concluded that the E c 0.57 ev trap is located in the drain access region [1]. Since the fill pulse conditions in the drain-control measurements were such that strong electric fields were present near the drain-side of the gate edge and out into the drain access region, filling of the E c 0.57 ev trap is correlated with the presence of these intense electric fields. 56

79 Figure 3.13: (a) Drain-control CI D DLTS measurements on an MOCVD-grown AlGaN/GaN HEMT reveal transients having temperature dependent emission time constants. The emission time constants plotted in the inset are consistent with emission from an E c 0.57 ev trap. (b) Arrhenius plot showing the emission time constant of the E c 0.57 ev trap along with the DLTS signal (inset) showing the E c 0.57 ev peak shift as a function of the DLTS rate window. From Ref. [1]. Figure 3.14 shows the results of drain-controlled CI D -DLOS measurements performed on MOCVD samples. Transients are recorded as a function of the photon energy. In Figure 3.14, the steady-state change in the resistance ΔR D, is plotted as a 57

80 function of photon energy, with extracted trap energies shown. The optical cross sections of the various traps are extracted from the transients. The trap energies are extracted from the optical cross section data, typically by fitting using Equation 3.4. In cases where a significant Franck-Condon energy is present, more complicated models can be used for the fits [51] [52]. Figure 3.14: Drain-control CI D -DLOS measurements on unpassivated and passivated HEMTs show that the impact of traps located in the drain-access region depend strongly on the passivation of the access region AlGaN surface. From Ref. [11] Limitations of macro-scale trap spectroscopy on HEMTs Although the macro-scale trap spectroscopy techniques applied to HEMTs are very powerful in that they allow particular traps directly affecting device performance to be identified, such methods are unable to directly probe the spatial distribution of trapped charge. The macro-scale techniques rely on models of the HEMT terminal characteristics 58

81 to relate transients in the terminal characteristics to trap emission. Although it is possible to distinguish between traps located in the drain access region and traps located under the gate, it is impossible to determine the vertical distribution of trapped charge, or the lateral distribution of traps either along the width of the device or along the length of the device, in the drain access region. Previously scanned probe techniques have been used to directly measure the spatial distribution of trapped charge in the drain access region of AlGaN/GaN HEMTs. However, in these previous studies, measurements were limited to slow transients with emission time constants on the order of seconds or longer. In addition, these measurements were not spectroscopic, and therefore were unable to identify particular trap levels. In this work, we ve developed scanned probe techniques to enable spectroscopic measurements of fast (ms-timescale) trap emission. These techniques will be discussed in the following chapter. 59

82 Chapter 4 - Experimental techniques: nm-scale deep level trap spectroscopy 4.1 Overview Nanometer scale scanned probe microscopy (SPM) started with the development of scanning tunneling microscope (STM) by G. Binnig, H. Rohrer, Ch. Gerber, and E. Weibel in 1982 [55], which allowed conductive surfaces to be imaged on an atomicscale. Atomic force microscopy (AFM) was subsequently developed in 1986 by Binnig, Quate, and Gerber to enable imaging of insulating samples as well [56]. A variety of SPM-based techniques have since been introduced to measure various sample properties, such as electrical, magnetic, piezoelectric, and optical properties, to name a few. In this work, we ve developed AFM-based techniques to extend the macro-scale deep level spectroscopy methods described in the previous chapter to the nm-scale, to enable particular traps that affect HEMT performance to be resolved on the nm-scale. In this chapter, the principles and experimental methods supporting these nm-scale trap spectroscopy techniques will be presented. First, AFM, AFM probe dynamics, and contact and noncontact topographic imaging modes will be introduced. Then, the AFM- 60

83 based technique of scanning Kelvin probe microscopy (SKPM), which is sensitive to the local surface potential, will be described and related to the distribution of trapped charge in the sample. Next, novel SKPM-based techniques developed in this work to measure fast surface potential transients (SPTs) after HEMT bias switching, will be presented. Finally, the SKPM based trap spectroscopy techniques sensitive to thermally or optically induced trap emission will be described. 4.2 Atomic force microscopy (AFM) The concept of AFM and AFM-based techniques is to measure local properties of a sample by detecting the forces between an AFM probe and the sample. AFM probes are usually comprised of a sharp tip attached to the free end of a cantilever. Probes are produced using a variety of materials and geometries for different applications. Figure 4.1(a) and (b) shows SEM images of a typical Si AFM probe. Figure 4.1(a) shows the rectangular cantilever with length µm, width µm, and thickness µm, attached at one end to a large Si chip. Figure 4.1(b) shows the tip, which is roughly pyramidal and has a radius of curvature of < 20 nm. Figure 4.2 shows how the tip-sample forces are typically detected in commercial AFMs. The AFM probe is lowered by a piezoelectric scanner (z piezo) until the tip nears the sample surface. During measurements, the distance between the end of the tip and the sample is typically between 0 and ~100 nm depending on the application and the AFM mode. Forces between the probe and the sample cause the cantilever to deflect. Ideally, most of the force on the AFM probe is applied to the tip, and not the cantilever. The backside of the cantilever is coated with a thin layer of metal to make it highly reflective. A laser beam is 61

84 aligned to the backside of the cantilever and to a 4 quadrant photo-sensitive detector (PSD) for measurements of the cantilever deflections. An AC bias applied to the z dither piezo can be used to drive AC oscillations of the cantilever. The x-y piezo scanner scans the sample across the tip for imaging. Since the z-piezo scan range is typically < 10 microns and the x-y piezo range is typically < 100 microns, most AFMs have additional course positioning in x, y, and z directions. Figure 4.1: Scanning electron microscopy (SEM) images of (a) a commercially available rectangular Si AFM cantilever/tip attached to a larger Si chip and (b) a zoomed in view of the end of the AFM tip. From Ref. [57]. 62

85 Figure 4.2: A schematic showing the typical AFM experimental setup. Tip-sample forces cause the AFM cantilever to deflect. The deflection is detected by the position of the reflected laser spot on the 4 quadrant photo-detector. The z piezo scanner and x-y piezo scanner allow the tip height and lateral tip position to be controlled. Due to the limited range of the piezo scanners, x, y, and z course positioners are also used. An AC bias can be applied to the z dither piezo to drive cantilever oscillations Park XE-NSOM AFM In this work, all of the scanned probe measurements were performed on a commercial Park XE-NSOM AFM. Figure 4.3(a) shows an image of the AFM. It has an optical column for an optical microscope and a separate vertical optical column for nearfield scanning optical microscopy (NSOM) measurements. NSOM measurements were not performed in this work. The x-y piezo sample stage has a scan range of 100 μm by 63

86 100 μm. The AFM head, shown in Figure 4.3(b) has integrated a cantilever laser, z piezo scanner, z dither piezo, and four quadrant photodetector. Figure 4.3(c) shows the underside of an AFM head with a mounted AFM probe. The probe is attached to a nickelcoated steel chip holder using super glue or epoxy. Silver paste can be used to make electrical contact between the AFM chip and chip holder. A magnet in the probe hand holds the chip holder. Several probe hands are available for different imaging modes. We currently have three standard probe hands with integrated z dither piezos, magnets to hold a steel chip holder, and built in electric contacts to the AFM probe. We also have a probe hand designed for scanning capacitance microscopy (SCM) measurements. Three AFM heads were included with the Park system. The AFM head shown in Figure 4.3(b) was designed with optical access from the side and has a 850 nm (~ 1.45 ev) laser. The coupled fiber optic and lens shown in Figure 4.3(b) can deliver monochromatic light to the sample. An electrical break-out box allows control over, and access to, many of the AFM electrical inputs and outputs. The AFM has capabilities, including scanning Kelvin probe microscopy (SKPM), scanning capacitance microscopy (SCM), conductive AFM (I-AFM) and others. We ve developed novel SKPM-based techniques to enable mapping of fast trapped charge transients, which will be discussed later in this chapter. Lownoise SCM techniques developed to measure the absolute capacitance at ~1 MHz are presented in Appendix A. The AFM sits on a commercial minus k TECHNOLOGY passive vibration damping system, and is acoustically and optically isolated by a soundproof light-tight enclosure. Contact, non-contact, and intermittent contact topography imaging modes are possible with this system. In the work presented here, the contact and non-contact topography modes were used. Both will be described in this chapter. 64

87 Figure 4.3: (a) Park Systems NSOM AFM with an optical column designed for an optical microscope and NSOM access. (b) Zoom in view of the AFM head the x-y piezo stage. The AFM head, designed for side optical access enables monochromatic illumination of the sample via a fiber optic/lens. (c) Underside of the AFM head showing the AFM probe chip mounted to a steel chip holder held magnetically to the probe hand. 4.3 AFM probe as a damped harmonic oscillator The dynamics of the AFM cantilever is typically modeled as a damped harmonic oscillator. In this case, the vertical displacement of the end of the cantilever from equilibrium, z(t), is described by [58] 65

88 4.1 where is the free oscillation resonant frequency of the cantilever, is the cantilever linear spring constant, is the quality factor, and is an oscillatory external force acting on the AFM tip. For an AFM probe with a uniform rectangular cantilever having length, L, width, w, and thickness, d, the linear spring constant and an effective cantilever mass can be written as and 4.2 where is the cantilever material density and is Young s modulus. The cantilever 4.3 resonant frequency can be caluculated approximately as. The quality factor Q, is proportional to the ratio of the total energy stored in the oscillating AFM cantilever to the energy dissipated per oscillation cycle. In the case of a constant external force ( ), Equation 4.1 reduces to Hooke s law ( ). The steady-state solution to Equation 4.1 is determined by assuming where is a complex amplitude. This leads to the following solutions for the cantilever oscillation amplitude

89 and phase ( ( ) ) 4.5 Figure 4.4 and Figure 4.5 show plots of the oscillation amplitude and phase calculated from Equation 4.4 and Equation 4.5, respectively, for Q = 100, 200, and 300. The oscillation amplitude is at, increases to near the cantilever resonant frequency ( ), and approaches zero as. The cantilever oscillations are in phase with the external force at low frequencies ( ), are 90 degrees out of phase at the resonant frequency, and are 180 degrees out of phase at high frequencies ( ). 67

90 Figure 4.4: Oscillation amplitude of a damped driven harmonic oscillator as a function of the driving force frequency for Q = 100, 200, and 300. Figure 4.5: Oscillation phase of a damped driven harmonic oscillator as a function of the driving force frequency for Q = 100, 200, and

91 After an abrupt change in the amplitude of the drive force, the oscillation amplitude of the cantilever decays or increases exponentially with time with a time constant that is largest for frequencies near the resonant frequency. At the resonant frequency, the steady state oscillation amplitude and phase are reached after oscillations. This is sometimes referred to as the cantilever ring up or ring down time. For a cantilever with a resonant frequency of and quality factor of, the ring up/down time is ~2.5 ms. Due to the significant enhancement of the cantilever oscillation amplitude at the resonant frequency and the high sensitivity of the amplitude/phase near resonance, many AFM-based techniques are designed to operate at or near the cantilever resonant frequency. 4.4 Topography imaging The most common function of AFM is topography imaging where the AFM tip is scanned across the sample in close enough proximity to the surface so that the physical sample structure is measured. Several AFM topographic imaging modes are commonly utilized in different applications. These include contact, noncontact, and tapping modes. In this work, noncontact mode imaging was used almost exclusively, though contact mode imaging was also used. These two imaging modes are described here. In contact mode imaging, the AFM probe is in repulsive physical contact with the sample surface with a fixed cantilever deflection angle maintain while scanning the probe. The repulsive force often results from the Pauli exclusion force. Figure 4.6 shows a schematic diagram of the setup for contact mode topography measurements. While 69

92 scanning the tip, a feedback circuit controls the z piezo voltage to maintain a fixed A-B photodetector output. The A photodetector output is the sum of the upper two quadrants of the photodetector, and the B photodetector output is the sum of the lower two quadrants of the photodetector. The voltage applied to the z piezo is recorded and can be converted to a topography image if the relationship between the applied z piezo voltage and the displacement of the z piezo is known. Since the AFM tip is scanned over the sample surface while in continuous physical contact, the AFM tip or sample can easily be damaged during contact mode imaging. Figure 4.6: AFM contact mode topography setup. Repulsive tip-sample forces cause a DC deflection of the AFM cantilever that is detected by the location of the reflected laser spot on the 4 quadrant photo-detector, which produces a corresponding A B voltage output signal. A proportional-integral (PI) feedback circuit controls the voltage applied to the z piezo scanner to maintain a constant A B signal, and therefore, a fixed cantilever deflection. If the x-y piezo scans the sample, the sample topography can be extracted from the applied z piezo scanner voltage. 70

93 Unlike contact mode imaging in which a fixed deflection of the cantilever is maintain, noncontact mode topography imaging is an AC technique in which a feedback loop adjusts the z piezo voltage in order to maintain a fixed cantilever oscillation amplitude or phase. As the AFM tip approaches the sample surface, the forces are typically dominated, at sufficiently small tip-sample distances, by a so called Lennard- Jones potential, which has a longer range attractive component due to the Van der Waals interaction, along with a shorter range repulsive component affected by Pauli exclusion. For tip-sample distances in the range where the magnitudes of the attractive and repulsive forces are similar, the curvature of the potential energy vs. distance curve results in a force gradient,, which causes an effective reduction in the cantilever spring constant resulting in a reduction in the cantilever resonant frequency relative to the resonant frequency with the tip far from the sample (free resonant frequency). To take advantage of this effect, in non-contact mode imaging the AC voltage applied to the z dither piezo shakes the cantilever at a fixed frequency slightly above the free resonant frequency of the cantilever, ideally at the frequency where the slope of the amplitude vs. frequency curve is maximized. When the tip is brought close to sample, the shift in the resonant frequency of the cantilever causes the cantilever amplitude (phase delay) to decrease (increase). Thus, to measure the sample topography in noncontact mode imaging, the tip is scanned across the surface and the z-piezo voltage is controlled by a feedback loop to maintain a fixed oscillation amplitude or phase. Figure 4.7 shows the noncontact mode experimental setup. The A-B signal from the photodetector is connected to the input of a lockin amplifier (LIA). The LIA is set to output a voltage signal 71

94 proportional to either the amplitude of phase of the A-B signal at the frequency of the applied AC bias. This voltage signal is the input to a feedback circuit that adjusts the voltage applied to the z-piezo scanner to maintain a fixed oscillation amplitude or phase. As in the case of contact mode imaging, the applied z-piezo voltage is recorded while scanning the sample surface and can be converted to the sample topography. Figure 4.7: Non-contact mode imaging setup. An AC bias applied to the z dither piezo vibrates the cantilever at a frequency slightly above the free cantilever resonant frequency, ideally near the maximum slope of the amplitude vs. frequency curve. A lockin amplifier detects the corresponding oscillations of the A-B signal, and outputs the oscillation amplitude or phase. A feedback loop controls the z piezo scanner to maintain a fixed amplitude or phase. 72

95 4.5 Scanning Kelvin probe microscopy (SKPM) Scanning Kelvin probe microscopy was developed in 1991 by Nonnenmacher, O Boyle, and Wickramasinghe [59] as an AFM-based embodiment of the Kelvin probe developed by Lord Kelvin in 1898 [60]. Scanning Kelvin probe microscopy enables quantitative measurements of the local contact potential difference between the AFM probe and the sample. In SKPM, a feedback circuit controls the voltage applied to the AFM probe to minimize the attractive electrostatic tip-sample force or force gradient. The voltage applied to the probe, denoted V sp, is recorded as a measure of the local contact potential difference, which is affected by the sample surface potential. We will often refer to V sp as the local surface potential. In this work we ve used amplitudemodulation SKPM (AM-SKPM), which is sensitive to the electrostatic force between the tip and sample. Although the frequency-modulation SKPM (FM-SKPM) technique, which is sensitive to electrostatic force gradient, can have improved lateral resolution, it will not be discussed further in this work Electrostatic tip-sample force ( The electrostatic force between an AFM probe and sample depends entirely on the forces between the charges distributed on the AFM probe and sample. In SKPM, the AFM probe is typically either a solid conductor or, more often, a silicon probe with a conductive coating. Figure 4.8 shows a schematic of a conductive probe and a sample with an arbitrary charge distribution. The sample is electrically connected to a grounded sample chuck. A voltage, applied between the probe and sample enables the charge on each to be modulated. The sample may be a conductor, a semiconductor, an insulator, or 73

96 any combination of the three. The electrostatic force on the AFM probe, in general, can be determined by calculating the force on each charge on the probe surface. Figure 4.8: Conductive AFM probe in close proximity to a sample with an arbitrary distribution of positive (+) and negative (-) charges. The electrostatic force on the probe is the sum of all the forces between charge on the probe and sample. The voltage V, modulates the charge on the probe and sample. Now, examples will be presented to demonstrate the electrostatic tip-sample forces as a function of the voltage V on several sample structures. First, we will consider examples where the surface potential is laterally uniform. Then, an example will be presented to demonstrate the difficulties that can arise when the lateral variations in the surface potential are on the order of or smaller than, the probe dimensions : metal sample Here we consider a metal sample with a work function, that differs from the work function of the metal coating on the AFM probe,, by an amount. 74

97 If the AFM probe and the sample are electrically isolated as shown in Figure 4.9(a), the charge density is zero on the sample and the probe so that there is no electrostatic force on the tip or sample. If the AFM probe and the sample are connected by a conducting wire as shown in Figure 4.9(b), charges will flow from the probe to the sample to equalize their Fermi levels. Under these conditions, the electric potential of the probe and sample differ so that an electric field will exist between them and they will experience an attractive electrostatic force. If a DC voltage equal to is applied between them (with the proper polarity), the transferred charge will return, leaving the AFM probe and the sample at the same electric potential, so that both the electric field and attractive electrostatic tip-sample force vanish. In AM-SKPM, we call the voltage applied to the AFM tip to minimize the attractive electrostatic forces between the tip and the sample. In this work, is called the SKPM signal or the local contact potential difference or the local surface potential. In the case of a metal sample just described, is equivalent to the difference in the work function between the metal tip and metal sample. Also note that in this example, it was possible to eliminate all of the charge and all of the electric fields between the tip and sample because they both have equipotential surfaces. 75

98 Figure 4.9: Schematic of charge distributions on a metal coated AFM probe and a metal sample having different work functions with the probe and sample (a) electrically isolated, (b) electrically connected by a wire, and (c) electrically connected with an applied bias equal to the difference in the work functions. Charge transferred from the probe to the sample after connecting the wire in (b) is forced back by the applied bias in (c), nulling out the electrostatic tip-sample forces. 76

99 The electrostatic forces can be described more precisely in this case by considering the capacitive force between the AFM probe and sample. The electrostatic energy stored in a capacitor can be written as 4.6 where, in this case, C=dQ/dV is the capacitance between the metal sample and the AFM probe, and Q is the charge on the tip. Taking the partial derivative of Equation 4.6 with respect to the vertical component z, gives the vertical component of the force as 4.7 Since can be taken to be constant and is independent of in this case, is parabolic in. Also, notice that the capacitive component of the electrostatic force is always attractive except at, where it is zero : charged laterally-uniform insulating sample Now we consider a laterally uniform sample composed of a metal with work function with an insulator on top having a fixed uniform negative sheet charge with density a distance above the metal surface, as shown in Figure In this case, a positive sheet charge with density will be induced on the top surface of the metal sample to constrain electric fields to the region between the two sheets of charge. The magnitude of the electric field in this region is where is the dielectric constant of 77

100 the insulator. The resulting electric potential above the negative fixed sheet charge (relative to the potential in the metal) is If an AFM probe is brought in, the component of the electrostatic force between the probe and sample is 4.8 ( ) 4.9 which is identical in form to Equation 4.7, except for the voltage offset resulting from the layer of fixed charge in the insulator. As in the previous example, is always attractive except at one value of, in this case. Figure 4.10: Charged laterally-uniform insulating sample. The insulator in green, has a uniform density n of trapped negative charge a distance d above a metal with work function. 78

101 4.5.4 Lateral resolution of SKPM Thus far, we have considered examples where the electric potential is laterally uniform when the attractive electrostatic force on the tip is minimized. However, the purpose of SKPM is to quantify the tip-sample forces with nm-scale spatial resolution, so laterally uniform samples do not take full advantage of SKPM. If the length-scale of lateral variations in the sample surface potential is much larger than the size of the AFM probe, SKPM will accurately measure the surface potential. If the length scale of lateral variations in the surface potential are on the order of, or smaller than, the size of the AFM probe, then, in general, the SKPM signal represents a weighted average of the nearby sample surface potential distribution, which depends on the sample structure, probe shape, and tip-sample distance [61]. This limitation is more severe in AM-SKPM, where measurements are sensitive to the electrostatic force, compared to FM-SKPM, where measurements are sensitive to the electrostatic force gradient [62]. To demonstrate this limitation, topography and AM-SKPM maps taken on the Park electric force microscopy (EFM) test sample are shown in Figure The EFM test sample consists of two sets of interpenetrating gold fingers deposited on a Si wafer. The sets of gold fingers can be independently biased. From the topography image in Figure 4.11(a) we see that the gold fingers are ~2.5 µm wide, ~100 nm tall, and are separated by ~2.5 µm. A voltage of 0.5 V is applied between the two sets of fingers, resulting in alternating high and low surface potentials, as shown in Figure 4.11(b). Figure 4.11(c) shows a line profile of V sp taken along the red line from Figure 4.11(b). We see that the change in V sp between the two sets of finger is ~450 mv, which is 10% less than the applied voltage. In these measurements, the AFM cantilever had a width of ~20 µm, a tip height of ~20 µm, and an expected tip 79

102 radius of curvature of ~20 nm. The smaller than expected V sp signal can be explained by the fact that the electrostatic force is long range and the cantilever and probe dimension are larger than the variations in the sample surface potential. Figure 4.11: Simultaneous measurements of (a) topography and (b) V sp on a sample consisting of two sets of interpenetrating gold fingers on a Si wafer. A voltage bias of 0.5 V was applied between the sets of gold fingers. (c) A V sp line profile corresponding to the red line shown in (b). 80

103 4.5.5 Amplitude-Modulation SKPM In amplitude-modulation SKPM, a feedback circuit applies a voltage to the AFM probe to minimize the attractive electrostatic force between the tip and sample. This voltage is recorded as the local surface potential,. Typically, SKPM measurements are designed to be sensitive to cantilever oscillations induced by the application of an AC voltage. If we consider the tip-sample force to be composed of the capacitive force between the AFM probe and a laterally uniform charged insulator on metal sample described by Equation 4.9, with an applied tip voltage, then the z component of the force is ( ) 4.10 Equation 4.11 can be expanded into the sum of the following DC,, and terms (( ) ) 4.11 ( )

104 In amplitude-modulation SKPM, a feedback circuit controls to null out. In this case, is recorded, and is called the local contact potential difference or local surface potential. Figure 4.12 shows a schematic of the typical AM-SKPM setup. An AC voltage,, is applied to the probe tip through a summing circuit. The A-B output of the 4 quadrant photo-detector is connected to the input of a lockin-amplifier with a reference set to detect at the frequency of the AC bias,. The lockin phase is adjusted so that cantilever oscillations that result from electrostatic forces appear in the X-channel output of the lockin. The X-channel output is connected to the input of an SKPM feedback circuit. The output voltage from the SKPM feedback circuit,, is applied through the summing circuit to the AFM probe to minimize the X-channel output, and therefore to minimize the electrostatic tip-sample force at frequency ω. 82

105 Figure 4.12: Schematic of a typical AM-SKPM setup. A sinusoidal AC bias at frequency ω is applied to the AFM probe through a summing circuit. Oscillations of the AFM probe at frequency ω are detected using a lockin amplifier. The SKPM feedback circuit controls the DC bias, V sp, applied to the AFM probe to null out the lockin output. V sp is recorded as the local surface potential. 4.6 Time-resolved SKPM measurements of emission from deep levels in HEMTs Scanning Kelvin probe microscopy measurements recorded as a function of time can be used to measure the emission of carriers from deep levels on the nm-scale. The emission of carriers from traps changes the distribution of charge in the sample and can thereby change the measured surface potential. In this section, I will describe the timeresolve SKPM techniques that we ve developed to reliably measure trapped charge emission in AlGaN/GaN HEMTs with millisecond time resolution after large (~10 V) HEMT bias switching. 83

106 To measure emission from trap states, the trap occupancy must be modulated. In the AlGaN/GaN HEMTs studied here, this is achieved by switching the HEMT terminal voltages between fill pulse and a measurement pulse biasing conditions, in a manner similar to that described in Chapter 3. During the fill pulse, some of the deep levels are filled with carriers. When the device is switched from the fill pulse to the measurements pulse some of the filled traps emit over time. Figure 4.13(a) and (b) shows schematics of the experimental configuration and the measured nm-scale surface potential, and macro-scale channel resistance. During the fill pulse, the applied gate bias V GS, and drain bias V DS, cause traps to fill. Typical fill pulse bias conditions used in this work are and. Under such conditions, the 2DEG under the gate is depleted so that very little current flows through the channel ( very large), and large electric fields exist near the drain-side gate edge. During the measurements pulse the device is typically switched to a bias condition, such as V GS = 0 V and V DS ~ 0.1 V, where trap filling is minimized. Emission of trapped negative charge during the measurement pulse causes to decrease with time and causes to increase with time. The time-dependent and V sp measured simultaneously during the measurement pulse are referred to as resistance transients (RTs) and surface potential transients (SPTs). A rate window defined by times t 1 and t 2 chosen after switching to the measurement pulse, as shown in Figure 4.13(b), can be applied to SPTs and RTs to extract the change in surface potential and change in resistance given by and ΔV sp = V sp (t 2 ) V sp (t 1 )

107 ΔR ds = R ds (t 2 ) R ds (t 1 ), 4.15 respectively. In chapters 5 and 6, we will plot ΔV sp as a function of tip location over a 2D grid of points to visualize the changes in surface potential resulting from trap emission between t 1 and t 2. Figure 4.13: (a) Schematic of the experimental setup showing a HEMT device with the gate and drain biased to V gs and V ds, respectively, and the source connected to a current amplifier at virtual ground. The AFM probe measures the local surface potential, V sp. (b) Schematic of measured resistance transients (RTs) and surface potential transients (SPTs) that result from trap emission during the measurement pulse. The capability to perform simultaneous time-resolved macro-scale RT and nmscale SPT measurements enables one to probe the spatial distribution of traps that affect 85

108 the performance of HEMTs. Time-resolved measurements allow the signatures and timescales of emission from different traps to be identified in both RTs and SPTs. By comparing the macro and nm-scale trap signatures we are able to spatially resolve trap emission that affects the performance of the device. Also, the simultaneous time-resolved measurements of RTs and SPTs are required for the nm-scale spectroscopic measurements techniques described later in this chapter. When a 2DEG exists at the AlGaN/GaN interface, the surface potential is sensitive only to trapped charge above the 2DEG, while the 2DEG resistance is sensitive to charge above and below the 2DEG. Thus, by comparing simultaneously measured SPTs and RTs, it is possible to distinguish trapped charge above and below the 2DEG. There are a number of technical issues that can arise when attempting to perform accurate SKPM measurements on HEMTs that undergo bias switching of ~10V. These include the following: (1) If the SKPM is performed with both the topography and the SKPM feedback loops on, crosstalk issues can compromise the accuracy of the measured SPTs. (2) If the metal coated AFM probe makes electrical contact with the gate or drain metal and a significant potential difference exists between them, the AFM probe and/or the HEMT can be damaged by a large current flow. (3) It can be difficult for standard AM-SKPM feedback circuits to accurately track the HEMT surface potential soon after the voltage bias applied to the HEMTs gate or drain terminal are switched by ~10V. We have developed SKPM-based SPT measurement techniques that solve the above technical difficulties and enable SPTs to be accurately and reliably measured 86

109 within ~1 ms after HEMT bias switching, without damaging the AFM probe or sample, and with relatively low noise. To solve issue (1), we have adapted the Park AFM to perform SPKM measurements with the topography feedback turned off. Issue (2) has been addressed by adding a ~1250 Ω resistor in series with the AFM probe, as shown schematically in Figure 4.14(a), to limit the current if the tip happens to make contact with the sample. Figure 4.14(b) and (c) show the two ends of the cable that includes the removable resistor located inside the AFM head designed for NSOM. In order to significantly reduce tip-sample contact, we have added the capability to lift the AFM probe tip during SKPM measurements. Issue (3) was addressed by implementing a novel adaptive SKPM feedback technique which enables millisecond time-scale SPTs to be measured after ~10 V HEMT bias switching without having to increase the bandwidth of the feedback loop. This avoids the increase in noise that typically accompanies an increase in the bandwidth. The adaptive SKPM feedback technique will be described in detail later in this chapter. 87

110 Figure 4.14: (a) Schematic showing the 1250 Ω resistor added to protect the AFM probe and sample from damage cause by large current flow. The resistor is soldered into a removable cable that is connected in the AFM head as shown in (b) and (c). 88

111 Now that the solutions to the technical difficulties have been introduced, the sequence for the computer automated SPT measurements will be described. Individual SPTs are recorded at a fixed probe location, and can be measured over a 2D grid of points in an automated fashion. Initially, the AFM tip is engaged with the sample surface with noncontact mode feedback turned on, and the tip height is recorded. Then, the noncontact mode feedback is turned off. Next, the z-dither voltage is switched off (set to 0 V), and the tip height is changed (typically increased) by a preselected distance. Next, computercontrolled relays are switched to apply the preselected fill and measurement pulse biases to the gate and drain, and to connect the AFM tip to the SKPM circuit. A preselected number (typically 3 or 4) of surface potential and channel resistance measurements are then recorded, each over one or more HEMT biasing cycle, to enable the adaptive SKPM feedback to settle down, and to allow for averaging. When the measurements are complete, the AFM tip, gate, and drain are grounded. Then, the tip height is increased by a preselected amount to protect the tip, the z-dither voltage is turned on, and then the noncontact mode feedback is turned on, causing the AFM tip to reengage with the surface, completing the transient measurements at one location. If SPTs are being recorded at multiple tip locations, the tip then moves to the next location and repeats the sequence. A variety of quantities can be extracted from each of the time-dependent transient measurements, and plotted as 2D maps. For example, ΔV sp, defined in Equation 4.14, can be plotted using different rate windows to visualize trapped charge emission within different time intervals after bias switching. Also, V sp can be extracted at a times near the end of the fill pulse to show the surface potential distribution under large applied 89

112 bias, or V sp at the end of the measurement pulse can be plotted to show the surface potential at long times after bias switching when only deep traps might remain filled Adaptive SKPM feedback technique In this section, we will discuss the novel SKPM adaptive feedback technique that we ve developed to enabled SPTs to be accurately measured with ms-scale response time after large (~10 V) HEMT bias switching. When the gate and drain bias applied to a HEMT are switched from a fill pulse bias condition such as V gs = -5 V and V ds = 10 V to a measurement pulse bias condition such as V gs = V ds = 0 V, there is a large abrupt shift in the surface potential over much of the device due only to the rapid rearrangement of free charges in the metal contacts and 2DEG channel. At locations where charges are trapped during the fill pulse bias, there may also be slower transients in the surface potential that occur due to carrier emission from traps. Typical SKPM feedback circuits, such as proportional-integral (PI) feedback circuits, have a finite response time following abrupt changes to the feedback input, which tend to increase as the magnitude of the abrupt change increases. To illustrate this, let s consider an example where SKPM is performed with a standard feedback loop over the drain metal on a HEMT with the drain bias being pulsed from 0 to 10 V repeatedly, with a period of 250 ms. Figure 4.15(a) shows a schematic of the measurement with the standard SKPM feedback loop shown. Figure 4.15(b) and (c) show the applied drain bias and the measured surface potential over a single cycle. Notice that the measured surface potential is inaccurate for a response time t res, after bias switching. If the amplitude of the drain bias were increased, 90

113 t res would typically also increase. The response time can often be reduced to some extent by increasing the proportional and/or integral gains, however this is typically accompanied by an increase in the noise and possible stability issues. For SPT measurements at locations where there is trapped charge emission, it is impossible to resolve traps that emit with time constants shorter than t res. Figure 4.15: (a) Schematic of an AM-SKPM setup over a biased drain contact with a typical PI SKPM feedback. (b) Typical measured V sp and V sp error signal at a fixed probe location measured as a function of time with a rectangular voltage pulse applied to the drain contact. The measured V sp is inaccurate for a time t res after bias switching. The time response can be reduced significantly if there is an additional parallel feedback channel that adds a signal, derived from past cycle measurements and user inputs, to the standard PI feedback signal. Figure 4.16 shows a schematic of a generic 91

114 implementation of this, which we refer to here as adaptive feedback. The surface potential signal applied to the tip is now composed of the sum of the output of the standard SKPM PI feedback along with a function generator output, V fg. The output settings of the function generator are controlled by Labview software on the PC. These settings are determined by past measurements of V sp over bias cycles and/or user controlled settings. The purpose of the adaptive feedback channel is to reduce the SKPM response time well below that achieved by the PI feedback alone. Figure 4.16: SKPM experimental setup with an additional adaptive feedback signal. The output of the function generator is added to the PI feedback output. The function generator output is controlled by Labview software on a PC. The output settings of the function generator are determined by previous surface potential measurements and/or user inputs. 92

115 Now, we consider possibly the simplest implementation of the adaptive feedback, which is often well-suited for SPT measurements on HEMTs. Let us again consider the AFM probe fixed in position over the drain metal, as shown in Figure 4.15(a). The drain is again pulsed with a voltage as shown in Figure 4.17(a). In this example, for the first bias cycle V fg is set to 0V, as shown in Figure 4.17(b). The resulting V PI, V sp, and V sp error signal during the first cycle are shown in Figure 4.17(c),(d),(e), respectively. After the measurement of the first bias cycle/s is complete, the Labview program on the PC extracts values of V sp measured near the end of the fill pulse and the end of the measurement pulse from the recorded data, and sets the function generator to output a rectangular pulse with the voltages extracted from the fill and measurement pulses, as shown in Figure 4.17(g). The results of the second bias cycle are shown in Figure 4.17 (h) (i) and (j). Now, the V fg signal from Figure 4.17(g) is nearly identical to the surface potential, so that the PI loop isn t required to track the entire voltage switch, which significantly improves the response time in Figure 4.17(i), and significantly reduces the error signal in Figure 4.17(j). If the AFM tip is not over the drain metal but is close to trapped charge, the improved response time allows fast trap emission to be observed after bias switching. 93

116 Figure 4.17: An example of the signals applied and SKPM signals measured during the first two bias cycles with adaptive SKPM feedback with the AFM probe located over the drain contact undergoing 10 V bias switching. The cycle 1 and cycle 2 (a,f) drain bias V ds, (b,g) function generator output V fg, (c,h) PI feedback output V PI, (d,i) SKPM signal V sp, and (e,j) SKPM error signal. In cases where the SPT resulting from trap emission is fast and has a large amplitude, the PI channel of the adaptive feedback may not be able to accurately track the SPT itself. To address this issue, an additional exponential curve can be added to V fg 94

117 during the measurement pulse to account for the large, fast surface potential change caused by trapped charge emission. The amplitude and time constant of the added exponential function can be manually selected by the user, or could be selected by fitting previous V sp data in some fashion. In this work, in cases where it was beneficial to also add an exponential curve, the parameters were selected by the user. 4.7 nano-dlts Surface potential transient measurements of trap emission can be made spectroscopic, in a way analogous to DLTS, by measuring SPTs as a function of temperature. Performing simultaneous measurements of SPTs and RTs as a function of temperature allow specific traps measured on the nm-scale to be directly linked to the device performance. To enable such measurements, we ve built a custom miniature magnetic probe station/temperature stage, shown mounted on the AFM x-y piezo scanner in Figure 4.18(a). A heating element and a thermocouple, sandwiched between copper plates, allow the temperature to be controlled up to 50 o C or larger while mounted on the AFM scanner. The highest temperatures required in this work were ~50 o C. The sample can be held in place atop the copper plates either magnetically, if the sample is attached to a steel sample puck, or using silver paste or double sided tape. For good thermal contact, thermal grease can be used, in addition. Once the sample is mounted, electrical contacts can be made to the source, gate, and drain contacts of a particular device using the three miniature magnetic XYZ probes. Figure 4.18(b) shows a zoomed-in image of one of the magnetic XYZ probes. The probes are positioned and electrical contact is made while the 95

118 stage is mounted on a separate setup station, shown in Figure 4.18(c). Lateral positioning of the probes is achieved using a modified tweezer tool comprised of a non-magnetic titanium tweezer that has a small piece of notched aluminum attached for improved positioning control. Vertical motion is achieved by pressing downward with a separate XYZ manipulator, shown in Figure 4.18(c). Electrical contact can be made by first adjusting the height of the probe, so that the tip is well above the sample surface. Using the microscope as a guide, the probe is positioned above the electrical contact pad. The microscope is focused slightly above the sample surface and the probe is slowly lowered until the tip comes into focus. Next, the microscope is focused on the sample surface, the lateral position of the probe is adjusted, and the tip is lowered until electrical contact with the probe is made. The tip can be lifted off of the electrical contact pad using tweezers. When making contact to a HEMT device, it is often best to make contact to the gate pad last and break contact with the gate pad first. 96

119 Figure 4.18: (a) Photograph of the miniature magnetic probe station/sample stage with integrated heater and thermocouple mounted on the AFM x-y piezo scanner. (b) Zoomed in photograph of one of the magnetic XYZ probes in electrical contact. (c) Photograph of the probe setup station where samples are mounted and electrical contacts are made. The microscope is connected to a CCD camera and computer monitor. The nano-dlts measurements are performed by simultaneously recording SPTs and RTs at a number of sample temperatures. The amplitudes and time constants of the measured transients can be extracted by fitting with exponential functions or, in principle, by applying a double boxcar rate window, as discussed in Chapter 3. The time constants extracted from SPTs can be compared to RT time constants and other macro-scale DLTS data to identify and locate particular trap species affecting device performance. The temperature is controlled by manually adjusting the voltage applied to the thin-film heater. In this system, increasing the temperature by ~30 o C causes the sample to drift laterally by several microns relative to the AFM probe. To reduce lateral drift during 97

120 measurements, the system was held at a fixed temperature for ~30 minutes before SPT measurements were started. 4.8 nano-dlos capabilities To probe deeper trap states on the nm-scale, we have developed nano-dlos capabilities where the surface potential can be recorded as a function of the incident photon energy hυ. Figure 4.19 shows a schematic of the nano-dlos system. A fiber optic/lens is coupled to a Xe lamp and monochromator setup capable of delivering ~1.2 ev to >4.3 ev light to the sample. The light-tight AFM enclosure isolates the sample from ambient light. A computer-controlled fast shutter allows the light to be turned on and off. Ideally, the nano-dlos measurements proceed in a similar fashion as nano- DLTS measurements, except that emission from traps is stimulated optically rather than thermally. First, the light is turned off and the device is switched from a fill pulse biasing condition to a measurement pulse biasing condition. The device remains in the dark during the measurement pulse until the shallower traps have thermally-emitted, leaving only deeper traps. At this point, the shutter opens, shining monochromatic light on the sample, and the surface potential and resistance are recorded. The light energy is then incremented, and this process is repeated. 98

121 Figure 4.19: Schematic of the nano-dlos system. A fiber optic delivers ~1.2 ev to >4.3 ev light from a Xe lamp, monochromator system to sample. A computer-controlled shutter turns the light on and off. 99

122 Chapter 5 - Imaging trapped charge emission in AlGaN/GaN HEMTs The work in this chapter was done in collaboration with A. R. Arehart and S. A. Ringel from The Electrical and Computer Engineering Department at The Ohio State University and with C. Poblenz, Y. Pei, J. S. Speck, and U. K. Mishra from the Materials and Electrical and Computer Engineering Departments at the University of California, Santa Barbara. 5.1 Introduction Fast, bias-induced, surface potential transients (SPTs) and conductance transients (CTs) were simultaneously measured on an AlGaN/GaN high electron mobility transistor (HEMT). SPTs measured near the drain-side gate edge and CTs have nearly the same shape, and are well-fit with two exponentials having room-temperature time constants of 4.2 ms and 36 ms, likely indicating emission from two trap species. Kelvin probe force microscopy (KPFM) was used to measure SPTs. Electrostatic simulations of SPT amplitudes, which account for the measured probe/sample geometry, are consistent with 100

123 a uniform trapped surface charge density of 7 x electrons/cm 2 extending 200 nm from the drain-side gate edge. 5.2 Motivation The AlGaN/GaN material system has excellent properties for high-performance radio-frequency (RF) power high electron mobility transistors (HEMTs). However, their ultimate performance and reliability are still strongly limited by transient carrier trapping during device operation [28]. Understanding the nature and spatial distribution of traps are critical to efforts to optimize performance and reliability. Device biasing can cause negative charge trapping at the AlGaN surface near the gate in these devices, creating a virtual gate, which reduces the local surface potential, local carrier density, and overall device conductance, causing current collapse at high frequencies [40]. Several previous studies have used SKPM to locally measure changes in surface potential produced by changes in trap occupancy near the channel region between source and drain [45] [63]. However, these measurements of surface potential transients (SPTs) were limited to relatively large time scales (of order seconds or longer), and did not identify specific defects known to be involved in HEMT device degradation. Recent macroscopic drain-lag and constant drain-current deep level transient spectroscopy (CI D -DLTS) measurements on AlGaN/GaN HEMTs reveal trap levels, likely filled between the gate and drain, with room-temperature emission time constants ranging from ~0.2 ms to ~30 ms [2] [11] [64]. Capture and emission from these traps during device operation affects the channel conductance and degrades device performance. A trap with energy 0.43 ev below the conduction band (E c 0.43 ev), and 101

124 an emission time constant of ~4 ms at 300 K has recently been observed in devices grown by molecular beam epitaxy (MBE) [11]. SiNs surface passivation reduces the impact of this trap, suggesting that emission occurs at or near the AlGaN surface. In devices grown by metal organic chemical vapor deposition an E c ev trap with an emission time constant of ~30 ms, at 300 K, has been linked to increased degradation during RF stressing [2] [4]. Filling of this trap is thought to occur in the AlGaN or at the AlGaN surface [3]. Analysis of macroscopic conductance transients measured after the device is pinched off and biased with a drain-gate voltage V dg = 18 V are consistent with initiallyfilled traps of uniform density ~ electron/cm 2 extending ~ nm from drain-side gate edge [2]. However, no spatially-resolved measurements have verified this proposed charge distribution, or have looked for lateral variations in the trap distribution that cannot be detected using macroscopic measurements. Here we report simultaneous room-temperature measurements of fast (~ms timescale) macroscopic on-state conductance transients (CTs) and nm-scale SPTs on an operating unpassivated AlGaN/GaN HEMT grown by MBE. We find that bias-induced SPTs, measured near the drain-side gate edge, and macroscopic CTs are well fit with two exponentials having time constants of about 4 ms and 36 ms respectively. These emission time constants lie near the range of time constants associated with emission from the E c ev and E c ev levels discussed above. Electrostatic simulations, which account for the measured probe geometry and tip-sample convolution effects, show that the measured spatial dependence of the SPT amplitude is roughly consistent with the density and spatial extent of the trapped charge distribution inferred from the macroscopic CT measurements [2]. 102

125 The AlGaN/GaN HEMT, grown by plasma-assisted MBE on a silicon carbide substrate, is composed of an 800 μm, unintentionally doped (UID) GaN layer and a 30 nm UID layer of Al 0.27 Ga 0.73 N, which results in the formation of a two dimensional electron gas (2DEG) at the AlGaN/GaN interface. Ohmic source and drain contacts are made to the 2DEG. A rectangular gate, measured to be ~300 nm thick, forms a Schottky contact to the 2DEG. The gate-drain spacing is 2 μm, the gate length is 0.9 μm, the source-drain spacing is 0.5 μm, and the device width is 75 μm, as shown in Figure 5.1. Figure 5.1: Schematic top view of the AlGaN/GaN High Electron Mobility Transistor (not to scale). The experimental setup is shown in Figure 5.2. The gate bias (V gs ) and drain bias (V ds ) are applied using a dual-channel function generator, and the current flowing through the 2DEG channel is measured from the source. The surface potential is measured by amplitude-modulation KPFM; a technique based on atomic force microscopy (AFM) in which the local surface potential (V sp ) is recorded as the tip bias required to minimize 103

126 cantilever oscillations at the frequency of the AC tip bias (V ac ) [59]. The KPFM technique, also known as SKPM, is discussed in further detail in Chapter 4. The amplitude of V ac was 500 mv. The adaptive SKPM feedback techniques described in Chapter 4 were used for accurate SPT measurements within ~3 ms of large (~15 V) bias pulses between the gate and drain. Independent measurements of the probe geometry, using a rectangular grid with sharp edges, reveal a probe radius of ~200 nm and a cone angle, measured ~300 nm above the end of the tip, of ~60. The measured tip-sample spacing during SPT measurements was ~50 nm. Figure 5.2: Experimental Setup (side view of device): The gate and drain are biased to V gs and V ds, respectively, using a dual-channel function generator. The current is measured at the source. V sp, applied to minimize the attractive electrostatic force between tip and sample, is recorded as the local surface potential. In order to modulate the density of trapped charge in the gate-drain access region, the device was switched from an off-state fill pulse to an on-state measurement 104

127 pulse. Figure 5.3(a) shows a schematic of the measured surface potential, V sp, and channel conductance, G ds, which result from switching between the off-state and on-state. In the off-state (V gs = -5.6 V, V ds = 9 V) the device is pinched off and large electric fields between the gate and drain are thought to cause electrons to leak and fill traps near the drain-side gate edge. In the off-state, the channel conductance is very small and the surface potential depends strongly on the lateral position of the tip. Switching from the off-state to the on-state (V gs = 0 V, V ds = ~0.1 V) results in a rapid response, as electrons move from the electrodes into the channel to satisfy the on-state bias, followed by a transient response caused by the emission of electrons trapped in the off-state, resulting in an increase in the local surface potential and in the 2DEG density, with a corresponding increase in channel conductance to its steady-state value. Since, in the onstate, a 2DEG exists at the AlGaN/GaN interface and acts as a ground plane, the surface potential is insensitive to trapped charge below the AlGaN/GaN interface, and is more sensitive to trapped charge the closer it is to the AlGaN surface. A laterally uniform sheet of trapped charge in the AlGaN contributes to the surface potential by an amount approximately proportional to the product of the trap density and height of the charge above the 2DEG [65]. 105

128 Figure 5.3: (a) Schematic of the local surface potential, V sp, and channel conductance, G ds, resulting from device switching between the off-state (V gs = -5.6 V, V ds = 9 V) and the on-state (V gs = 0 V, V ds = ~0.1 V). During the on-state, electron emission from traps in the AlGaN result in increasing SPTs and CTs. (b) Simultaneous measurement of a SPT and a CT recorded during the on-state with the probe located over the AlGaN surface, near the drain-side gate edge. A SPT and a CT, simultaneously recorded with the tip located over the AlGaN gate-drain access region close to the gate edge, are shown in Figure 5.3(b). The SPT and CT have nearly the same shape, indicating that both result from emission from the same traps. The SPT and CT are both fit well with the sum of two exponentials, likely indicating electron emission from two different species of traps. The measured exponential time constants were 4.2 ms and 36 ms, with respective amplitudes of 300 mv and 105 mv for the SPT at this particular location, and 0.69 ms and 0.30 ms for the (macroscopic) CT. If it is assumed that SPT transients are the result of two independent traps located at the AlGaN surface, then at this location, the number of electrons emitted 106

129 from the trap with the room temperature time constant of ~4 ms is nearly three times the number of electrons emitted from the trap with room temperature time constant of ~36 ms. All measured SPTs were well fit with 4.2 ms and 36 ms time constants, but with amplitudes that varied strongly with tip location. SPT measurements taken over the gate and drain electrodes resulted in very small SPT amplitudes, as expected. 107

130 Figure 5.4: Measurement and simulation of the (a) SPT amplitude and (b) tip height near the drain-side gate edge. A schematic (c) of the sample structure, probe tip, and trapped electrons having a density of 7 x cm -2 and a lateral extent of 200 nm from the gate edge. 108

131 The open-circle symbols in Figure 5.4(a) show the total measured SPT amplitude (the sum of the 4.2 ms and 36 ms amplitudes) vs. tip distance from the drain-side gate edge (zero on the horizontal axis corresponds to the expected gate edge), while the solid line in Figure 5.4(b) shows the measured surface topography. The total SPT amplitude is largest within a few hundred nm of the gate edge, consistent with significant charge trapping near the drain-side gate edge. To properly interpret the measured SPT amplitude profile shown in Figure 5.4(a), we must consider tip-sample convolution effects. As illustrated in Figure 5.4(c), the edge of the AFM tip will encounter the edge of the ~300 nm high gate when the lowest point on the tip is still far from the base of the gate edge, at which point the tip will start to lift away from the AlGaN surface. The dashed line in Figure 5.4(b) shows the result of a simulation which assumed a 300 nm high rectangular gate and the measured tip radius and cone angle. As the end of the probe tip moves away from the AlGaN surface, it becomes less sensitive to trapped charge on the surface. To estimate this effect, two-dimensional finite-element electrostatic simulations were performed to simulate what the measured SPT profile would be for a 300 nm high gate and the measured tip shape, for a particular distribution of traps on the AlGaN surface close to the gate edge. The simulation determines the value of V sp that minimized the total vertical component of the attractive electrostatic force on the tip at a particular lateral tip location. In order to reduce computation time, two-dimensional simulations were performed where the probe and gate edge were assumed to have a uniform shape along the device width. A probe height of 800 nm and a cantilever width of 2 µm were used in the simulations. Doubling the probe dimensions causes the simulated SPT amplitude to change by less than 0.5%. In addition, three-dimensional simulations with a 109

132 probe extruded along only 60 nm of the device width produced very similar results. Electrostatic simulations were performed with a commercial partial differential equations solver that used adaptive mesh refinement to achieve a predefined estimated error limit in each cell. Reducing the estimated error limit had a negligible effect on simulation results. Additional details about these simulations are presented in Appendix B. The solid squares in Figure 5.4(a) show the simulation results assuming a uniform trapped surface charge density of 7 x electrons/cm 2 that extends 200 nm from the drain-side gate edge, as shown schematically in Figure 5.4(c). We see that the simulated SPT amplitude profile in Figure 5.4(a) for this assumed trap distribution is in good agreement with the measured SPT profile. In addition, two-dimensional electrostatic simulations that solve for the CT amplitude were performed assuming a uniform strip of trapped charge extending laterally from the drain-side gate edge along the entire width of the device. An assumed 7 x electrons/cm 2 surface density extending 200 nm from the gate edge results in a simulated CT amplitude that is consistent with the amplitude of the measured CT shown in Figure 5.4(b). The simulated SPT amplitude profile and CT amplitude are also consistent with measurements for a strip of trapped charge extending between ~200 nm and ~300 nm if an appropriate trap density and depth below the AlGaN surface is chosen. A trapped charge density of 5-7 x electrons/cm 2, a lateral extent between ~200 nm and ~300 nm, and a depth less than ~17 nm below the AlGaN surface are required to ensure that measurements and simulations of the SPT amplitude profile and CT amplitude are consistent. This suggests that the majority of trap emission occurs at or near the AlGaN surface. A measured mobility of 1230 cm 2 /(V s) and a 2DEG density of ~1 x electrons/cm 2 were used in simulations of CTs. The trapped charge 110

133 density, spatial distribution of traps in the access region, and emission time constants, determined by measurements and simulations of SPTs and CTs, are all consistent with previous macroscopic measurements of the same sample, lending credence to both the SKPM and CI D -DLTS measurement results [11]. We note that the simulated SPT amplitude profile in Figure 5.4(a) is peaked at a distance of ~200 nm from the base of the gate edge, and that the reduction in the simulated SPT amplitude at smaller separations is due to the tip retracting from the surface as the edge of the tip scans over the gate edge. Hence, the measured reduction in the SPT amplitude close to the gate edge is most likely due to tip retraction, and not a reduction in the density of trapped charge near the gate edge. Sharper probe tips should be able to probe surface traps closer to the gate edge. In summary, simultaneous measurements of fast, bias-induced, room-temperature CTs and nm-scale SPTs on an MBE-grown AlGaN/GaN HEMT reveal transients having time constants of 4.2 ms and 36 ms. These emission time constants are similar to those of the E c ev and E c ev traps recently identified in AlGaN/GaN devices. A comparison of SPTs and CTs imply charge trapping at or near the top AlGaN surface, which is largest within several hundred nanometers of the drain-side gate edge, consistent with a model ascribing macroscopic CTs to a strip of surface traps filled with electrons during off-state biasing [2]. Electrostatic simulations of CT amplitudes and SPT amplitude profiles, which account for tip-sample convolution effects, are in good agreement with the measured CT amplitude and SPT amplitude profile, and the spatial distribution and density of trapped charge predicted in the macroscopic model [2]. 111

134 5.3 SPTs on an unpassivated MBE HEMT as a function of temperature. In a later study on similar MBE grown HEMTs, SPTs and RTs were measured simultaneously over a 2D grid of points including the gate-drain access region along the entire device width. Figure 5.5(a) and (b) shows topography and ΔV sp, with a rate window of t 1 = 4 ms and t 2 = 125 ms. The fill pulse biasing conditions were V gs = -5 V and V ds = 9 V. The spacing between measurements points was 2 µm in the vertical direction and 75 nm in the horizontal direction. By comparing Figure 5.5(a) and Figure 5.5(b), we observe that ΔV sp is largest along a strip within several hundred nanometers of the drain-side gate edge that extends the entire width of the device, consistent with the results presented earlier in this chapter showing fast SPTs within several hundred nanometers of the drain-side gate edge. 112

135 Figure 5.5: (a) Topography and (b) ΔV sp maps extracted from SPT measurements performed over a 2D grid of points near the drain-side gate edge along the entire width of the device. The fill pulse biasing conditions were V gs = -5 V and V ds = 9 V. The ΔV sp rate window was t 1 = 4 ms and t 2 = 125 ms. Figure 5.6(a) and (b) shows topography and ΔV sp measurements as a function of the fill pulse drain bias, taken at points along a line extending over the drain access region from the gate to the drain. During the fill pulse, V gs = - 5 V and V ds is varied from ~0 V and 9 V in steps of ~3 V. We observe that the ΔV sp peak height increases as the fill pulse drain bias increases. However, the ΔV sp peak height is significant even when V ds ~0 V, suggesting that a significant density of traps are filled in the AlGaN or at the AlGaN surface due only to the applied gate bias. 113

136 Figure 5.6: (a) Topography and (b) ΔV sp measured as a function of position from the gate to the drain at several fill pulse drain bias conditions. The fill pulse gate bias was V gs = -5 V. The ΔV sp rate window was t 1 = 4 ms and t 2 = 125 ms. Figure 5.7 shows how simultaneously measured RTs and SPTs depend on the fill pulse drain bias. The SPTs are averaged over a spatial extent corresponding to the measurement range in Figure 5.6(b). We notice that the amplitudes of both the RTs and the SPTs are both significant even with V ds = 0.4 V during the fill pulse, suggesting that these traps are filled due to the gate bias. Also, SPT and RT amplitudes both increase strongly with increasing drain bias. The similarity in shape between SPTs and RTs 114

137 indicates that the traps above the 2DEG in the AlGaN barrier that affect the AlGaN surface potential have a significant impact on the 2DEG density and the on-resistance in these samples, consistent with the results presented earlier in the chapter. The slight difference in shape between RTs and SPTs can be explained by the fact that the resistance depends nonlinearly on the trap concentration, as is evident in Equation Figure 5.7: Simultaneously measured RTs and SPTs at several fill pulse drain bias conditions. The fill pulse gate bias was V gs = -5 V. The ΔV sp rate window was t 1 = 4 ms and t 2 = 125 ms. In Figure 5.8, SPTs and RTs are measured at several temperatures. SPTs were recorded at a fixed location, within several hundred nanometers of the drain-side gate edge. The weak temperature dependence of SPTs and RTs provides additional evidence that they are both sensitive to the same traps, and suggests that the trap emission mechanism is not simple thermal activation to the conduction band. RT measurements 115

138 performed with the AFM laser light on and off are nearly identical, ruling out the possibility of significant trap emission by optically-induced emission caused by the AFM laser. These results suggest that the traps filled near the gate edge in the drain access region in these MBE devices are not E c 0.57 ev or E c 0.45 ev traps, but are deeper traps, some of which emit without observable temperature dependence on time scales on the order of 10 ms. Figure 5.8: Simultaneously measured (a) RTs and (b) SPTs at several temperatures on an unpassivated MBE device. RTs and SPTs have similar shape, suggesting that traps affecting the surface potential also have a significant effect on the channel resistance. The weak temperature dependence of RTs and SPTs indicates that the observed trap emission is not dominated by either the E c 0.57 ev or E c 0.45 ev traps. 116

139 Chapter 6 - Spatially-resolved trap spectroscopy in AlGaN/GaN HEMTs The work in this chapter was done in collaboration with A. Sasikumar, A. R. Arehart, and S. A. Ringel from The Electrical and Computer Engineering Department at The Ohio State University and with S. W. Kaun, J. Lu, S. Keller, J. S. Speck, and U. K. Mishra from the Materials and Electrical and Computer Engineering Departments at the University of California, Santa Barbara. 6.1 Introduction Spatially-resolved spectroscopic measurements of E c 0.57 ev traps in AlGaN/GaN high electron mobility transistors (HEMTs) will be discussed in this chapter. Simultaneous temperature-dependent measurements of resistance transients (RTs) and spatially-resolved surface potential transients (SPTs) were made after bias switching on AlGaN/GaN HEMTs grown my metalorganic chemical vapor deposition (MOCVD). Samples were grown with several different Fe concentration profiles in the GaN buffer. By comparing RTs with SPTs measured over the drain access region and off the edge of 117

140 the device, we find an E c 0.57 ev trap, previously correlated with HEMT degradation, located in the GaN buffer and not in the AlGaN barrier or at the AlGaN surface. The amplitude of the E c 0.57 ev trap in RTs depends strongly on the Fe-concentration in the GaN buffer, providing additional evidence that the E c 0.57 ev trap is located in the GaN buffer, and suggesting that Fe is correlated with enhanced filling of the E c 0.57 ev trap in the devices studied here, although the correlation between this trap and Fe may not be direct. By comparing RTs measured as a function of fill pulse bias conditions with simulations of the vertical electric fields, we find that filling of this trap occurs only under bias conditions where vertical electric fields penetrate into the GaN buffer. Gate leakage measurements performed as a function of fill pulse bias conditions do not correlate well with the vertical electric fields in the GaN buffer, suggesting that while gate leakage is likely an important source of electrons to fill the E c 0.57 ev traps, the traps do not actually fill unless electric fields in the GaN exist to push the leaked charge down into the buffer. Finally, RTs recorded under a variety of measurement pulse biasing conditions, and several fill pulse biasing conditions, also support the idea that the E c 0.57 ev traps are filled in the GaN under conditions where the vertical electric fields push leaked electrons downward. Finally, we discuss future work towards nm-scale optical spectroscopy measurements of deep levels that are filled above the 2DEG in the drain access region. 6.2 Motivation GaN-based high electron mobility transistors (HEMTs) offer high-power radiofrequency (RF) performance, though their ultimate performance and reliability are 118

141 limited by the presence and generation of electrically-active traps [9]. Knowledge of the spatial distribution of specific traps and their impact on device performance is important for understanding and controlling degradation in AlGaN/GaN HEMTs. Recent macro-scale trap spectroscopy measurements of Ga-face AlGaN/GaN HEMTs grown by MOCVD have shown a trap with energy 0.57 ev below the conduction band (E c 0.57 ev), which causes knee-walkout in pulsed I-V measurements and correlates with RF-stress induced degradation [1] [2] [3] [4]. Constant drain current deep level transient spectroscopy (CI D -DLTS) measurements suggest that the E c 0.57 ev trap is located in the drain access region [1]. It has been thought that the E c 0.57 ev trap is located in the AlGaN barrier or at the AlGaN surface [3] [4]. However, macroscale trap spectroscopy techniques, which detect changes in transistor output characteristics, are sensitive to traps both above and below the two dimensional electron gas (2DEG) channel, making it difficult to distinguish between traps in or on the surface of the AlGaN barrier, and traps in the GaN buffer. The atomic force microscopy (AFM) based SKPM technique [59] has previously been used to measure charge near the gate edge in AlGaN/GaN HEMTs. In initial SKPM studies, trapped electrons were observed above the 2DEG in the drain access region within several hundred nanometers of the gate edge [45] [65] [66], producing what has been referred to as a virtual gate [40] that reduces the local 2DEG density. In recent work [66], we measured ms-timescale SPTs with amplitudes up to ~400 mv with a lateral extent of several hundred nanometers from the gate on devices grown by molecular beam epitaxy. Taking into account the AFM probe shape and sample geometry, these SPTs were consistent with a uniform surface charge density of ~7 x

142 cm -2 extending 200 nm from the gate-edge [66]. However, these previous SPT measurements were all at room temperature and therefore were unable to distinguish thermally-activated trap emission from other emission processes or determine a characteristic activation energy. In this work, we compare simultaneously measured temperature dependent macro-scale resistance transients (RTs) and nm-scale surface potential transients (SPTs) obtained from scanning Kelvin probe microscopy (SKPM) on a set of MOCVD AlGaN/GaN HEMTs to determine that the E c ev trap is located in the GaN buffer, and not in the AlGaN barrier or at the surface. A comparison of measured RTs and simulations of the electric fields suggest that filling of the E c 0.57 ev trap occurs when leaked electrons, likely from the gate, can be forced deep into the GaN buffer by vertical electric fields in the GaN buffer. 6.3 Fe-Series AlGaN/GaN HEMTs The Ga-face MOCVD AlGaN/GaN devices were grown on SiC substrates with different Fe-doped GaN and unintentionally doped (UID) GaN buffer thicknesses. The growth stack, shown schematically in Figure 6.1, consists of 240 nm AlN, (1900 d) nm Fe-doped GaN, d nm UID GaN, 0.7 nm AlN, and 20 nm Al 0.3 G 0.7 N with d taking values of 500, 800, and 1300 nm. The total thickness of GaN is 1900 nm in all devices. Devices had 2 x 75 µm wide rectangular gates, and gate-to-source, gate, and gate-to-drain lengths of 0.5 µm, 0.5 to 1 µm, and 1 to 6 µm, respectively. Devices were processed both with and without ~5 nm of MOCVD silicon nitride (SiNx) passivation in the access regions only. 120

143 Figure 6.1: Schematic cross-section of the AlGaN/GaN HEMT device with applied gate bias (V gs ) and drain bias (V ds ), and measured source current (I s ). The AFM probe measures the local surface potential (V sp ). In order to make the GaN buffers semi-insulating, Fe has been intentionally incorporated into the buffer during GaN growth to compensate carriers [67] [68]. The presence of Fe in the buffer has been thought to create deep levels that pin the Fermi level sufficiently below the conduction band to make the buffer semi-insulating [67] [69] [70]. In the devices studied here, the Fe concentration in the intentionally Fe-doped GaN layer is in the mid cm -3 range. Fe is known to float during MOCVD GaN growth, causing considerable incorporation into the UID GaN buffer [67]. In the devices studied here, this results in an Fe concentration near the 2DEG channel that depends on the distance between the 2DEG channel and the intentionally Fe-doped GaN buffer d. Figure 121

144 6.2 shows secondary ion mass spectrometry (SIMS) data of the Fe concentration in MOCVD GaN as a function of depth as injection of Fe into the chamber is cycled on and off. These measurements were performed on material grown in the same chamber as the devices in this study. In Figure 6.2, after the Fe injection is switched off, Fe continues to incorporate with a concentration that falls off approximately exponentially with depth. The resulting GaN Fe concentrations near the 2DEG channel in the HEMT devices are estimated from the SIMS data to be approximately 1 x 10 16, 4 x 10 16, and 1.5 x cm -3 for devices with d of 1300, 800, and 500 nm, respectively. Figure 6.2: Secondary ion mass spectrometry measurements showing the Fe concentration as a function of depth in MOCVD grown GaN. After the Fe injection is switched off, the Fe concentration decreases exponentially with depth. 122

145 6.4 Simultaneous surface potential and 2DEG resistance measurements Resistance transients and SPTs were simultaneously recorded after bias switching, as a function of temperature and AFM probe position. We define the device resistance as R ds = V ds /I s, where V ds is the applied drain bias and I s is the current measured from the source. The SKPM surface potential feedback signal, V sp, is the bias applied to the AFM probe that minimizes the attractive electrostatic force between the AFM probe and the sample, as discussed in Chapter 4 [59]. Figure 6.3 shows a schematic of R ds and V sp recorded while the device is switched from the fill pulse bias condition to the measurement pulse bias condition. When the device is switched to the measurement pulse, trap emission leads to RTs and SPTs. Each transient measurement is performed at a fixed temperature and AFM probe location. During the measurement pulse, devices were biased in the linear regime with V gs = 0 V and V ds ~ 100 mv, unless noted otherwise. 123

146 Figure 6.3: Schematics of RTs and SPTs recorded after switching from the fill pulse bias condition to the measurement pulse bias condition. During the measurement pulse, trap emission causes RTs and SPTs to vary with time Temperature dependent resistance transient measurements Resistance transients measured as a function of temperature reveal a dominant E c 0.57 ev trap in all measured devices, with and without SiNx passivation. Figure 6.4(a) shows an Arrhenius plot extracted from CI D -DLTS measurements on a passivated device and reveals an E c 0.57 ev trap with a capture cross section of 1.5 x cm 2, consistent with previous reports [1] [37]. Figure 6.4(b) shows RTs, measured on a similar sample at three temperatures with a fill pulse of V gs = - 4 V ~ V t and V ds ~10 V, which have temperature-dependent emission time constants consistent with those of the E c 0.57 ev 124

147 trap from Figure 6.4(a). A RT background has been removed by subtracting R ds (t = 25 ms) from each curve in Figure 6.4(b). The concentration of filled E c 0.57 ev traps, extracted from analysis of RT amplitudes using Equation 3.25, is greater than 5 x cm -2, assuming that they extend 200 nm from the gate edge in the drain access region. Figure 6.4: (a) Arrhenius plot showing the E c 0.57 ev trap with a capture cross section of 1.5 x cm 2, extracted from CI D -DLTS on an AlGaN/GaN HEMT. (b) RTs, recorded at several temperatures, have emission time constants consistent with those of CI D -DLTS measurements of the E c 0.57 ev trap Surface potential transient mapping The SKPM surface potential transient measurements were recorded as a function of position over the drain access region, on a number of devices with and without SiNx passivation. Figure 6.5 shows a schematic top view of a HEMT device. The region between the gate and drain metals, where the AlGaN barrier is present, is referred to as 125

148 the drain access region. Off the edges of the device, the AlGaN is etched away, producing an AlGaN mesa and exposing bare GaN. Removal of the AlGaN layer off the edges eliminates the 2DEG, electrically isolating the device. The magenta colored lines in Figure 6.5 mark the edges of the drain metal, drain-side gate metal, and the edges of the AlGaN mesa, for future reference. Figure 6.5: Schematic top-view of the HEMT device. The magenta lines are used to locate the gate edge, drain metal edge, and the edges of the AlGaN mesa in subsequent maps. The AlGaN is etched away to expose bare GaN off the edges of the device. During measurements, the surface potential and resistance were recorded at fixed AFM probe locations as a function of time during bias switching between the fill pulse and measurement pulse bias conditions, repeatedly over a 2D grid of points. The topography was also recorded at each measurement point. Figure 6.6(a)(b)(c)(d) shows 126

149 maps of the topography, the surface potential at the end of the fill pulse ( V sp, fill ), the surface potential at the end of the measurements pulse ( V sp ( t = 125 ms ) ), and ΔV sp, respectively. A rate window of t 1 = 5 ms and t 2 = 25 ms was used in the ΔV sp map. The data in each of these maps was extracted from a single scan of an unpassivated HEMT. The fill pulse bias conditions were V gs = -4 V and V dg = 9 V. The fill and measurement pulses were each applied for 125 ms. The time required for measurements at a single location is quite long (typically ~10 seconds), making it impractical to take images with finely spaces pixels over large areas. The pixel spacing in these measurements is ~3 µm in the vertical direction and ~100 nm in the horizontal direction. From the topography image in Figure 6.6(a), we see that these measurements include the gate metal, the drain access region, the drain metal, and the bare GaN. In Figure 6.6(b), we see that, over the device, the surface potential varies from ~ -2 V over the gate metal to ~ 8 V over the drain metal. These values for the surface potential differ from the gate and drain fill pulse bias condition because of long-range SKPM averaging affects that can occur when the length scale of variations in the surface potential are on the order of, or smaller than the AFM cantilever dimension, as discussed in Chapter 4. We observe in Figure 6.6(b) that the surface potential changes most rapidly with lateral position within several hundred nanometers of the drain-side gate edge, consistent with the large lateral electric fields expected near the drain-side gate edge under these fill pulse bias conditions. Figure 6.6(c) shows the surface potential measured at the end of the measurement pulse at t = 125 ms. In the drain access region, within several hundred nanometers of the gate edge, we observe a negative surface potential caused by trapped negative charge above the 2DEG, in the AlGaN barrier or at the AlGaN surface. This is consistent with previous studies 127

150 that have shown negative charge near the drain side gate edge thought to result from electrons that leak during the application of intense electric fields and fill traps[45]. The trapped electrons produce a virtual gate, causing a reduction in the local 2DEG density and thereby reducing the output current [40]. The filled traps that we observe here are sufficiently deep so that their thermal emission time constants are much longer than 125 ms, and therefore they do not emit significantly during the measurement pulse. When the device is illuminated with UV light with an energy larger than the AlGaN bandgap, optical emission of electrons from these traps is induced, and the strongly negative surface potential near the gate edge vanishes. In the future work section at the end of this chapter, initial efforts towards SKPM-based optical spectroscopy of these traps will be discussed. Also, the trapped charge observed near the gate edge in Figure 6.6(c) indicates that the surface potential in these devices is sensitive to trapped negative charge in the AlGaN barrier, and is not screened by surface states, for example. In Figure 6.6(d), we see that ΔV sp over the AlGaN barrier in the drain access region is small, and appears to be quite similar to ΔV sp measured over either the gate or drain metals. This indicates that there are very few traps that emit in the AlGaN barrier between 5 and 25 ms after bias switching. Since this rate window is sensitive to emission from the E c 0.57 ev trap, this suggests that the E c 0.57 ev trap, which has the most significant impact on the drain lag measurements shown in Figure 6.4(b), does not affect the surface potential measured in the drain access region. Off the edge of the AlGaN mesa, over exposed GaN, we observe large-amplitude SPTs having ΔV sp > ~500 mv. We will show in the following subsection that these SPTs result from electron emission from the E c 0.57 ev trap in the GaN buffer. 128

151 Figure 6.6: (a) Topography, (b) surface potential at the end of the fill pulse V sp, fill, (c) surface potential at the end of the measurement pulse V sp (t = 125 ms), and (d) ΔV sp extracted from a single set of transient measurements on an unpassivated AlGaN/GaN HEMT, with fill pulse bias conditions of V gs = -4 V and V ds = 9 V. The rate window in the ΔV sp map was t 1 = 5 ms and t 2 = 25 ms. 129

152 Figure 6.7(b) and (c) respectively show topography and ΔV sp profiles taken from the gate to the drain over the AlGaN barrier in the drain access region on an unpassivated HEMT. The results were averaged along the device width and plotted with a rate window of t 1 = 5 ms and t 2 = 25 ms. Over the AlGaN, ΔV sp does not exceed 6 mv, and appears to be dominated by noise. If the E c 0.57 ev trap were on the surface of or uniformly distributed in the AlGaN barrier, this ~6 mv upper limit on ΔV sp would put an upper limit of ~2 x cm -2 on the trap concentration, assuming that the effects of the gate and AFM probe geometry on the surface potential measured near the gate edge are similar to that of our previous work [66], described in Chapter 5. This is much too small to account for the magnitude of the measured CI D -DLTS and RT signals shown in Figure 6.4. However, if the E c 0.57 ev traps were located in the GaN buffer they would be screened from the AFM probe tip by the 2DEG, and would not produce any SPTs. Hence the negligible measured ΔV sp gives strong evidence that the E c 0.57 ev traps are located in the GaN buffer. 130

153 Figure 6.7: Averaged (b) topography and (c) ΔV sp profiles taken from the gate to the drain across the drain access region over the AlGaN barrier Temperature dependent surface potential transients Here, we describe SPT measurements made off the edge of the device, over the exposed GaN, that show signatures of the E c 0.57 ev trap, indicating that this trap is located in the GaN buffer. Figure 6.8(a) and (b) show 3 µm by 5.5 µm maps of topography and ΔV sp including a region off of the AlGaN mesa edge, over exposed GaN. In the ΔV sp map, the rate window was t 1 = 5 ms and t 2 = 25 ms. The fill pulse conditions were V gs = -4 V and V ds = 9 V. Over the GaN, on the drain-side of the gate metal, we 131

154 observe large-amplitude SPTs having ΔV sp > 1 V, consistent with the large values for ΔV sp observed over the GaN in Figure 6.6 (d). In this case, the 2DEG is no longer present to screen traps, so that traps in the GaN affect the surface potential. Figure 6.8 (c) shows SPTs measured over the GaN within several microns of the drain-side gate edge and AlGaN barrier edge, at temperatures of 24, 35, and 47 o C. The SPT time constants are very similar to those of the RTs corresponding to the E c 0.57 ev trap from Figure 6.4 (b), indicating that E c 0.57 ev traps are indeed filled in the GaN buffer. This conclusion is supported by recent results from drain-control CI D -DLTS measurements showing the presence of the same E c 0.57 ev trap in both InAlN/GaN and AlGaN/GaN HEMTs, also suggesting that this trap is located in the GaN buffer since it is unlikely that the same trap level would be found in both InAlN and AlGaN [71]. In the measurements shown in Figure 6.8 (c), it was necessary to set the adaptive SKPM feedback to add an exponential curve with a user defined amplitude and time constant in order to track the large amplitude, small-time constant SPTs, as discussed in Chapter

155 Figure 6.8: (a) Topography and (b) ΔV sp maps taken over a region off the edge of the AlGaN barrier over exposed GaN with fill pulse conditions of V gs = -4 V and V ds = 9 V, and a rate window of t 1 = 5 ms and t 2 = 25 ms. (c) SPTs measured at several temperatures over the GaN, within several microns of the drain-side gate edge and the AlGaN barrier edge. 133

156 6.4.4 Resistance transients vs. Fe concentration in GaN buffer Resistance transients were measured on a number of devices having distances d of 500, 800, and 1300 nm between the 2DEG channel and the intentionally Fe-doped GaN buffer layer. Figure 6.9(a) shows that the amplitudes of RTs, following a fill pulse of V gs = -4.6 V ~ V t and V ds ~10 V, increase strongly with decreasing distance d between the 2DEG and the Fe-doped layer of the GaN buffer, corresponding to an increased concentration of Fe near the channel in the UID GaN layer. This further indicates that the E c 0.57 ev traps are located in the GaN buffer, and suggests that the concentration of this trap is influenced by the presence of Fe as others have observed for a similar E c 0.53 ev level in MOCVD-grown n-gan [72]. Additional work is underway to explore the relationship between Fe and the E c 0.57 ev trap in GaN. Figure 6.9: Averaged resistance transients measured on devices with d = 500, 800, and 1300 nm. A fill pulse of V gs = -4 V and V ds = 9 V was applied for 125 ms. 134

157 6.5 Relating the electric fields in the GaN buffer to filling of the E c 0.57 ev traps In this section we compare RTs measured under different fill pulse and measurement pulse biasing conditions with simulations of the electric fields. We find that filling of the E c 0.57 ev traps in the GaN buffer occurs only under conditions where vertical electric fields exist in the GaN buffer that push electrons downward. Figure 6.10(a) shows how the amplitude of RTs depends on fill-pulse biasing conditions. We observed that E c 0.57 ev traps only fill significantly when V dg > the HEMT threshold voltage V t, in which case vertical electric fields exist in the GaN buffer that would drive leaked electrons into the GaN buffer. Two kinds of fill pulses were used. In Type 1 fill pulses V ds was fixed at ~100 mv and V gs was varied from 0 to ~-10 V. In Type 2 fill pulses V gs was fixed at -4.6 V and V ds was varied from ~0 to ~10V. Figure 6.10(a) shows ΔR ds, plotted as a function of V dg, for both Type 1 and Type 2 fill pulses, with a rate window of t 1 = 0.4 ms and t 2 = 10 ms. When V dg < V t, ΔR ds is negligibly small, indicating that E c 0.57 ev traps are not filled significantly. When V dg > V t traps fill for both types of fill pulses, but fill more strongly for Type 1 pulses. Figure 6.10 (c) and (d) shows results of Silvaco ATLAS device simulations, with (c) and (d) showing respectively the amplitudes of the vertical electric field E y at the locations in the GaN buffer and AlGaN barrier shown in Figure 6.10(b). The details of the ATLAS simulations are shown in Appendix B. The simulations of E y were performed under Type 1 bias conditions, though Type 2 bias conditions produce similar results at these locations. By comparing Figure 6.10(a) with Figure 6.10(c) we see that E c 0.57 ev traps fill only when vertical electric fields in the GaN exist to force leaked electrons deep into the GaN buffer. For V dg < V t, E y in the GaN buffer is insensitive to V dg and 135

158 confines electrons to the 2DEG channel region, and from Figure 6.10(a) we see that few traps fill. However, for V dg > V t, switches direction and increase with V dg, forcing electrons down into the GaN buffer, at which point the E c 0.57 ev traps also start to fill. In contrast, from Figure 6.10(d) we see that E y in the AlGaN barrier is already strong for V dg = V t, indicating that electric fields in the AlGaN barrier are not strongly correlated with filling of the E c 0.57 ev trap. Figure 6.10: (a) ΔR ds measured as a function of applied V dg, under both Type 1 (black solid squares) and Type 2 (red open circles) fill pulse biasing conditions. (b) Schematic device cross section showing the two locations, marked by the white solid circles, where the simulated vertical electric fields in the (c) GaN buffer, and (d) AlGaN barrier, under a Type 1 fill pulse, are plotted as a function of V dg. 136

159 Two dimensional ATLAS simulations of the vertical electric fields under different biasing conditions are shown in Figure For biasing conditions V ds = V gs = 0 V and V ds = 0 V, V gs = -5 V in Figure 6.11 (a) and (b), respectively, V dg V t and we see that the vertical electric fields throughout the GaN are quite insensitive to the gate bias and force leaked electrons towards the 2DEG. From Figure 6.10(a), we see that the E c 0.57 ev trap doesn t fill significantly under these conditions. Figure 6.11(c) and (d) show the vertical electric fields under Type 2 and Type 1 bias conditions, respectively, where V dg > V t. We see in Figure 6.11(d) that the vertical electric fields in the GaN buffer for Type 1 pulses are strong on both sides of the gate and extend deep into the GaN over the entire width of the gate, while for Type 2 fill pulse with the same V dg, shown in Figure 6.11(c), the vertical electric fields are strong only on the drain-side of the gate. The wider spatial extent of the vertical electric fields in the GaN buffer under the gate for Type 1 pulses may explain the enhanced filling of E c 0.57 ev traps observed for Type 1 fill pulses in Figure 6.10(a). For Type 2 fill pulses, simulations show that strong lateral electric fields also exist in the GaN buffer near the drain-side gate edge, forcing leaked electrons laterally into the drain access region. This may explain the observed filling of E c 0.57 ev traps in the drain access region in previous studies under similar fill pulse conditions [1] [2]. 137

160 Figure 6.11: Silvaco ATLAS simulations showing the vertical electric fields with (a) V gs = V ds = 0 V, (b) V gs = -5 V and V ds = 0 V, (c) Type 2 fill conditions with V gs = -5 V and V ds = 9 V, and (d) Type 1 fill conditions with V gs = -10 V and V ds = 0 V. We believe that electrons that fill the E c 0.57 ev traps likely leak from the gate during the fill pulse, and in particular for Type 1 fill pulses the electric fields under the gate would prevent any electrons from the source or drain contacts from entering the GaN 138

161 buffer, leaving electrons leaking from the gate as the only possible source. We note that the maximum gate leakage current for the samples studied here was between 0.2 x 10-4 and 2 x 10-4 A/mm, which would produce less than 3 x 10-3 W/mm of dissipated heat, a level that is too small to significantly affect the device temperature during transient measurements. We also note that the dependence of the total gate leakage on V dg is qualitatively similar to the electric field strength in the AlGaN barrier layer shown in Figure 6.10(d), in that measurable gate leakage is already observed for V dg < V t but does not increase strongly for V dg > V t. This is a quite different bias dependence than observed for the trap filling shown in Figure 6.10(a), where negligible resistance transients are observed for V dg < V t but strongly-increasing transients are observed for V dg > V t. This is consistent with the idea that the gate leakage should depend much more strongly on the electric fields near the gate in the AlGaN barrier, and not on the electric fields in the GaN. From this we conclude that while some gate leakage is likely necessary to fill E c 0.57 ev traps in the buffer, no filling will actually occur until V dg > V t, at which point vertical electric fields under the gate exist that will push the leaked electrons down into the GaN buffer. Additional measurements of current transients as a function of the measurement pulse bias conditions support the idea that the E c 0.57 ev traps fill in regions where the vertical electric fields in the GaN buffer force charges downward. In Figure 6.12 (a) and (b) we plot the current measured 5 ms, 25 ms, and 125 ms after switching to the measurement pulse as a function of the measurement pulse drain bias for Type 2 and Type 1 fill pulse conditions, respectively. The gate bias applied during these measurements was V gs = 0 V. The fill pulse biasing conditions were V gs = -4 V and V ds = 139

162 6 V for the Type 2 pulse, and V gs = V and V ds = 0.32 V for the Type 1 pulse. Comparing Figure 6.12(a) and (b), we see that the difference in the drain current between the 5, 25, and 125 ms measurement times appears small, but is noticeably larger for Type 1 fill pulse conditions. Figure 6.12(c), shows the change in the drain current ΔI ds using a rate window of t 1 = 5 ms and t 2 = 25 ms for both the Type 1 and Type 2 biasing conditions. For the Type 2 fill pulse, we observe that ΔI ds increases in the linear part of the triode regime, reaches a maximum in the nonlinear part of the triode regime, and then reduces towards zero in the saturation regime. This behavior is consistent with trapped electrons located in the drain access region, near the gate edge where the 2DEG is depleted under saturation conditions [42]. This is the same region where the vertical and lateral electric fields in both the GaN and the AlGaN are strongest. For the Type 1 fill pulse, we see that ΔI ds increases throughout the triode regime and saturates near its maximum in the transistor saturation regime. The significant ΔI ds observed in the saturation regime suggests that traps must be filled in the source access region or underneath the gate. The filling of the traps in these locations correlates with the presence of vertical electric fields in the GaN on the source side of the device and under the gate, as seen in Figure 6.11(d). We also expect that traps are filled in the drain access region under Type 1 fill conditions. 140

163 Figure 6.12: In (a) and (b), the drain current at times 5 ms, 25 ms, and 125 ms after switching to the measurement pulse bias are plotted as a function of the measurement pulse drain bias, for Type 2 and Type 1 fill pulses, respectively. In saturation we see that the drain current changes noticeably between the measurement times in the case of a Type 1 pulse, while, in the case of a Type 2 pulse, it does not. (c) A plot of the change in the drain current between 25 ms and 5 ms, as a function of V ds during the measurement pulse, for Type 1 and Type 2 fill pulse conditions. 6.6 Conclusions In summary, by comparing RTs and SPTs measured as a function of temperature and AFM probe location on a set of MOCVD-grown AlGaN/GaN HEMTs, we conclude that the E c 0.57 ev trap is located in the GaN buffer, and not in or at the surface of the 141

164 AlGaN barrier in the drain access region. The amplitude of RTs is also observed to increase with increasing concentration of residual Fe in the UID GaN buffer and/or decreasing distance of the 2DEG from the Fe-doped layer of the GaN buffer. This provides additional evidence that the E c 0.57 ev traps are located in the GaN buffer, and suggests their concentration is influenced by Fe. Simulations of electric fields, along with RTs measured as a function of the applied fill pulse and applied measurements pulse, are consistent with the E c 0.57 ev trap being filled in the GaN buffer by electrons, likely leaked from the gate, which are swept down into the GaN buffer by vertical electric fields in the GaN buffer when V dg > V t. 6.7 Future directions In future work, we intend to further develop nano-dlos techniques to investigate deeper traps that have energies further than ~1 ev from the band edges, in AlGaN/GaN HEMTs. Although the shallower traps, including the E c 0.57 ev trap, have been shown to have a significant impact on device performance, deeper traps are suspected also to cause significant degradation, and may be more critical than the shallower traps in the low-frequency power applications. Here, we show preliminary nano-dlos measurements taken on the same unpassivated MOCVD HEMT device on which the SPT mapping from Figure 6.6 was performed. Prior to the measurements, the sample was illuminated with 4.3 ev UV light to empty traps. Then, a fill pulse of V gs = -4 V and V ds = 9 V was applied for ~1 minute. Figure 6.13(a) and (b) show gate-to-drain line profiles of the topography and the surface potential after shining 4.3 ev light and after applying the fill pulse, respectively. After the 142

165 fill pulse, we see that the surface potential is significantly reduced within several hundred nanometers of the gate edge in the drain access region due to an increase in the trapped negative charge. With the sample in the dark, the surface potential profile after the fill pulse was measured several times at ~10 minutes intervals and did not change significantly, suggesting that the filled traps are quite deep and have very slow room temperature emission time constants. We note that if the sample was illuminated with 4.3 ev light after the fill pulse, the surface potential fully recovers. Figure 6.13: Line scans from the gate towards the drain of the (a) topography and the (b) surface potential measured after the sample was illuminated with 4.3 ev light (black) and after a fill pulse was applied (red line). The fill pulse was applied in the dark for ~1 minute with V gs = -4 V and V ds = 9 V. 143

166 Figure 6.14 shows measurements of the surface potential and channel resistance as a function of the incident light energy, with the AFM probe at a fixed location in the drain access region within several hundred nanometers of the gate edge. As before, 4.3 ev light was shined on the sample and a fill pulse of V gs = -4 V and V ds = 9 V was applied prior to these measurements. At each light energy, the sample was illuminated for ~10 s before recording the surface potential or resistance, to allow steady-state conditions to be reached. In Figure 6.14(a) we see that the surface potential increases significantly at ~3.7 ev. This is consistent with previous measurements of ~ ev traps located in the AlGaN layer in AlGaN/GaN heterostructures and HEMT devices [11] [38]. In Figure 6.14(b) we also observe a sharp reduction in the resistance at ~3.7 ev. This result suggests that the surface potential and resistance transients are sensitive to a ~3.7 ev trap filled predominantly in the AlGaN barrier within several hundred nanometers of the drain-side gate edge in this device. In Figure 6.14(b) we see that the resistance also decreases at lower light energies, though in Figure 6.14(a) we do not see corresponding changes in the surface potential. This is consistent with the idea that the traps that emit at lower light energies are not located near the surface in the AlGaN barrier, near the probe tip. By comparing the surface potential and resistance changes as a function of light energy in this way, it is possible to obtain knowledge of the lateral and vertical distribution of these deeper traps. In the future, we plan to refine and automate these measurements, and to measure time-resolved optically-induced SPTs. 144

167 Figure 6.14: Measurements of the steady-state shift in the (a) surface potential and (b) resistance as a function of incident light energy with the AFM probe over the drain access region within several hundred nanometers of the gate edge. 145

168 Chapter 7 - Summary In summary, we have developed scanned probe microscopy based techniques to enable nm-scale trap spectroscopy in operating electronic devices. We have applied these techniques to measure milli-second time scale transients and to spatially-resolve particular trap species in AlGaN/GaN high electron mobility transistors (HEMTs). In HEMTs grown by molecular beam epitaxy (MBE), we observe milli-second time-scale surface potential transients (SPTs) within several hundred nanometers of the drain side gate edge. The shape of these SPTs are quite similar to the shape of simultaneously measured resistance transients (RTs), suggesting that the trapped charge in the AlGaN barrier affecting the surface potential also has a significant impact on the device performance. We find that a trapped charge density of 7 x electrons/cm 2 extending 200 nm from the drain-side gate edge is consistent with measurements and simulations of both the SPTs and RTs in these MBE devices. In measurements on similar unpassivated MBE devices, we observe that filling of the traps in the AlGaN barrier depends strongly on the drain bias, though they are also filled significantly even with only a gate bias near the HEMT threshold voltage. The filling is thus highly correlated with the electric field in the AlGaN layer, since the electric field in this layer increases 146

169 with increasing drain bias, and also increases with increasing gate bias below the threshold voltage. Also, SPTs and RTs measured at several temperatures between 20 o C and 50 o C do not change significantly with temperature, indicating that the dominant emission process is not thermal activation to the conduction band. In another study, measurements were performed on MOCVD-grown HEMTs having different Fe concentration profiles in the GaN buffer. We find an E c 0.57 ev trap, previously linked to radio-frequency stress induced degradation, and observed to fill in the drain access region [1] [2], to be located in the GaN buffer layer, and not in the AlGaN barrier layer, as had previously been thought [3] [4]. Constant drain current deep level transient spectroscopy (CI D -DLTS) measurements and RT measurements at several temperatures showed clear signatures of the E c 0.57 ev trap. Surprisingly, SPTs measured over the AlGaN barrier in the drain access region did not show signatures of the E c 0.57 ev trap, suggesting that this trap is not located in the AlGaN barrier. SPTs measured off the edge of the AlGaN barrier, over exposed GaN where the 2DEG is not present to screen the surface potential from trapped charge in the GaN, showed large amplitude SPTs having temperature dependent time constants consistent with RTs and CI D -DLTS measurements of the E c 0.57 ev trap. The amplitudes of RTs corresponding to the E c 0.57 ev trap increase strongly with increasing Fe concentration near the 2DEG channel, also indicating that this trap is located in the GaN buffer. By comparing simulations of electric fields and measurements of RTs under different fill pulse and measurement pulse biasing conditions, we observe that filling of the E c 0.57 ev traps occurs only when vertical electric fields exist in the GaN buffer to force leaked electrons downward into the GaN buffer. Preliminary nm-scale optical spectroscopy of deeper 147

170 traps observed in the AlGaN barrier layer shows evidence of a ~3.7 ev trap filled within several hundred nanometers of the drain-side gate edge. This is similar to a trap observed previously in macro-scale measurements on AlGaN/GaN heterostructures and HEMTs [11] [38]. 148

171 Appendix A - Attofarad-level absolute capacitance detection In this appendix, we present the results of an effort to develop a circuit capable of measuring absolute capacitance at ~1 MHz with a noise level below ~1 af/hz 1/2. The low noise capacitance detection scheme presented here is based on a previously developed low noise capacitance detection circuit for scanning capacitance microscopy (SCM) [73] [74], which was designed to operate at a lower frequency of 5 khz and has been used to measure variations in thin dielectric films [75]. First, the basic concept of the capacitance detection technique will be discussed. Then, the implementation of this technique in a probe station for deep level spectroscopy on diode structures and in the SCM circuit of an AFM will be described. Figure A.1 shows a basic circuit diagram of the absolute capacitance detection scheme. The sample capacitance C samp, is defined as the capacitance intended to be measured. In parallel with C samp, there is an additional stray capacitance C stray, which we are not interested in measuring. Often, we wish to measure the sample capacitance as a function of some parameter. For example, C samp could be the capacitance of a Schottky diode, which can be measured as a function of applied DC bias or as a function of time as traps in the depletion region emit. In the case of SCM, the sample capacitance is the tip- 149

172 sample capacitance, which can be measured as a function of tip position. In Figure A.1, a sinusoidal voltage V AC, is applied to the parallel combination of C stray and C samp on the left branch, resulting in a total current through the left branch of I samp + I stray. If C samp >> C stray, then I samp >>I stray so that C samp can be determined accurately from the applied AC bias and the total current flowing through the left branch. If C samp << C stray, then the current flowing through the left branch is dominated by I stray. If, in this case, the right branch of the circuit did not exist, then I stray can place an upper limit on current amplifier gain, which places a lower limit on the noise level, and can therefore make it difficult to resolve changes in C samp. To null out I stray, the right branch of the circuit adds a coupled current, I C, to the input of the current amplifier that has the same amplitude as I stray but is phase shifted by 180 degrees. This leaves I samp as the only current flowing into the current amplifier. The coupled current is added by applying a variable-phase, variable-gain AC voltage to a coupling capacitor connected to the input of the current amplifier. Since I samp is small (relative to I stray ), the maximum current amplifier gain that can be selected without an overload increases, causing the minimum possible noise level to decrease. In practice, there can be additional phase shifts in the circuit, which can be caused by resistor-capacitor (RC) time delays for example, so that the phase shift in the right branch of the circuit may need to be adjusted to a value not exactly equal to 180 degrees to null out I stray. 150

173 Figure A.1: Basic circuit diagram for the low noise capacitance detection technique. A.1 DLTS/DLOS probe station implementation Now we discuss the implementation of the low noise capacitance circuit for measurements of the junction capacitance of small area Schottky diodes for DLOS studies. In this section, the sample will first be described. Then the design of the capacitance detection circuit and an XYZ piezoelectric manipulator compatible with a commercial vacuum probe station will be discussed. The sample wafers that can be studied are comprised of an array of n-type GaN Schottky diodes. Figure A.2(a) shows an optical image of the array of square Schottky diodes with edge dimensions ranging from 128 microns to 125 nm. Figure A.2(b) shows 151

174 a cross section of the Schottky devices. The active layer of 500 nm plasma-assisted MBE grown GaN, with silicon doping of 5 x cm -3, is shown light blue. A 80 angstrom semi-transparent Schottky top contact enables light to penetrate into the active layer for DLOS studies. The Ti/Al/Ni/Au ohmic contacts are made to a 200 nm thick, highly doped GaN layer. Figure A.2: (a) Top-view image of a sample consisting of square n-type Gan Schottky diodes with edge dimensions from 128 microns to 125 nm. (b) Schematic cross section of the Schottky diode structure. 152

175 A circuit diagram showing the implementation of the low noise capacitance detection circuit in a vacuum probe station is shown in Figure A.3. A Tektronix AFG3022B dual channel function generator was used to apply the AC bias V AC sin(ωt), through Channel 1 and the amplitude and phase shifted bias AV AC sin(ωt + φ) to the coupling capacitor through Channel 2. The AFG3022B was set to synchronize the frequencies of Channels 1 and 2. The AC bias and a much lower frequency bias could be added using the summing box, and applied to the large-area ohmic contact. In Figure A.3, the lower frequency bias is used to apply the fill and measurement bias conditions used for DLTS/DLOS studies. The XYZ piezoelectric probe manipulator is used to position a fine-tipped probe on the small Schottky metal pads. The probe is connected to the coupling capacitor and a current amplifier. In this case, a variable-gain FEMTO DHPCA- 100 current amplifier was used. The current amplifier output is connected to the input of a SR844 lockin, referenced to the frequency of the AC bias, with the phase set so that the capacitive signal is entirely in the X channel. The X channel output is recorded and used to determine the sample capacitance. 153

176 Figure A.3: Schematic circuit diagram of the low noise capacitance detection circuit implemented on a LakeShore vacuum probe station for capacitance measurements on Schottky diode structures. Measurements were performed in a LakeShore probe station which provides a vacuum environment with variable temperature and the ability to vary the light energy for DLTS and DLOS studies, respectively. Figure A.4(a) shows an image of the LakeShore TTP4 Probe Station. The system is designed with four bellows extending from the central cylindrical stage area, which each house long probe rods that are positioned with micrometer controls. The XYZ probe manipulator was custom-designed to fit inside the central cylindrical stage area, as shown in Figure A.4(b). A photograph of the XYZ piezo manipulator is shown in Figure A.4(c). The X and Y piezo manipulators are mechonics 154

177 MS-30 piezoelectric positioners. The Z piezo manipulator is a MS-15 model. All positioners are open loop. A custom flange was designed with RS232 and BNC feedthroughs for the piezo manipulator power connections and the probe wire connection. To mount the custom flange, one of the TTP4 standard bellows/probe assemblies must be removed. Outside of the chamber, the piezo manipulator power connections are attached to the mechonics CU30 controller, which is attached by USB to a computer. A mechonics computer program allows user control of the manipulators. Figure A.4(d) shows a coupling capacitor box. The capacitor is formed between copper strips separated by ~1 mm as shown, which results in C C ~ 0.1 pf, in this case. 155

178 Figure A.4: (a) Image of the LakeShore TTP4 probe station. (b) Autocad rendition of a model XYZ piezo manipulator integrated into the TTP4 stage. (c) XYZ piezo manipulator with the X, Y, and Z piezo stages, X, Y, and Z piezo twisted pair power cables, and probe and probe wire identified. (c) Coupling capacitor box. The top contact and the input to the current amplifier are connected to the top and right BNCs, respectively. The amplitude and phase shifted AC signal is connected to the left BNC. A.2 SCM implementation in the Park AFM The low-noise absolute capacitance detection circuit was also implemented in the Park Systems AFM. Figure A.5 shows a schematic of the circuit. Channel 1 of the function generator applies an AC bias to the sample through the Park Systems breakout box. The AFM probe is connected to the input of a current amplifier. The capacitive 156

179 current that flows into the current amplifier can be nulled out by adjusting the amplitude and phase of the AC bias applied by channel 2 of the function generator. Figure A.5: Schematic circuit showing the implementation of the low noise capacitance detection circuit for AFM measurements. Figure A.6 shows photographs of some of the equipment developed for the Park AFM custom low-noise capacitance detection circuit. In Figure A.6(a) we show a modified electronics box including the current amplifier and coupling capacitor, which has been designed to mount to the AFM head to minimize noise. Figure A.6(b) shows an electronics box containing a coupling capacitor that can also be mounted to the AFM head. In this case, an external current amplifier is used. 157

180 Figure A.6: Photographs of modified electronics boxes that mount to the Park AFM head, which contain (a) a current amplifier and a coupling capacitor, and (b) only a coupling capacitor. 158