DATASHEET ISL Features. Applications. Filterless High Efficiency 1.5W Class D Mono Amplifier

Transcription

1 NOT RECOMMENDED FOR NEW DESIGNS NO RECOMMENDED REPLACEMENT contact our Technical Support Center at 888INTERSIL or Filterless High Efficiency.5W Class D Mono Amplifier DATASHEET FN6742 Rev 2. The ISL992 is a fully integrated high efficiency classd mono amplifier. It is designed to maximize performance for mobile phone applications. The application circuit requires a minimum requirement of external components and operates from a 2.4V to 5.5V input supply. It is capable of delivering.4w of continuous output power with less than % THDN driving a 8Ω load from a 5V supply. The ISL992 features a highefficiency, lownoise modulation scheme. It operates with 86% efficiency at 4mW into 8Ω and has a signaltonoise ratio (SNR) that is better than 95dB. The ISL992 has a micropower shutdown mode with a typical shutdown current of 2nA. Shutdown is enabled by applying a logic low to the pin. The architecture of the devices allows it to achieve very low level of popandclick. This minimizes voltage glitches at the output during turnon and turnoff, thus reducing audible noise on activation and deactivation. The fully differential input of the ISL992 provides excellent rejection of common mode noise on the input typically 75dB. EMI suppression is achieved by SRC (Slew Rate Control). The ISL992 oscillator can be synchronized to an external clock through the SYNC input, allowing the switching frequency to be externally defined. The SYNC input also allows multiple ISL992 to be cascaded and frequency locked; minimizing interference due to clock intermodulation. The ISL992 also has excellent rejection of power supply noise, including noise caused by GSM transmission bursts and RF rectification. PSRR is typically 75dB at 27Hz. There will be 4 versions of the part; they will consist of three fixed gain settings (6dB, 9. 6dB, 2dB) and one user programmable gain setting (need external resistors). Features Filterless class D with efficiency > 86% at 4mW Clickpop suppression Slew rate control Spread spectrum switching Optional SYNC pin for master/slave operation without interface.4w into 8Ω with less than % THDN 2.4V to 5.5V single supply voltage Builtin resistors to reduce board component count Only one external component required (Fixed gain mode) Short circuit and thermal protection Gain programmable 6dB, 9.6dB, 2dB and User programmable PbFree (RoHS compliant) Applications Mobile phones MP3 players Portable gaming Portable electronics Educational toys The ISL992 has builtin thermal shutdown and output shortcircuit protection. FN6742 Rev 2. Page of

2 Ordering Information PART NUMBER PART MARKING GAIN SETTING (db) TEMP. RANGE ( C) PACKAGE Tape and Reel (PbFree) PKG. DWG. # ISL992IRTAZT (Notes, 2) 2A 6 4 to 85 8 Ld 3x3 TDFN L8.3x3A ISL992IRTAZTK (Notes, 2) 2A 6 4 to 85 8 Ld 3x3 TDFN L8.3x3A ISL992IRTBZT (Notes, 2) 2B to 85 8 Ld 3x3 TDFN L8.3x3A ISL992IRTBZTK (Notes, 2) 2B to 85 8 Ld 3x3 TDFN L8.3x3A ISL992IRTCZT (Notes, 2) 2C 2 4 to 85 8 Ld 3x3 TDFN L8.3x3A ISL992IRTCZTK (Notes, 2) 2C 2 4 to 85 8 Ld 3x3 TDFN L8.3x3A ISL992IRTDZT (Notes, 2) 2D Prog. 4 to 85 8 Ld 3x3 TDFN L8.3x3A ISL992IRTDZTK (Notes, 2) 2D Prog. 4 to 85 8 Ld 3x3 TDFN L8.3x3A ISL992IRTAEVZ ISL992IRTBEVZ ISL992IRTCEVZ ISL992IRTDEVZ Evaluation Board Evaluation Board Evaluation Board Evaluation Board NOTES:. Please refer to TB347or details on reel specifications. 2. These Intersil Pbfree plastic packaged products employ special Pbfree material sets, molding compounds/die attach materials, and % matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pbfree soldering operations). Intersil Pbfree products are MSL classified at Pbfree peak reflow temperatures that meet or exceed the Pbfree requirements of IPC/JEDEC J STD2. Pinout ISL992 (8 LD TDFN) TOP VIEW 8 VO SYNC 2 7 * IN 3 6 IN 4 5 VO FN6742 Rev 2. Page 2 of

3 Absolute Maximum Ratings (Reference to ) Supply Voltage V to 6V Input Voltage V to V DD.3V Recommended Operating Conditions Ambient Temperature Range C to 85 C Operating Supply Voltage ( Pin) V to 5.5V Thermal Information Thermal Resistance (Typical Note 3) JA ( C/W) TDFN Package Maximum Junction Temperature (Plastic Package) 65 C to 5 C Maximum Storage Temperature Range C to 5 C Power Dissipation Ratings 8 Ld 3x3 TDFN Derating Factor mW/ C Power Ratings T A = 25 C W T A = 7 C W T A = 85 C W PbFree Reflow Profile see link below CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTE: 3. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with direct attach features. See Tech Brief TB379 Electrical Specifications Typical Values Are Tested at and the Ambient Temperature at 25 C. PARAMETER SYMBOL TEST CONDITIONS MIN (Note 5) TYP MAX (Note 5) UNITS Output Power P o, THD = %, f = khz, 2kHz BW, V DD = 5.V.4 W, THD = %, f = khz, 2kHz BW,.75 W, THD = %, f = khz, 2kHz BW,.4 W, THD = %, f = khz, 2kHz BW, V DD = 5.V.5 W Efficiency P OUT =.4W, 8 33µH, V DD = 5.V 9 % Total Harmonic Distortion Ratio THDN P O = W into 8 each channel, f = khz, V DD = 5.V.5 % P O =.5W into 8 each channel, f = khz,.5 % P O =.2W into 8 each channel, f = khz,.9 % CommonMode Rejection Ratio CMRR V IC =.5V to (V DD.8V); to 5.5V db CMRR GSM V CM = 2.5V ± V PP at 27Hz, db Average Switching Frequency f sw khz Differential Output Offset Voltage V OOS G = 6dB; 9.6dB; 2dB; 28dB mv POWER SUPPLY Supply Voltage Range V DD V Power Supply Rejection Ratio PSRR to 5.V 65 db PSRR GSM V PPLT = mv RMS at 27Hz (Input ACCoupled with 2µF capacitor) 65 db Supply Current I IN V IN = V, No load, 3.9 ma V IN = V, No load, ma V IN = V, 8 33µH, 3.9 ma V IN = V, 8 33µH, 3.8 ma I (Note 4) =.2.4 µa FN6742 Rev 2. Page 3 of

4 Electrical Specifications Typical Values Are Tested at and the Ambient Temperature at 25 C. (Continued) PARAMETER SYMBOL TEST CONDITIONS MIN (Note 5) TYP MAX (Note 5) UNITS GAIN CONTROL ClosedLoop Gain D version user program (Max Gain, Ri = ) db A version db B version db C version db Differential Input Impedance Z IN = V DD, A version 7 k = V DD, B version k = V DD, C version 35 k = V DD, D version, Ri = 2.5k 7.5 k = k SHUTDOWN CONTROL Input Voltage High V IH.2 V Input Voltage Low V IL.5 V Turnon Time t WU rising edge from to V DD 3.5 ms Turnoff Time t falling edge from V DD to 5 µs Output Impedance Z OUT = > k NOISE PERFORMANCE Output Voltage Noise E n, f = 2Hz to 2kHz, inputs are AC grounded, A V = 6dB, Aweighting, f = 2Hz to 2kHz, inputs are AC grounded, A V = 6dB, no weighting 27 µv 35 µv SignaltoNoise Ratio SNR P OUT = W, 2 db NOTES: 4. Limits established by Characterization and are not production tested 5. Parameters with MIN and/or MAX limits are % tested at 25 C, unless otherwise specified. Temperature limits established by characterization and are not production tested. FN6742 Rev 2. Page 4 of

5 Pin Descriptions Shutdown Active Low. This signal is used to shut down and activate the part. It is.8v to 5V compatible. During shutdown, the part draws less than na input current. Coming out of shutdown takes 3.5ms and going into shutdown is instantaneous. SYNC External clock input. This pin allows the chip to be synchronized to a system clock. This helps in folding the spectral components and the switching harmonic out of band of interest. The range of SYNC frequency is from 25kHz to 8kHz. IN Positive Differential Input. IN Negative Differential Input. V O Positive BTL output. Ground. V DD Power Supply. V O Negative BTL output. Block Diagram (Notes) SHUTDOWN LOGIC CLICK POP SUPPRESSION SYNC SAWTOOTH GENERATOR 8 BIAS REFERENCE COMP GATE DVE WITH SRC VO IN IN COMP OVER CURRENT PROTECTION GATE DVE WITH SRC VO Notes: Gain = 6dB, 9.6dB, 2dB (gain setting) Gain = 4k ; with external resistor (Ri 5kΩ) FN6742 Rev 2. Page 5 of

6 Typical Performance Characteristics EFFICIENCY (%) V DD = 2.5 V V DD = 3.6 V V DD = 5 V 33µH SUPPLY CURRENT (ma) V DD = 2.5 V V DD = 5 V V DD = 3.6 V 33µH FIGURE. EFFICIENCY vs OUTPUT POWER FIGURE 2. SUPPLY CURRENT vs OUTPUT POWER SUPPLY CURRENT (ma) µH R L = NO LOAD INPUT SUPPLY (V) FIGURE 3. SUPPLY CURRENT vs SUPPLY VOLTAGE TOTAL HARMONIC DISTORTION (%). V DD = 3V... FIGURE 4. TOTAL HARMONIC DISTORTION NOISE vs OUTPUT POWER 2.3 CMRR (COMMON MODE REJECTION RATIO db) V IC = V PP POWER DISSIPATION (W) FIGURE 5. COMMON MODE REJECTION MODE vs FREQUENCY FIGURE 6. POWER DISSIPATION vs OUTPUT POWER FN6742 Rev 2. Page 6 of

7 Typical Performance Characteristics (Continued) POWER DISSIPATION (W) f = khz GAIN = 4V/V THD = % THD = % FIGURE 7. POWER DISSIPATION vs OUTPUT POWER SUPP L Y VOLTAGE (V) FIGURE 8. OUTPUT POWER vs SUPPLY VOLTAGE TOTAL HARMONIC DISTORTION NOISE (%). RL = 8.2W.5W.75W TOTAL HARMONIC DISTORTION NOISE (%). RL = 8.25W.25W.5W. FIGURE 9. TOTAL HARMONIC DISTORTION NOISE vs FREQUENCY. FIGURE. TOTAL HARMONIC DISTORTION NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION NOISE (%).. RL = 8 W.5W.25W.25W FIGURE. TOTAL HARMONIC DISTORTION NOISE vs FREQUENCY 4 INPUTS ACGROUNDED ISL992A = 2.5V = 5V = 3.6V 8 FIGURE 2. REJECTION RATIO vs FREQUENCY ISL992A FN6742 Rev 2. Page 7 of

8 Typical Performance Characteristics (Continued) 4 INPUTS ACGROUNDED ISL992B = 5V = 3.6V 4 INPUTS ACGROUNDED ISL992C = 2.5V = 5V = 3.6V 8 = 2.5V FIGURE 3. REJECTION RATIO vs FREQUENCY ISL992B 8 FIGURE 4. REJECTION RATIO vs FREQUENCY ISL992C 2 4 INPUTS FLOATING ISL992A 2 4 INPUTS FLOATING ISL992B 8 FIGURE 5. REJECTION RATIO vs FREQUENCY ISL992A 8 FIGURE 6. REJECTION RATIO vs FREQUENCY ISL992B 2 4 INPUTS FLOATING ISL992C TOTAL HARMONIC REJECTION RATIO (%). f = khz P O = 2mW 2.5V 5V 3.6V 8 FIGURE 7. REJECTION RATIO vs FREQUENCY ISL992C COMMON MODE INPUT VOLTAGE (V) FIGURE 8. TOTAL HARMONIC DISTORTION NOISE vs COMMON MODE INPUT VOLTAGE FN6742 Rev 2. Page 8 of

9 Typical Performance Characteristics (Continued) SUPPLY INPUT DC COMMON MODE VOLTAGE (V) FIGURE 9. REJECTION RATIO vs DC COMMON MODE VOLTAGE COMMON MODE COMMON INPUT VOLTAGE (V) FIGURE 2. COMMON MODE REJECTION RATIO vs COMMON MODE INPUT VOLTAGE Typical Applications DIFFERENTIAL INPUT SYNC SAWTOOTH GENERATOR V DD C3 Z IN, REV D V IN PWM HBDGE POWER STAGE SR CONTROL VO V IN VO Z IN BIAS REFERENCE FIGURE 2. TYPICAL CIRCUIT WITH DIFFERENTIAL INPUT SYNC DIFFERENTIAL INPUT SAWTOOTH GENERATOR C3 ZIN VIN PWM HBDGE POWER STAGE SR CONTROL VO VIN VO ZIN, REV D BIAS REFERENCE FIGURE 22. TYPICAL CIRCUIT WITH DIFFERENTIAL INPUT INPUT CAPACITORS FN6742 Rev 2. Page 9 of

10 Typical Applications (Continued) DIFFERENTIAL INPUT SYNC SAWTOOTH GENERATOR C3 ZIN C C2, REV D PWM HBDGE POWER STAGE SR CONTROL VO VIN VIN VO C = C2 = µf BIAS REFERENCE FIGURE 23. TYPICAL CIRCUIT WITH SINGLEENDED INPUT Copyright Intersil Americas LLC All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see Intersil products are manufactured, assembled and tested utilizing ISO9 quality systems as noted in the quality certifications found at Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see FN6742 Rev 2. Page of

11 Package Outline Drawing For the most recent package outline drawing, see L8.3x3A. L8.3x3A 8 LEAD THIN DUAL FLAT NOLEAD PLASTIC PACKAGE Rev 4, 2/ ( 2.3) 3. A B (.95) ( 8X.5) 6 PIN INDEX AREA 3. ( 2.9 ) (.5) (4X).5 TOP VIEW PIN (6x.65) ( 8 X.3) TYPICAL RECOMMENDED L PATTERN SEE DETAIL "X" 2X.95 6X ±.5. C C PIN #.8 C INDEX AREA 6 SIDE VIEW.5 ±. 8X.3 ± ±. 8X.3 ±.5. M C A B 4 C. 2 REF 5. 2 NOM.. 5 MAX. BOTTOM VIEW DETAIL "X" NOTES: Dimensions are in millimeters. Dimensions in ( ) for Reference Only. Dimensioning and tolerancing conform to ASME Y4.5m994. Unless otherwise specified, tolerance : Decimal ±.5 Dimension applies to the metallized terminal and is measured between.5mm and.2mm from the terminal tip. Tiebar shown (if present) is a nonfunctional feature The configuration of the pin # identifier is optional, but must be located within the zone indicated. The pin # identifier may be either a mold or mark feature. Compliant to JEDEC MO229 WEEC2 except for the foot length. FN6742 Rev 2. Page of