Celso José Faria de Araújo, M.Sc.
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1 elso José Faria de Araújo, M.Sc.
2 TH IPOLA JUNTION TANSISTOS - JT Objecties: Understand the basic principles of JT operation Interpret the transport model Identify operating regions of the JT and use simplified models Interpret the graphical representation of JT characteristics Analyze and design bias circuits Analyze single-stage amplifiers Use JT small-signal model to analyze amplifiers Understand the transfer characteristic of a JT logic inerter Analyze and determine experimentally the characteristics of some typical JT circuits 1
3 Physical Structure of the JT p + p + p p i p p + 2 n + ollector n + n + mitter ase n epitaxy n epitaxy p + i p n + + i p n buried layer Actie Transistor egion p p ross-section of an integrated npn bipolar junction transistor
4 A simplified structure of the pnp transistor. 3
5 urrent flow in an npn transistor biased to operate in the actie mode, (eerse current components due to drift of thermally generated minority carriers are not shown.) 4
6 Operating egions of the JT and Simplified Models egions of Operation of the ase-mitter Junction J ase-ollector Junction J Forward ias eerse ias Saturation egion Forward ias (losed Switch) eerse-actie egion eerse ias (Inerse-Actie egion) (Poor Amplifier) Forward-Actie egion (Normal-Actie egion) (Good Amplifier) utoff egion (Open Switch) 5
7 Profiles of minority-carrier concentrations in the base and in the emitter of an npn transistor operating in the actie mode; > 0 and 0. 6
8 Large-signal equialent-circuit models of the npn JT operating in the actie mode. 7
9 urrent flow in an pnp transistor biased to operate in the actie mode. 8
10 Two large-signal models for the pnp transistor operating in the actie mode. 9
11 IUITS SYMOLS AND ONNTIONS i i i i i i i i i 1 i i 1 i NPN PNP UTOFF ATI SATUATION < 0.7 i = i = i = 0 < 0.7 i = i = i = 0 = 0.7 = 0.7 = 0.7 < = 0.7 < 10
12 The i - characteristics for an npn transistor in the actie mode. 11
13 (a) onceptual circuit for measuring the i - characteristics of the JT. (b) The i - characteristics of a practical JT. 12
14 ol l ec 4.0mA I = 100 ua I = 80 ua t or I = 60 ua 2.0mA ur r en t I = 40 ua I = 20 ua 0A - A ollector-mitter oltage Transistor output characteristics identifying the arly oltage A 13
15 I I A simple bias circuit ias ircuits I Assuming JT in the actie mode I βi I β I I (and ) is ery sensitie to 14
16 A Simple xample of ias ircuit k I k I β I kω I 4.3 ma I 43 µa I ma = 100 Assume = alculate I and if: = 50? = 200? 15
17 A ias icuit xample = k k 36 k 22k Q Q k 1 16 k 18 k 16 k The four resistor bias network ( Assume F = 75 for analysis ) Theenin quialent Four resistor bias circuit with replicated sources 1 Q 1 2 Q 1 // 2 I β Q Q β I ( sensitiity to is low if >> Q ) I µa I 2.69 µa
18 The Transistor as an Amplifier (a) onceptual circuit to illustrate the operation of the transistor of an amplifier. (b) The circuit of (a) with the signal source be eliminated for dc (bias) analysis. 17
19 The Small-Signal Model Parameters of the JT The ollector urrent and the Transconductance g m i The ase urrent and the Input esistence at the ase r r i i I I I be T b b The mitter urrent and the Input esistance at the mitter be T 1 r e i e I g m T g m g i c be m 18
20 Linear operation of the transistor under the small-signal condition: A small signal be with a triangular waeform is superimpose din the dc oltage. It gies rise to a collector signal current i c, also of triangular waeform, superimposed on the dc current I.I c = g m be, where g m is the slope of the i c - cure at the bias point Q. 19
21 Two slightly different ersions of the simplified hybrid- model for the small-signal operation of the JT. The equialent circuit in (a) represents the JT as a oltage-controlled current source ( a transconductance amplifier) and that in (b) represents the JT as a current-controlled current source (a current amplifier). 20
22 Two slightly different ersions of what is known as the T model of the JT. The circuit in (a) is a oltage-controlled current source representation and that in (b) is a current-controlled current source representation. These models explicitly show the emitter resistance r e rather than the base resistance r featured in the hybrid- model. 21
23 xample to Show Wae Forms (=100) 22
24 Signal waeforms in the circuit of former xample 23
25 (a) circuit; (b) dc analysis; (c) small-signal model; (d) small-signal analysis performed directly on the circuit. 24
26 25
27 Augmenting the hybrid- model to account for the arly effect for the small-signal operation of the JT. 26
28 Augmenting the T-Model to Account for the arly effect for the small-signal operation of the JT. 27
29 Model Parameters in Terms of D ias urrents: g m I T In terms of g m r e g m In terms of r e I T r e elationships between and : g m r e r r b I r 1 r e 1 1 T g m g m r r b 1 r 1 1 r e 1 I T 1 r o I A 28
30 Graphical construction for the determination of the dc base current in the shown circuit. 29
31 Graphical construction for determining the dc collector current I and the collector-to-emmiter oltage in the shown circuit. 30
32 Graphical determination of the signal components be, i b, i c, and ce when a signal component i is superimposed on the dc oltage 31
33 ffect of bias-point location on allowable signal swing: Load-line A results in bias point Q A with a corresponding which is too close to and thus limits the positie swing of. At the other extreme, load-line results in an operating point too close to the saturation region, thus limiting the negatie swing of. 32
34 400uA I = 5 ua 314 ua 300uA I = 4 ua I 200uA I = 2.7 ua I = 3 ua Q-point I = 2 ua 100uA I = 1 ua Load Line 0A Load line for the four resistor bias circuit = k 22k = 75 Q 1 18 k 1 16 k Note: arly effect has been neglacted ( A ) xercice: What s the Q-point if a) = 500 b) c) = 75 and = 56 k 33
35 4.0mA t = I = 30 ua 3.0mA ce (t) 2.0mA Q-point 1.0mA be (t) t = I = 20 ua = I = 15 ua = I = 10 ua Load Line 0A ollecter-emitter oltage Load Line Q-Point and signals for the JT amplifier ce 1.65 A m be 180 phase shift between input and output signals 34
36 I 1 To make I insensitie to temperature and ariation, we design the circuit to satisfy the following two constraints: 1 As is the case in any design problem, we hae a set of conflicting requirements, and the solution must be a compromise. As a rule of thumb, one designs 1, ( ) 1, 1 about 3 or about 3 and I about 3. ias Arrangement Using a Single Power Supply 35
37 I 1 esistor is need only if the signal is to be couple to the base. Otherwise, the base can be connected directly to ground, resulting in almost total independence of the bias current with regard to the alue of. ias Arrangement Using Two Power Supply 36
38 I 1 To obtain a alue of I that is insensitie to ariation of, we select Note, howeer, that the alue of determines the allowable signal swing at the collector since I I An alternatie iasing Arrangement
39 I F I iasing Using a urrent Source 38
40 D Analysis Analysis ircuits Step-by-Step A A A 1. ; A 2. Find the Q-point using large-signal model A Analysis L A A 3. A ; A A A ; A A 4. JT small-signal model 5. Analyze the circuit 6. ombine D A results 39
41 The common-emitter amplifier. (a) ircuit. (b) quialent circuit with the JT replaced with its model. 40
42 The common-emitter amplifier with a resistance e in the emitter. (a) ircuit. (b) quialent circuit with the JT replaced with its T model (c) The circuit in (b) with r o eliminated. 41
43 b i e ( 2 r e ) x ( 1)( 2 r ) K i i b e ( 1) // x K o 6. 8 K c c i e b 2 r e oc c r e i A oc a b 2 e 2 = 100K; 1 = 20K; = 6.8K; 1 =2K 2 = 150; L = 100K; I =10F; =15F =47F; = 200; s = 2K e cc = 30 D ANALYSIS ( 1)( cc = 25 I ( 1) = 50/3K I = 1.926mA; I = 9.58A; I = 1.916mA = 25,86; = 25.16; = > (Actie Operation) A ANALYSIS (SMALL SIGNAL) r e I T A? r o The common-emitter amplifier with a resistance in the emitter (xample) ) ( 1) L o c // L o A a b A b L o b 2 r e b o A s A s A b A s s s D + A ANALYSIS to keep in Actice Operation egion ^ A b ( ) o b c o o A 1 A ^ ^ ^ be be o o A b r 2 m e ^ b r p e ^ p b ^ ^ ^ s to keep in o b 4.88 b 359 p m linear ^ p Operation m s p m p b Suggestion: Do again without 42 i i
44 The common-base amplifier. (a) ircuit. (b) quialent circuit obtained by replacing the JT with its T model. 43
45 The common-collector or emitter-follower amplifier. (a) ircuit. (b) quialent circuit obtained by replacing the JT with its T model. (c) The circuit in (b) redrawn to show that r o is in parallel with L. (d) ircuit for determining o. 44
46 The transistor as a switch-cutoff and saturation To analyse erify if JT is in saturation region. If yes, don t use any type of. Just remember that: to PNP use sat = 0.2 ; to NPN use sat = 0.2 (if not specified). Also remember I = I +I xemple: = 30 ; sat = 0.2 To design use f = min /OF OF = Oerdrie Factor min from Data Sheet f =Forced ; 2 OF 10 45
47 = 1 k = 10 k =5 = 50 sat = 0.2 Simplified Analysis: 1. At I = IH O = OL = sat = 0.2; 2. At I = IL O = OH = = 5 3. At I = IL, the JT begins to turn on, thus IL For IL < I < IH, the JT is in the actie region o A A r i 5/ 5. At I = IH, the JT enters the saturation region ( sat ) I I ( OS ) 96 I 1.66 IH ( OS ) A asic JT digital logic inerter. 46
48 Implementation of na TL ( resistor-transistor logic ) NO-gate = A 450 F 450 A F 47
49 The High-Frequency Model of the JT r + - be g m be r o g m I T A I r o r π β g o m Inclusion of capacitances in the hybrid-pi model of JT π diff jb e diff τ g m τ W 2D 2 µ jb c 48
50 60 d The unity-gain frequency ( f T ) : the frequency at which drops to one + + be - i log o - 3 d i b r g m r be be o d/decade f f T ommon-emitter current gain ersus frequency for the JT f Frequency (Hz - Log Scale) Finding the short-circuit current gain of the JT β β o 1 s β β 1 r ( ) π π µ T o β β T g m π µ i c 49
51 Dependence of the unity-gain frequency on collector current high-leel injection f Tmax f T I M log I low currents: ( I << I M ) f T I moderate currents I M f T independent of current high-leel injection: I > I M f T decreases with I urrent dependence of f T 50
52 b i e ( 2 r e ) x ( 1)( 2 r ) K i i b e ( 1) // x K o 6. 8 K c c i e b 2 r e oc c r e i A oc a b 2 e 2 = 100K; 1 = 20K; =6.8K; 1 =2K 2 = 150; L = 100K; I =10F; =15F =47F; = 200; s = 2K e cc = 30 D ANALYSIS = 25 = 50/3K > (Actie Operation) A ANALYSIS (SMALL SIGNAL) I 1)( I = 1.926mA; I = 9.58A; I = 1.916mA = 25,86; = 25.16; = ( ( cc 1) r e I T A? r o L o c // L o A a b A b L o b 2 r e b o A s A s A b A s s s D + A ANALYSIS to keep in Actice Operation egion ^ A b ( ) o b c o o A 1 A The common-emitter amplifier with a resistance in the emitter (xample) ) ( 1) ^ ^ ^ be be o o A 10 b r 2 m e ^ b r p e ^ p b ^ to keep in o ^ ^ s b 4.88 b 359 linear p m ^ p Operation m s p m p b Suggestion: Do again without 51 i i
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