Circuit produces an amplified negative version of v IN = R R R

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1 Inerting Amplifier

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3 Circuit produces an amplified negatie ersion of i = i, = 2 0 = 2 OUT OUT = 2 Example: Calculate OUT / and I for = 0.5V

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5 Solution: A V OUT 2 = = = 0 kω = 0 kω i 05. V = = = kω 05. ma

6 Difference Amplifier

7 IF IF 2 = 0V = OUT = 0V = OUT Using superposition: OUT = Difference amplifier combines inerting and noninerting confiurations Amplification factors multiplying and 2 are not the same

8 Improed Difference Amplifier

9 + = 2 +, OUT = OUT 2 = ( 2 )

10 Summation Amplifier

11 (... ) = i = i + i + + i OUT F F 2 N F OUT = F F F 2 N N The output is an inerted, weighted sum, or linear combination,, of the inputs,... N

12 Voltage-Follower (Buffer) Amplifier

13 + = OUT = V CC = +5 V, V EE = 0 V

14 Op-Amp with T-Bridge Feedback

15 Assume >> ( ) 2 A B B OUT A + B B 2 = B OUT 2 A + B B Proides large gain with small resistances Exact expression can be deried using KVL and KCL OUT = ( A B + 2A + 2B ) B

16 Opamp Integrator

17 i = = C d dt OUT OUT t ( t) = C dt 0

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19 Solution OUT = 0 at t = 0 t 0 OUT t ( ) = C dt t OUT t ( ) = dt = ( t ) = t k F) ( 5 Ω )( µ 0 OUT t = 0 ms ( ) = ( 0. 8V / ms) 0 ms = 8V

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22 Opamp Differentiator

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25 i C d = = dt OUT 2 OUT = C d 2 dt For the Inductor i = OUT = OUT = L d dt L di dt Capacitie Integrator is more desirable due to non ideal behaiour of inductor Differentiator circuits are susceptible to noise. Small noise fluctuations may hae large deriaties

26 Non-linear Opamp Circuits

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31 Schmitt Trigger

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33 Schmitt Trigger V CC = 2 V V EE = -2 V / ( + 2 ) = /2 V = 0 Vp Triangle Wae

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35 Nonideal Properties of Opamps For many applications ideal opamp approximation proides adequate model, howeer, for demanding applications nonideal characteristics must be considered eal opamps hae finite input resistance, non-zero output resistance, limited bandwidth and finite gain In addition, internal component mismatches result in offset oltages and currents

36 Effects of Finite Open Loop Gain and Input esistance Noninerting Amplifier

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38 i = r = r i +, = i 2 = Ao ( ) Ao ( ) = i = i + i 2 = ( ) Ao ( ) + r 2 Ao A r = r o If A o Ao 2 >> = A = 2 o

39 OUT = Ao ( = Ao ) + Aor A r o 2 2 OUT = A r o 2 2 If A o OUT >> = = + 2

40 Input esistance i = r = r + A Ao r 2 2 o 2 i = r + A r o A r o TH = = i r ( + Ao ) ( + 2 ) 2 r If Ao >> 2 TH r + Ao + 2 r Ao + 2 i.e. Feedback increases the input impedance thus the motiation for the ideal approximation

41 Inerting Amplifier

42 i = i + i = 2 i = r = 0 ( ) = + + i 2 = Ao ( + ) ( + Ao ) = 2 2 = + r ( + Ao ) 2

43 = A r 2 o = + + ( + A o ) r 2 OUT = A = o A A r A o o o 2 If A >> 2 o OUT Input esistance i = = + r + + A o ( ) 2 TH = = i + r + ( + A ) o 2 Ao r + ( + Ao ) = If >> 2

44 Effects of Nonzero Output esistance Effectie output resistance is ealuated by connecting a test oltage to the output

45 = TEST + 2 i TEST = + TEST TEST o 2 A ( + ) + r OUT = 0 i = + TEST TEST r 2 OUT A r o OUT + 2 TH TEST = = + + i + r TEST 2 OUT A r o OUT + 2 = rout + 2 r OUT + + A o 2 r A OUT o + 2 If A o >> Output resistance is decreased by feedback

46 Input and Output Offset Voltage Internal circuitry introduces imbalances that lead to unwanted DC output components Common to model this by an input offset oltage The input offset oltage V IO is defined as the DC oltage that must be applied between + and to force OUT to zero under open-loop conditions Typical alues are from +/ (0 mv -- µv) The offset oltage will ary with temperature

47 Example: Asses the effect of the input offset oltage on the noninerting amplifier with A V = 00 and V IO = +/- 0 mv

48 Since V IO appears in series with the output can be obtained using superposition = + 2 OUT IO V OUT = 00 ± V Signal DC offset

49 The effects of internal imbalance can be corrected by adding external components to opamp circuits. Many opamps proide a set of offsetnull terminals which can be connected to a potentiometer which can be adjusted to cancel out the effects of V IO

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51 Input Bias and Input Offset Current In addition to the current flow through r (which accounts for current flow from + to ) there is a small DC current flow into + and terminals for proper operation of the internal input stage. These current flows are called input bias currents and are designated as I + and I

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54 The bias currents I + and I will normally differ by a slight amount. Input bias current is formally defined as the algebraic aerage of I + and I I BIAS = I + 2 I + Typical bias currents range form 0. pa to 0 µa and can be positie or negatie depending on the type of opamp Example: For the following circuit I + = I = 00 na. Determine OUT.

55 Using superposition we can calculate the DC and Signal components separately.

56 i = 0 i = I = 0 2 = 0 = i = I OUT = The current I + flows directly into the + terminal from ground and does not affect OUT OUT 2 = + I 2 OUT = mv Signal Input bias current Component Component The output component due to bias current can be cancelled by inserting a resistor in series with the + terminal

57 In some opamps the DC bias currents I + and I are not equal. The difference is called the input offset current which is defined by the relationship I IO = I + I The imbalance is typically 5-0 % of the aerage input bias current

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59 Slew ate Limitations Ideal opamp has the ability to change its output instantaneously. In a real opamp the rate of change of the output (V/µs) can neer exceed a specified alue called the slew rate. General purpose opamps hae typical slew rates from V/µs to 0 V/µs When an opamp is drien at its slew rate the output exhibits non-linear behaiour which will result in distortion of the input signal

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61 Finite Frequency esponse Ideal opamp assumes all signals will be amplified with same gain regardless of frequency Internal frequency response of real opamp is limited as follows

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63 The dominant pole frequency f p is typically a few hertz Aboe f p the gain falls at a rate of 20 db / decade At the frequency f o the magnitude of the internal oltage gain reaches unity Without limited internal frequency response many opamp circuits would be unstable Output Saturation Leels Ideal opamp assumes output saturation leels equal supply oltages. In real opamps outputs saturate before they reach supply oltages due to internal oltage drops in bipolar of MOSFET transistors.

64 Differential Amplifiers Found in many electronic circuits including opamps, low and high frequency amplifiers, analog modulators and digital logic gates (ECL) Proides an input stage with large input resistance and differential amplification Proides both large gain and parameter insensitie bias Well suited for use in integrated circuits where matched deices are readily aailable Basic Topology - Stable bias requires feedback resistor between actie deice and common node

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67 Inclusion of feedback resistor also reduces gain. Use of a shunting capacitor can alleiate this problem, howeer, it is not suitable at low frequencies and is not proactical for integrated circuit designs A better method inoles the addition of a second actie deice to proide the low impedance bypass path to ground. The new topology is called the differential amplifier configuration The addition of a second pull-up load proides other important properties: Differential amplifiers can be implemented with BJTs, MOSFETs or JFETs

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