A Novel Concept for Mains Voltage Proportional Input Current Shaping of a VIENNA Rectifier Eliminating Controller Multipliers

Transcription

1 1 of 10 A Novel Concept for Mains Voltage Proportional Inpt Crrent Shaping of a VIENNA Rectifier Eliminating Controller Mltipliers Part I: Basic Theoretical Considerations and Experimental Verification JHANN MINIBÖCK FRANZ STÖGERER JHANN W. KLAR EGSTN GmbH Grafenbergerstrasse 37 A-3730 Eggenbrg, AUSTRIA / Erope Phone: miniboeck@egston.com Technical University Vienna Dept. of El. Drives and Machines Power Electronics Grop Gsshasstr. 27/E372, A-1040 Wien Phone: fstoegerer@ieam.twien.ac.at Swiss Federal Institte of Technology (ETH) Zrich Power Electronics and Electrometrology Laboratory ETH-Zentrm/ETL H24 CH-8092 Zrich/Switzerland Phone: kolar@lem.ee.ethz.ch Abstract. Part I of this paper proposes a novel mains voltage proportional inpt crrent control concept eliminating the mltiplication of the otpt voltage controller otpt and the mains AC phase voltages for the derivation of mains phase crrent reference vales of a three phase/level/switch PWM (VIENNA) rectifier system. Frthermore, the concept featres a low inpt crrent ripple amplitde as, e.g., achieved for space vector modlation, a low amplitde of the 3 rd harmonic of the crrent flowing into the otpt voltage center point and a wide range of modlation. The practical realization of the analog control concept as well as experimental reslts for application with a 5kW prototype of the PWM rectifier are presented. Frthermore, a control scheme which relies only on the absolte vales of the inpt phase crrents and a modified control scheme which does not reqire information abot the mains phase voltages and therefore is ideally sited as a basis for the development of an integrated control circit for three phase power factor correction is presented. In Part II of the paper a comparison of the experimental reslts of a conventional average crrent mode control scheme employing controller mltipliers and of the proposed control scheme in case of a heavily nbalanced mains as well as for two phase operation is treated in detail. N = '= d' (I.3) (as valid for CCM, in case the otpt voltage ripple is neglected, i.e. is assmed), the proportionality of i N and N is obtained by N = in (I.4) and can be described by an eqivalent inpt resistance vale R N =. (I.5) Conseqently, the inpt crrent and/or the power consmption of the system can easily be adjsted by the otpt voltage control by changing the amplitde of the carrier signal Î D. A lower amplitde of the carrier signal I.1 Introdction Conventional single-phase and three-phase power factor correction systems employ analog mltipliers for the generation of the inpt crrent reference vales for the crrent mode controllers. Bt, as shown in [1]-[4] ohmic mains behavior can be achieved for single-phase boost type PWM rectifier systems in continos condction mode (CCM) withot measrement of the inpt voltage and withot a mltiplication in the otpt voltage feedback loop. According to [3] and [4] there the relative off-time of the power transistor d T P (T P = 1/f P denotes the plse period) is defined by comparing the actal inpt crrent with a carrier signal with switching freqency. For given amplitde Î D of the saw-tooth shaped carrier signal and neglection of the ripple component of the inpt crrent, i.e., T 1 P in i N ( in = in ) (I.1) TP 0 in = d', (I.2) and for taking into consideration the stationary eqilibrim of the inpt voltage N and the local average vale ' of the voltage, Fig.I.1: Basics of an inpt voltage proportional gidance of the inpt crrent i N of a PWM boost converter system by means of a proportional relationship of the trn-off interval d of the power transistor and i N. Strctre of the power circit and block diagram of the control (a), detailed time behavior of the inpt crrent i N, of the carrier signal i D and of the reslting drive signal of the power transistor (b), eqivalent circit of the inpt stage (c) and control oriented block diagram (d).

2 2 of 10 leads to d = N / at smaller vales of the inpt crrent, cf. i N,2 in Fig.I.1(b). This system fnction can be realized withot a mltiplier in the control circit (cf., e.g., Fig. 10 in [4]). The dynamic behavior of the system corresponds in the first approximation (for neglection of the low freqency otpt ripple voltage de to the plsation of the otpt power level with twice the mains freqency) to a first order delay [4] N ( s) 1 in ( s) =, (I.6) RN L 1+ s RN this can be clearly explained by the negative feedback of an integration element 1/sL representing the inpt indctor via the modlation stage (an increase of the inpt crrent i N reslts in an increase of d and/or of the voltage ' and sbseqently in a decrease of the voltage N ' which is applied to the indctor L, cf. Fig.I.1(b) and Fig.I.1(c). Fig.I.1(d) can be interpreted as a control loop having N as reference vale. As shown in [4] the nity gain bandwih of the control loop reslts for common dimensioning of the system typically in f P/30, hence the considerations for processes with mains freqency can be in a qasi-stationary manner; therefore, the inpt crrent of the system is gided directly proportional to the inpt voltage withot the reqirement of an analog or digital mltiplier for generating reference crrent waveforms. In this paper this basic control concept now shall be applied and investigated in modified form [7] in connection with a threephase/switch/level PWM (VIENNA) rectifier (cf. Fig.I.2, [8]), which already is well established in the indstry for three-phase power factor correction like the boost converter for single phase applications. Advantages of the system are a low blocking voltage stress on the power semicondctors and a high efficiency besides a low ripple with switching freqency of the sinsoidal mains crrent. In the following in section I.2 the realization of the control circit in analog techniqe is described. In section I.3 a modification of the proposed control concept which does not reqire a sensing of the mains phase voltages and therefore is ideally sited as a basis for the development of an integrated control circit for three phase power factor correction is proposed; frthermore, a control scheme relying on the absolte vales i N,i of the inpt phase crrents is discssed. Section I.4 shows the experimental investigation of the control concepts in connection with a 5kW prototype of the PWM rectifier. There, special attention is paid to the qality of the gidance of the inpt crrents in the vicinity of the zero-crossings and at light load (reslting in discontinos condction mode). I.2 Mltiplier Free Control Concept Fig.I.4 shows the block diagram of the two-loop control of the VIENNA Rectifier incorporating the proposed mltiplier free inpt phase crrent control concept [7] in the inner loop. The oter loop controls the total vale of the otpt voltage to a constant vale by proper adjstment of the amplitde of the carrier signal Î D and balances the vales of the two partial otpt voltages by means of the zero-crrent component i 0. The basic operating behavior of the inner crrent control loop is identical to single-phase power factor correction when adding a connection between the otpt voltage center point and the mains star point what reslts in a decopling of the phases. Fig.I.2: Strctre of the power circit of the PWM (VIENNA) rectifier system. Then, for positive mains phase voltages the (single-phase) boost converter topology is formed by the inpt indctor L (with series diode D N+), the power transistor S i (with series diode D M ), the free wheeling diode D F+ and the otpt capacitor C +; for negative mains phase voltages the boost strctre is formed by the inpt indctor L (with D N ), S i (with D M+), D F and C. However, de to deriving the off-time of the power transistors directly from the ac inpt crrent i N,i (instead of taking the absolte vales) one now has to shift the trianglar carrier signal by ±Î D (+Î D for positive phase crrent, Î D for negative phase crrent). Frthermore, an inversion of the switching decisions s i of the modlator stages in dependency of the signs of the inpt phase crrents i N,i and/or of the inpt phase voltages N,i ( N,i prop. i N,i) has to be performed. Becase the actal system does not show a connection between the mains netral point and the capacitive rectifier otpt voltage center point a copling of the phases mst be taken into consideration. According to and/or i N, R + in, S + in, T = 0 d in, R din, S din, T + + = 0 (I.7) (I.8) the change of a switching state of a rectifier bridge leg and/or the change of a phase crrent takes inflence also on the crrents of the two other phases. Therefore, the switching decisions of the phases are coordinated advantageosly by sing a single carrier signal i D with trianglar shape for all three phases as, e.g., for ramp comparison crrent control (regarding the drawbacks of a sawtooth shaped carrier signal please refer to [9]). The system in this case advantageosly has the property of a natral stability of the partition of the total otpt voltage U to C+ and C. However, in order to ensre high system reliability, additionally an active symmetry control of the partial otpt voltages is provided by offsetting all measred phase crrents by i 0. As shown in [8] i 0 directly reslts in a global average vale I M of the center point crrent i M and therefore can be sed for garanteeing C+ = C = 1 / 2U. Using directly the actal sinsoidal inpt phase crrent for the PWM modlator stage wold allow the formation of a fndamental of the maximm rectifier inpt phase voltage of only Û N,max = / 2. Therefore, besides low-pass filtering for sppression of the switching freqency ripple the measred actal phase crrents i N,i are extended by a zero-seqence

3 3 of 10 component i 0,m with three-times the mains freqency [10] (cf. Fig.I.3), (i N,i = i N,i + i 0,m; i = R, S, T). This (theoretically) increases the modlation limit to 2 Û N,max =, and reslts in a significant redction of the inpt 3 2 crrent ripple amplitde and of the amplitde of the 3 rd harmonic of the center point crrent i M (as compared to prely sinsoidal modlation). We wold like to point ot that despite the addition of i 0,m the phase crrent waveforms are still gided sinsoidally, i.e., proportional to the phase voltages; i 0,m only leads to the formation of a zero seqence component of the rectifier inpt voltage which according to Eq.(I.7) does not reslt in a crrent flow. Fig.I.3: Principle of generation of the zero-seqence component i 0,m with a prononced 3 rd harmonic from the measred inpt phase crrents. In the practical realization the diodes are replaced by ideal diodes realized by means of operational amplifiers. Fig.I.4: Strctre of the proposed mltiplier free crrent control concept [7]. Signal paths being eqal for different phases are shown by doble-lines. I.3 Control Methods Withot Mltipliers and Withot Inpt Voltage Sensing The disadvantage of the realization shown in Fig.I.4 is the need of the determination of the sign of the inpt phase voltages for shifting the trianglar-shaped carrier signal and for the inversion of the switching signals s i with line freqency. Therefore, a realization of a control concept which relies only on the absolte vales i N,i of the inpt phase crrents wold be of special interest. A block diagram of a possible realization is given in Fig.I.5. However, in this case nfortnately the trianglar shaped carrier signal Î D needs to be shifted by 180 in switching freqency (inverted) in case of negative inpt phase voltages and/or negative inpt phase crrents for a minimization of the inpt crrent ripple and/or of the size of the inpt indctors as has been proven by theoretical considerations simlation (details are omitted here for the sake of brevity). This again gives a reason for detecting the signs of the inpt phase voltages or the signs of the inpt phase crrents where the latter cold case problems with light loads and/or in idle mode. Bt, advantageosly that the total realization effort is comparably low. Fig.I.5: Strctre of a mltiplier free crrent control concept which relies on the absolte vales i N,i of the inpt phase crrents and which does not reqire a detection of the sign of the inpt phase voltages. Signal paths being eqal for different phases are shown by doble-lines. An alternative is to generate not only a single trianglar carrier signal i D bt to generate a positive and a negative carrier where both signals are synchronized and in phase. These two signals are compared directly with the measred (bipolar) inpt phase crrents by separate comparators. The switching signals s i then can be derived by a simple combinatorial logic, i.e. dependent on the sign of the comparison and a type of transistor drive circit (high or low active) by an AND, R, NAND or NR Gate, Fig.I.7. This allows to operate the whole control circit withot a detection of the sign of the inpt voltage and/or a derivation of the sign information from the inpt crrent (Fig.I.6). It is necessary to point ot that there is also no need of a recognition of sectors of the mains period (as defined by the relationship of the mains phase voltages) as described in [5] what cold probably case problems in case of heavily nbalanced mains conditions and/or in case of a phase loss. Fig.I.6: Strctre of a mltiplier free crrent control concept employing two nipolar carrier signals i D+ and i D where no information abot the sign of the inpt voltages or crrents is reqired.

4 4 of 10 I.4 Experimental Reslts Fig.I.7: Generation of a phase switching fnction s by intersection of the corresponding phase crrent i N with a positive carrier signal i D+ and a negative carrier signal i D. The carrier signals i D+ and i D are common for all three phases. The investigation of the mltiplier free control concept was done in the first step with the strctre shown in Fig.I.4 for two different load conditions (cf. Tab.I.1(a): fll load; (b): half the nominal load) in order to show the basic performance of the concept. In Fig.I.8 (a) and (d) show one of the three mains ac phase voltages N,R and the corresponding converter inpt indctor crrent i N,R recorded in peak detection mode for the demonstration of the ripple of the indctor crrent; frthermore, i N,R is recorded in high-resoltion mode in order to show the crrent in the mains reslting after adeqate EMIfiltering. In Fig.I.8. (b) and (e) the modlating inpt crrent i N,R (zeroseqence component i 0,m added to the low-pass filtered actal crrent i N,R ), the trianglar carrier signal i D shifted according to sign( N,R) and the switching signal s R of the PWM stage for one fndamental period are depicted. Fig.I.8 (c) and (f) show the time behavior in the vicinity of the zero-crossing of a phase crrent. U N,rms I N P N λ THD V THD A U I P η [V] [A] [kw] [%] [%] [V] [A] [kw] [%] (a) (b) Tab.I.1: perating parameters for the experimental investigations (cf. Fig.I.8) of the mltiplier free control system according to Fig.I.4 for two different inpt power levels. U N,rms I N P N λ THD V THD A U I P η [V] [A] [kw] [%] [%] [V] [A] [kw] [%] (a) (b) Tab.I.2: (a): perating parameters for the experimental investigations (cf. Fig.I.9) of the mltiplier free control system according to Fig.I.6; (b): discontinos condction mode (DCM) corresponding to Fig.I.10. Fig.I.8: Experimental analysis of the control concept according to Fig.I.4 in connection with a 5kW prototype of the VIENNA Rectifier. perating parameters: U N,rms = 400V (line-to-line voltage), U = 675V, tpt power P = 5.14kW for (a), (b), (c), P = 2.40kW for (d), (e), (f). (a) and (d): mains ac phase voltage N,R and corresponding inpt crrent i N,R; (recorded in peak detection mode and in high resoltion mode in order to attenate the switching freqency ripple, 5A/div) (b) and (e): modlating inpt crrent i N,R (zero-seqence component crrent i 0,m added to the lowpass filtered actal crrent i N,R), trianglar carrier signal i D shifted according to sign( N,R) and switching signal s R of the PWM stage for one fndamental period; (c) and (f): details of waveforms shown in (b) and (e) in the vicinity of the zero-crossings of the phase crrent.

5 5 of 10 Fig.I.9: Experimental analysis of the control concept according to Fig.I.6 in connection with a 5kW prototype of the VIENNA Rectifier. perating parameters: U N,rms = 400V (line-to-line voltage), U = 675V, otpt power P = 5.11kW. Mains ac phase voltage N,R and corresponding inpt crrent i N,R; (recorded in peak detection mode and in high resoltion mode in order to attenate the switching freqency ripple, 5A/div) (a), modlating inpt crrent i N,R (zero-seqence component i 0,m added to the low-pass filtered actal crrent i N,R), trianglar carrier signals i D+ and i D and switching signal s R of the PWM stage for one mains period (b); (c): details of waveforms shown in (b) in the vicinity of the zero-crossings of the phase crrent. These reslts lead directly to the control concept according to Fig.I.6 (no need of inpt phase voltage detection), which is investigated in the following in Fig.I.9 for fll load conditions as detailed in Tab.I.2. Fig.I.10: Inpt indctor crrent i N,R (1A/div) recorded in peak detection mode and the corresponding average vale i N, R (recorded sing high resoltion mode) in partly discontinos condction mode (light load) according to Tab.I.2(b). Fig.I.10 shows the inpt phase voltage N,R and the corresponding inpt indctor crrent recorded in peak detection mode in order to show the inpt crrent ripple and the mode of operation with discontinos condction mode (DCM) occrring at very light loads (P =366W). The average vale of the inpt crrent is still of approximately sinsoidal shape (and/or proportional to the phase voltage) with a total harmonic distortion of THD_A =11.2% and a power factor λ= Therefore, althogh the theory compiled in section I.1 does not hold in DCM the system shows a relatively good performance at light loads (a detailed investigation of the performance of the control concept in DCM will be presented in a ftre paper). A reason for this also is the nonlinearity of the iron powder cores employed for the inpt indctors which show the highest indctance vales at zero and/or small crrent vales, correspondingly the systems enters into DCM only at relatively light loads. Also the circmstance, that if one of the inpt crrents is in the vicinity of a zero crossing and therefore discontinos, the other two phases have according to Eq.(I.7) crrent vales differing from zero and therefore still stay in continos condction mode (for operating conditions as shown in Fig.I.10) and since the three phases are not decopled still force an approximately voltage proportional gidance of all three inpt crrents. The inpt crrent wold become discontinos within the whole mains period for low inpt crrent amplitdes, bt in the realization at hand the converter enters a hickp mode below a defined inpt power level in order not to control the otpt voltage to a constant vale also in idle mode (at no load every single plse wold increase the otpt voltage). The behavior of the system in discontinos condction mode cold be frther improved by increasing the switching freqency at light loads as proposed in [11]; this also is treated in detail a research project crrently being nder way. I.5 Smmary Part I Part I of this paper presents a novel concept for a mains voltage proportional inpt crrent shaping which eliminates analog or digital mltipliers in the control loop. The concept featres a wide modlation range comparable to space vector modlation by extending the modlating phase crrent vales by a zero-seqence component with a significant 3 rd harmonic content. Besides a basic theoretical analysis an experimental verification of the concept is given in connection with a 5kW prototype of the PWM VIENNA Rectifier for symmetric three-phase inpt.. Also a modified control scheme which relies on the absolte vales of the inpt phase crrents and a modified control scheme which directly employs the inpt phase crrents as modlating signals and does not need no information abot the signs of the inpt phase crrents and/or voltages are presented and the latter is verified experimentally also for discontinos condction mode. The fact, that the converter system behaves like a star-connection of eqal ohmic resistors leads now motivates the investigation of the system system behavior also for nbalanced mains conditions which will be given in Part II of this paper.