Applications S S S S 1024

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1 IMAGE SENSOR NMOS linear image sensor S9/S9 series Built-in thermoelectric cooler ensures long exposure time and stable operation. NMOS linear image sensors are self-scanning photodiode arrays designed specifically as detectors for multichannel spectroscopy. The scanning circuit is made up of N-channel MOS transistors, operates at low power consumption and is easy to handle. Each photodiode has a large active area, high UV sensitivity yet very low noise. The built-in thermoelectric cooler (air cooled) allows a long exposure time achieving a high S/N even at low light levels. The cap uses a sapphire glass window hermetically welded for high reliability. Features Applications l Wide active area l Multichannel spectrophotometry Pixel pitch: µm (S9 series) l Image readout system µm (S9 series) Pixel height:. mm l High UV sensitivity with good stability l Low dark current and high saturation charge allow a long integration time and a wide dynamic range at room temperature l Excellent output linearity and sensitivity spatial uniformity l Start pulse and clock pulses are CMOS logic compatible l Built-in air-cooled thermoelectric cooler (setting temperature: C) Selection guide Pixel size Active area size Type No. Number of pixels [µm (H) µm (V)] [mm (H) mm (V)] S9-S.. S9-S.. S9-S.. S9-S.. In addition to S9/S9 series, Hamamatsu provides S/S series thermoelectrically cooled NMOS linear image sensors that offer higher sensitivity in the near IR range. Major characteristics of S/S series are almost identical with S9/S9 series except that the peak sensitivity wavelength is 7 nm (see Figure ) and the saturation charge is 9 m lx s.

2 NMOS linear image sensor S9/S9 series Figure Equivalent circuit Figure Active area structure START st CLOCK CLOCK ACTIVE PHOTODIODE DIGITAL SHIFT RESISTER (MOS SHIFT RESISTER) END OF SCAN ACTIVE VIDEO. mm SATURATION CONTROL GATE SATURATION CONTROL DRAIN Vss DUMMY VIDEO OXIDATION SILICON b a. µm DUMMY DIODE N TYPE SILICON. µm µm KMPDCEA P TYPE SILICON S9 SERIES: a= µm, b= µm S9 SERIES: a= µm, b= µm KMPDAEA Absolute maximum ratings Parameter Symbol Value Unit Input pulse (φ, φ, φst) voltage Vφ V Operating temperature * Topr - to + C Storage temperature Tstg - to + C *: No condensation. Ambient temperature should be less than the element cooling temperature + C. (Example: Ambient temperature should be less than C in order to keep the element temperature at C.) Specifications (Ta= C, unless otherwise noted) Parameter Symbol S9 series S9 series Min. Typ. Max. Min. Typ. Max. Unit Pixel pitch µm Pixel height mm Spectral response range ( % of peak) λ to to nm Peak sensitivity wavelength λp nm C Photodiode dark current * ID C pa Photodiode capacitance * Cph pf Saturation exposure *, * Esat mlx s Saturation output charge * Qsat pc Photo response non-uniformity * PRNU - - ± - - ± % *: Vb=. V, Vφ=. V *: K, tungsten lamp *: % of saturation, excluding the start pixel and last pixel

3 NMOS linear image sensor S9/S9 series V Electrical characteristics (Ta= C) Parameter Symbol Condition S9 series S9 series Min. Typ. Max. Min. Typ. Max. Unit Clock pulse (φ, φ) High Vφ, Vφ (H).. V voltage Low Vφ, Vφ (L) V Start pulse (φst) voltage High Vφs (H). Vφ. Vφ V Low Vφs (L) V Video bias voltage * b. Vφ -. Vφ -.. Vφ -. Vφ -. V Saturation control gate voltage Vscg V Saturation control drain voltage Vscd - Vb - - Vb - V Clock pulse (φ, φ) trφ, trφ rise/fall time * tfφ, tfφ ns Clock pulse (φ, φ) pulse width tpwφ, tpwφ ns Start pulse (φst) rise/fall time trφs, tfφs ns Start pulse (φst) pulse width tpwφs ns Start pulse (φst) and clock pulse (φ) overlap tφov ns Clock pulse space * X, X trf trf ns Data rate * 7 f khz % of - (-S) - - (-S) - ns Video delay time tvd saturation * 7, * - (-S) - - (-S) - ns Clock pulse (φ, φ) - (-S) - - (-S) - pf Cφ V bias line capacitance - 7 (-S) - - (-S) - pf Saturation control gate (Vscg) - (-S) - - (-S) - pf Cscg V bias line capacitance - (-S) - - (-S) - pf Video line capacitance CV V bias - (-S) - - (-S) - pf - (-S) - - (-S) - pf *: Vφ is input pulse voltage. *: trf is the clock pulse rise or fall time. A clock pulse space of rise time/fall time - ns (nanoseconds) or more should be input if the clock pulse rise or fall time is longer than ns. *7: Vb=. V, Vφ=. V *: Measured with C7 driver circuit. Figure Dimensional outlines (unit: mm) S9-S, S9-S S9-S, S9-S.. ±. *.. ±. * ± ±... ±... *.. ±... * ±. *: Thickness of sapphire glass *: Distance from the surface of sapphire glass to the chip surface ±. *: Thickness of sapphire glass *: Distance from the surface of sapphire glass to the chip surface KMPDA9JA KMPDA9JA

4 NMOS linear image sensor S9/S9 series Figure Pin connection st Vss Vscg Vsub 9 TE-COOLER + THERMISTOR 7 TE-COOLER - THERMISTOR 7 END OF SCAN 9 Vscd DUMMY VIDEO ACTIVE VIDEO Vss Vss, Vsub and should be grounded. Electricity flows between the th pin and package metal. KMPDCEA φ, φ Terminal Input or output Description Input (CMOS logic compatible) Pulses for operating the MOS shift register. The video data rate is equal to the clock pulse frequency since the video output signal is obtained synchronously with the rise of φ pulse. Pulse for starting the MOS shift register operation. The time interval between start pulses is equal to the signal accumulation time. φst Input (CMOS logic compatible) Vss - Connected to the anode of each photodiode. This should be grounded. Vscg Input Used for restricting blooming. This should be grounded. Vscd Input Used for restricting blooming. This should be biased at a voltage equal to the video bias voltage. Video output signal. Connects to photodiode cathodes when the Active video Output address is on. A positive voltage should be applied to the video line in order to use photodiodes with a reverse voltage. When the amplitude of φ and φ is V, a video bias voltage of V is recommended. Dummy video Output This has the same structure as the active video, but is not connected to photodiodes, so only spike noise is output. This should be biased at a voltage equal to the active video or left as an open-circuit when not needed. Vsub - Connected to the silicon substrate. This should be grounded. End of scan Output (CMOS logic compatible) - Should be grounded. TE-cooler Input For sensor chip cooling Thermistor Output For temperature control This should be pulled up at V by using a kω resistor. This is a negative going pulse that appears synchronously with the φ timing right after the last photodiode is addressed. Figure Spectral response (typical example) PHOTO SENSITIVITY (A/W)..... IR HIGH-SENSITIVITY TYPE S/S SERIES S9/S9 SERIES (Ta= C) Figure Output charge vs. exposure OUTPUT CHARGE (pc) - - (Typ. Vb= V, V = V, light source: K) S9 SERIES SATURATION CHARGE SATURATION EXPOSURE S9 SERIES WAVELENGTH (nm) KMPDBEA EXPOSURE (lx s) KMPDBEA

5 NMOS linear image sensor S9/S9 series TE-cooler type (T-E P-RNO) characteristics (built-in S9-S, S9-S) Parameter Condition Value Unit Built-in resistance Ta= C. Ω Maximum current Tc -Th= C. A Maximum voltage Tc -Th= C. V Maximum heat absorption Tc -Th= C 7. W Figure 7 Voltage vs. temperature (Tc= C) Figure Heat absorption vs. temperature (Tc= C). A. A. A. A. A. A. A. A. A. A. A. A. A. A KMPDBEA KMPDBEA Figure 9 Voltage vs. temperature (Tc= C) Figure Heat absorption vs. temperature (Tc= C). A. A. A. A. A. A. A. A. A. A. A. A. A. A KMPDB7EA KMPDBEA Thermister characteristics Characteristics Parameter Condition Value Unit Resistance Ta= C kω B-constant k Operating temperature - to + ºC Resistance vs. temperature Temperature (ºC) Resistance (kω)

6 NMOS linear image sensor S9/S9 series TE-cooler type (T-E P-RNO) characteristics (built-in S9-S, S9-S) Parameter Condition Value Unit Built-in resistance Ta= C.9 Ω Maximum current Tc -Th= C. A Maximum voltage Tc -Th= C.7 V Maximum heat absorption Tc -Th= C.7 W Figure Voltage vs. temperature (Tc= C) Figure Heat absorption vs. temperature (Tc= C). A. A. A. A. A. A. A. A. A. A. A. A. A. A KMPDB9EA KMPDB7EA Figure Voltage vs. temperature (Tc= C) Figure Heat absorption vs. temperature (Tc= C). A. A. A. A. A. A. A. A. A. A. A. A. A. A KMPDB7EA KMPDB7EA Information furnished by HAMAMATSU is believed to be reliable. However, no responsibility is assumed for possible inaccuracies or omissions. Specifications are subject to change without notice. No patent rights are granted to any of the circuits described herein. Hamamatsu Photonics K.K. HAMAMATSU PHOTONICS K.K., Solid State Division - Ichino-cho, Hamamatsu City, - Japan, Telephone: () --, Fax: () --, U.S.A.: Hamamatsu Corporation: Foothill Road, P.O.Box 9, Bridgewater, N.J. 7-9, U.S.A., Telephone: () 9--9, Fax: () 9-- Germany: Hamamatsu Photonics Deutschland GmbH: Arzbergerstr., D- Herrsching am Ammersee, Germany, Telephone: (9) -7, Fax: (9) - France: Hamamatsu Photonics France S.A.R.L.:, Rue du Saule Trapu, Parc du Moulin de Massy, 9 Massy Cedex, France, Telephone: -() 9 7, Fax: -() 9 7 United Kingdom: Hamamatsu Photonics UK Limited: Howard Court, Tewin Road, Welwyn Garden City, Hertfordshire AL7 BW, United Kingdom, Telephone: () 77-9, Fax: () North Europe: Hamamatsu Photonics Norden AB: Smidesvägen, SE-7 Solna, Sweden, Telephone: () -9--, Fax: () -9-- Italy: Hamamatsu Photonics Italia S.R.L.: Strada della Moia, /E, Arese, (Milano), Italy, Telephone: (9) -9--7, Fax: (9) Cat. No. KMPDE Apr. DN