Applications. General ratings Parameter S S S

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1 IMAGE SENSOR CCD area image sensor S9736 series pixels, front-illuminated FFT-CCDs S9736 series is a family of FFT-CCD area image sensors specifically designed for low-light-level detection in scientific applications. S9736 series also features low noise and low dark current (MPP mode operation). These enable low-light-level detection and long integration time, thus achieving a wide dynamic range. Three different packages (ceramic DIP, metal, plate type) are provided. Metal package type (S9736-2) has a four-stage TE-cooled element built into the same package for thermoelectric cooling. At room temperature operation, the device can be cooled down to -7 C with using forced air cooling. In addition, since both the CCD chip and TE-cooled element are hermetically sealed, no dry air is required, thus allowing easy handling. Features l 52 (H) 52 () pixel format l Pixel size: µm l % fill factor l Wide dynamic range l Low dark current l Low readout noise l MPP operation l 3 types of packages are available Applications l Astronomy l Scientific measuring instrument l Fluorescence spectrometer l Raman spectrophotometer l Optical and spectrophotometric analyzer l For low-light-level detection requiring General ratings Parameter S9736- S S CCD structure Full frame transfer Fill factor % Number of active pixels 52 (H) 52 () Pixel size 24 (H) 24 () µm Active area (H) () mm ertical clock phase 2 phase Horizontal clock phase 2 phase Output circuit One-stage MFET source follower Cooling Non-cooled Four-stage TE-cooled Non-cooled Package 24-pin ceramic DIP 28-pin metal package Plate type Window None AR coated Sapphire None

2 Absolute maximum ratings (Ta=25 C) Parameter Symbol Min. Typ. Max. Unit Operating temperature Topr C Storage temperature Tstg C CCD cooling temperature C Output transistor drain voltage OD Reset drain voltage RD Test point (vertical input source) IS Test point (horizontal input source) ISH Test point (vertical input gate) IG, IG Test point (horizontal input gate) IGH, IG2H Summing gate voltage SG Output gate voltage OG Reset gate voltage Transfer gate voltage TG ertical shift register clock voltage P, P Horizontal shift register clock voltage PH, P2H Operating conditions (MPP mode, Ta=25 C) Parameter Symbol Min. Typ. Max. Unit Output transistor drain voltage OD Reset drain voltage RD Output gate voltage OG Substrate voltage SS - - Test point (vertical input source) IS - RD - Test point (horizontal input source) ISH - RD - Test point (vertical input gate) IG, IG2-8 - Test point (horizontal input gate) IGH, IG2H -8 - ertical shift register High PH, P2H 3 6 clock voltage Low PL, P2L Horizontal shift register High PHH, P2HH 3 6 clock voltage Low PHL, P2HL Summing gate voltage High SGH 3 6 Low SGL Reset gate voltage High H 3 6 Low L Transfer gate voltage High TGH 3 6 Low TGL Electrical characteristics (Ta=25 C) Parameter Symbol Remark Min. Typ. Max. Unit Signal output frequency fc - -. MHz ertical shift register capacitance CP, CP pf Horizontal shift register capacitance CPH, CP2H pf Summing gate capacitance CSG pf Reset gate capacitance C pf Transfer gate capacitance CTG pf Transfer efficiency CTE * DC output level out * Output impedance Zo * kω Power dissipation P * 2, * mw *: Charge transfer efficiency per pixel, measured at half of the full well capacity. *2: The values depend on the load resistance. (OD=2, Load resistance=22 kω) *3: Power dissipation of the on-chip amplifier. 2

3 Electrical and optical characteristics (Ta=25 C, unless otherwise noted) Parameter Symbol Remark Min. Typ. Max. Unit Saturation output voltage sat - - Fw Sv - Full well ertical Fw - capacity Horizontal ke - CCD node sensitivity Sv * µ/e C Dark current C DS * - 5 (MPP mode) -7 C -.. e - /pixel/s Readout noise Nr * e - rms Dynamic range (Area scanning) * Spectral response range λ to - nm Photo response non-uniformity PRNU * ± % Point defects * Blemish Cluster defects - * Column defects * - - *4: OD=2, Load resistance=22 kω *5: Dark current nearly doubles for every 5 to 7 C increase in temperature. *6: -4 C, operating frequency is 8 khz. *7: DR = Fw / Nr *8: Measured at half of the full well capacity. PRNU = noise / signal [%], noise: fixed pattern noise (peak to peak) *9: White spots > 3 % of full well at C after Ts= s, Black spots > 5 % reduction in response relative to adjacent pixels *: A group of 2 to 9 continuous point defects *: A group of or more continuous point defects Pin connections (S9736-) Pin No. Symbol Description Remark Reset gate - 2 RD Reset drain - 3 Output source - 4 OD Output transistor drain - 5 OG Output gate - 6 SG Summing gate - 7 P2H CCD horizontal register clock-2-8 NC No connection - 9 PH CCD horizontal register clock- - NC No connection - IG2H Test point (horizontal input gate-2) Shorted to ground 2 IGH Test point (horizontal input gate-) Shorted to ground 3 ISH Test point (horizontal input source) Shorted to RD 4 TG Transfer gate - 5 P2 CCD vertical register clock-2-6 NC No connection - 7 P CCD vertical register clock- - 8 NC No connection - 9 NC No connection - 2 SS Substrate (GND) - 2 NC No connection - 22 IS Test point (vertical input source) Shorted to RD 23 IG2 Test point (vertical input gate-2) Shorted to ground 24 IG Test point (vertical input gate-) Shorted to ground 3

4 Pin connections (S9736-2) Pin No. Symbol Description Remark P- TE-cooler- 2 NC 3 SS Substrate (GND) 4 NC 5 IS Test point (vertical input source) Shorted to RD 6 IG2 Test point (vertical input gate-2) Shorted to 7 IG Test point (vertical input gate-) Shorted to 8 Reset gate 9 RD Reset drain Output transistor source OD Output transistor drain 2 OG Output gate 3 SG Summing gate Same timing as P2H 4 P+ TE-cooler+ 5 TSH Temperature sensor (hot side) 6 TSC Temperature sensor (cool side) 7 TSC2 Temperature sensor (cool side) 8 P2H CCD horizontal register clock-2 9 PH CCD horizontal register clock- 2 IG2H Test point (horizontal input gate-2) Shorted to 2 IGH Test point (horizontal input gate-) Shorted to 22 ISH Test point (horizontal input source) Shorted to RD 23 P2 CCD vertical register clock-2 24 P CCD vertical register clock- 25 TG Transfer gate Same timing as P2 * 2 26 NC 27 NC 28 TSH2 Temperature sensor (hot side) Pad connections (S9736-3) Pad No. Symbol Description Remark Reset gate 2 RD Reset drain 3 Output transistor source 4 OD Output transistor grain 5 OG Output gate 6 SG Summing gate 7 NC 8 NC 9 P2H CCD horizontal register clock-2 PH CCD horizontal register clock- IG2H Test point (horizontal input gate-2) 2 IGH Test point (horizontal input gate-) 3 ISH Test point (horizontal input source) 4 P2 CCD vertical resister clock-2 5 P CCD vertical resister clock- 6 TG Transfer gate Same timing as P2* 2 7 NC 8 NC 9 NC 2 SS Substrate (GND) 2 NC 22 IS Test point (vertical input source) 23 IG2 Test point (vertical input gate-2) 24 IG Test point (vertical input gate-) *2: TG is an isolation gate between vertical register and horizontal register. In standard operation, the same pulse of P2 should be applied to the TG. 4

5 Spectral response (without window) 5 (Typ. Ta=25 C) Spectral transmittance characteristics of window material (Typ. Ta=25 C) QUANTUM EFFICIENCY (%) TRANSMITTANCE (%) AR COATED SAPPHIRE WAELENGTH (nm) WAELENGTH (nm) KMPDB244EA KMPDB6EA Dimensional outlines (unit: mm) S9736- S ±.3 PIN No. st PIN INDEX MARK PIN No ±.3 2 R ± ±.3 PHOTENSITIE SURFACE ± KMPDA4EB PINCHED OFF TUBE 5. AR-COATED SAPPHIRE WINDOW PHOTENSITIE SURFACE S ± ± ± ± FOUR-STAGE TE-COOLER ±.3 KMPDA42EB.635 ±.7 KMPDA83EA 5

6 Device structure, line output format (S9736-) IG IG2 IS SS TG P P H =52 H=52 RD 2 D D2 D3 D4 D5 D6 D7 D8 D9 D D D2... D3 D4 D5 D6 D7 D8 D9 D2 3 ISH 3 2 IGH OD OG SG 4 BLANK 4 OPTICAL BLACK 4 ISOLATION 52 SIGNAL OUT 7 9 P2H PH 4 ISOLATION 4 BLANK IG2H Pixel format Left Horizontal Direction Right Blank Optical Black Isolation Effective Isolation Optical Black Blank Top ertical Direction Bottom Isolation Effective Isolation Timing chart Area scanning (low dark current mode) KMPDC27EA INTEGRATION PERIOD (Shutter must be open) P Tpwv READOUT PERIOD (Shutter must be closed) (ISOLATION) P2, TG PH P2H, SG P2, TG PH Tovr Tpwh, Tpws ENLAED IEW P2H, SG Tpwr D D2 D3 D4 D8 D9 D2 D5..D2, S..S52, D3..D7 KMPDC28EA 6

7 * 3 Parameter Symbol Remark Min. Typ. Max. Unit P Pulse width Tpwv µs * P2, TG Rise and fall time Tprv, Tpfv ns Pulse width Tpwh ns PH, P2H Rise and fall time Tprh, Tpfh - - ns Duty ratio % Pulse width Tpws ns SG Rise and fall time Tprs, Tpfs ns Duty ratio % Pulse width Tpwr 5 - ns - Rise and fall time Tprr, Tpfr ns TG PH Overlap time Tovr µs *3: Symmetrical pulses should be overlapped at 5 % of maximum amplitude. Area scanning 2 (large full well mode) INTEGRATION PERIOD (Shutter must be open) READOUT PERIOD (Shutter must be closed) P Tpwv (ISOLATION) P2, TG PH P2H, SG P2, TG PH Tovr Tpwh, Tpws ENLAED IEW P2H, SG Tpwr D D2 D3 D4 D8 D9 D2 D5..D2, S..S52, D3..D7 KMPDC29EA * 4 Parameter Symbol Remark Min. Typ. Max. Unit P Pulse width Tpwv µs * P2, TG Rise and fall time Tprv, Tpfv ns Pulse width Tpwh ns PH, P2H Rise and fall time Tprh, Tpfh - - ns Duty ratio % Pulse width Tpws ns SG Rise and fall time Tprs, Tpfs ns Duty ratio % Pulse width Tpwr 5 - ns - Rise and fall time Tprr, Tpfr ns TG PH Overlap time Tovr µs *4: Symmetrical pulses should be overlapped at 5 % of maximum amplitude. 7

8 Specifications of built-in TE-cooler (S9736-2) Parameter Symbol Condition Min. Typ. Max. Unit Internal resistance Rint Ta=27 C Ω Maximum current * 5 Imax Th * 6 =27 C T * 7 = Tmax A Maximum voltage max Th* 6 =27 C T= Tmax I=Imax Maximum heat absorption * 8 Qmax Tc * 9 =Th * 6 =27 C I=Imax W Maximum temperature at hot side C CCD temperature - Ta=25 C C *5: If the current is greater than Imax, the heat absorption begins to decrease due to the Joule heat. It should be noted that this value is not a damage threshold. To protect the thermoelectric cooler (Peltier element) and maintain stable operation, the supply current should be less than 6 % of this maximum current. *6: Temperature at hot side of thermoelectric cooler. *7: T=Th - Tc *8: This is a theoretical heat absorption level that offsets the temperature difference in the TE-cooled element when the maximum current is supplied to the unit. *9: Temperature at cool side of thermoelectric cooler. 6 (Typ. Ta=25 C) 4 OLTAGE () I CCD TEMPERATURE - I CCD TEMPERATURE ( C) CURRENT (A) KMPDB7EA Specifications of built-in temperature sensors (S9736-2) Parameter Symbol Condition Min. Typ. Max. Unit Resistance at cool side Rc T= C - - Ω Temperature coefficient of resistance at cool side Ω/Ω Resistance at hot side Rh T= C - - Ω Temperature coefficient of resistance at hot side Ω/Ω 4 (Typ. Ta=25 C) 2 RESISTANCE (Ω) TEMPERATURE ( C) KMPDB8EA 8

9 Precaution for use (electrostatic countermeasures) Handle these sensors with bare hands or wearing cotton gloves. In addition, wear anti-static clothing or use a wrist strap, in order to prevent electrostatic damage due to electrical charges from friction. Avoid directly placing these sensors on a work-desk or work-bench that may carry an electrostatic charge. Provide ground lines or ground connection with the work-floor, work-desk and work-bench to allow static electricity to discharge. Ground the tools used to handle these sensors, such as tweezers and soldering irons. It is not always necessary to provide all the electrostatic measures stated above. Implement these measures according to the amount of damage that occurs. Element cooling/heating temperature incline rate Element cooling/heating temperature incline rate should be set at less than 5 K/min. Information furnished by HAMAMATSU is believed to be reliable. However, no responsibility is assumed for possible inaccuracies or omissions. Specifications are subject to change without notice. No patent rights are granted to any of the circuits described herein. Type numbers of products listed inthe specification sheets or supplied as samples may have a suffix "(X)" which means tentative specifications or a suffix "(Z)" which means developmental specifications. 24 Hamamatsu Photonics K.K. HAMAMATSU PHOTONICS K.K., Solid State Division 26- Ichino-cho, Higashi-ku, Hamamatsu City, Japan, Telephone: (8) , Fax: (8) , U.S.A.: Hamamatsu Corporation: 36 Foothill Road, P.O.Box 69, Bridgewater, N.J , U.S.A., Telephone: () , Fax: () Germany: Hamamatsu Photonics Deutschland GmbH: Arzbergerstr., D-822 Herrsching am Ammersee, Germany, Telephone: (49) , Fax: (49) France: Hamamatsu Photonics France S.A.R.L.: 9, Rue du Saule Trapu, Parc du Moulin de Massy, 9882 Massy Cedex, France, Telephone: 33-() , Fax: 33-() United Kingdom: Hamamatsu Photonics UK Limited: 2 Howard Court, Tewin Road, Welwyn Garden City, Hertfordshire AL7 BW, United Kingdom, Telephone: (44) , Fax: (44) North Europe: Hamamatsu Photonics Norden AB: Smidesvägen 2, SE-7 4 Solna, Sweden, Telephone: (46) , Fax: (46) Italy: Hamamatsu Photonics Italia S.R.L.: Strada della Moia, /E, 22 Arese, (Milano), Italy, Telephone: (39) , Fax: (39) Cat. No. KMPD8E4 Jan. 24 DN 9