MC33272A, MC33274A, NCV33272A, NCV33274A. Single Supply, High Slew Rate, Low Input Offset Voltage Operational Amplifiers

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1 MC33272A, MC3327A, NCV33272A, NCV3327A Single Supply, High Slew Rate, Low Input Offset Voltage Operational Amplifiers The MC33272/7 series of monolithic operational amplifiers are quality fabricated with innovative Bipolar design concepts. This dual and quad operational amplifier series incorporates Bipolar inputs along with a patented ZipRTrim element for input offset voltage reduction. The MC33272/7 series of operational amplifiers exhibits low input offset voltage and high gain bandwidth product. Dualdoublet frequency compensation is used to increase the slew rate while maintaining low input noise characteristics. Its all NPN output stage exhibits no deadband crossover distortion, large output voltage swing, and an excellent phase and gain margin. It also provides a low open loop high frequency output impedance with symmetrical source and sink AC frequency performance. Features Input Offset Voltage Trimmed to 00 V (Typ) Low Input Bias Current: 300 na Low Input Offset Current: 3.0 na High Input Resistance: 6 M Low Noise: nv/ khz High Gain Bandwidth Product: 2 00 khz High Slew Rate: 0 V/ s Power Bandwidth: 60 khz Excellent Frequency Stability Unity Gain Stable: w/capacitance Loads to 500 pf Large Output Voltage Swing:. V/.6 V Low Total Harmonic Distortion: 0.003% Power Supply Drain Current: 2.5 ma per Amplifier Single or Split Supply Operation: 3.0 V to 36 V or ±.5 V to ± V ESD Diodes Provide Added Protection to the Inputs NCV Prefix for Automotive and Other Applications Requiring Site and Control Changes PbFree Packages are Available DUAL PDIP P SUFFIX CASE 626 SOIC D SUFFIX CASE 75 x = A for MC33272AD/DR2 = N for NCV33272ADR2 QUAD MC3327ADG AWLYWW PDIP P SUFFIX CASE 66 MC33 27A ALYW SOIC D SUFFIX CASE 75A MARKING DIAGRAMS MC33272AP AWL YYWWG ALYWx MC3327AP AWLYYWWG NCV3327ADG AWLYWW TSSOP DTB SUFFIX CASE 9G NCV3 327 ALYW A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or = PbFree Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page of this data sheet. Semiconductor Components Industries, LLC, 200 Publication Order Number: MC33272A/D

2 PIN CONNECTIONS DUAL CASE 626/75 QUAD CASE 66/75A/9G Output V CC 2 7 Output 2 Inputs 3 6 Inputs 2 V EE 5 (Top View) Output Inputs V CC Inputs Output Inputs V EE Inputs 3 Output 2 7 (Top View) Output 3 MAXIMUM RATINGS Rating Symbol Value Unit Supply Voltage V CC to V EE 36 V Input Differential Voltage Range V IDR Note V Input Voltage Range V IR Note V Output Short Circuit Duration (Note 2) t SC Indefinite sec Maximum Junction Temperature T J 50 C Storage Temperature T stg 60 to 50 C ESD Protection at Any Pin Human Body Model Machine Model V esd Maximum Power Dissipation P D Note 2 mw Operating Temperature Range MC33272A, MC3327A NCV33272A, NCV3327A T A 0 to 5 0 to 25 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.. Either or both input voltages should not exceed V CC or V EE. 2. Power dissipation must be considered to ensure maximum junction temperature (T J ) is not exceeded (see Figure 2). V C 2

3 DC ELECTRICAL CHARACTERISTICS (V CC = 5 V, V EE = 5 V, T A = 25 C, unless otherwise noted.) Characteristics Figure Symbol Min Typ Max Unit 3 V IO mv Input Offset Voltage (R S = 0, V CM = 0 V, V O = 0 V) (V CC = 5 V, V EE = 5 V) T A = 0 to 5 C T A = 0 to 25 C (NCV33272A) T A = 0 to 25 C (NCV3327A) (V CC = 5.0 V, V EE = 0) Average Temperature Coefficient of Input Offset Voltage R S = 0, V CM = 0 V, V O = 0 V, T A = 0 to 25 C Input Bias Current (V CM = 0 V, V O = 0 V) Input Offset Current (V CM = 0 V, V O = 0 V) 3 V IO / T, 5 I IB I IO V/ C na na Common Mode Input Voltage Range ( V IO = 5.0 mv, V O = 0 V) 6 V ICR V EE to (V CC.) V Large Signal Voltage Gain (V O = 0 V to 0 V, ) Output Voltage Swing (V ID = ±.0 V) (V CC = 5 V, V EE = 5 V) R L = 0 k R L = 0 k (V CC = 5.0 V, V EE = 0 V) 7 A VOL 90 6, 9, 2 0, V O V O V O V O V OL V OH Common Mode Rejection (V in = 3.2 V to 5 V) 3 CMR 0 00 db Power Supply Rejection V CC /V EE = 5 V/ 5 V, 5.0 V/ 5 V, 5 V/ 5.0 V Output Short Circuit Current (V ID =.0 V, Output to Ground) Source Sink, 5 PSR SC db V db ma Power Supply Current Per Amplifier (V O = 0 V) (V CC = 5 V, V EE = 5 V) (V CC = 5.0 V, V EE = 0 V) 7 I CC ma 3. MC33272A, MC3327A T low = 0 C T high = 5 C NCV33272A, NCV3327A T low = 0 C T high = 25 C 3

4 AC ELECTRICAL CHARACTERISTICS (V CC = 5 V, V EE = 5 V, T A = 25 C, unless otherwise noted.) Characteristics Figure Symbol Min Typ Max Unit Slew Rate (V in = 0 V to 0 V,, C L = 00 pf, A V =.0 V), 33 SR.0 0 Gain Bandwidth Product (f = 00 khz) 9 GBW 7 2 MHz AC Voltage Gain (, V O = 0 V, f = 20 khz) 20, 2, 22 A VO 65 db Unity Gain Bandwidth (Open Loop) BW 5.5 MHz Gain Margin (, C L = 0 pf) 23, 2, 26 A m 2 db Phase Margin (, C L = 0 pf) 23, 25, 26 m 55 Deg Channel Separation (f = 20 Hz to 20 khz) 27 CS 20 db Power Bandwidth (V O = 20 V pp,, THD.0%) BW P 60 khz V/ s Total Harmonic Distortion (, f = 20 Hz to 20 khz, V O = 3.0 V rms, A V =.0) 2 THD % Open Loop Output Impedance (V O = 0 V, f = 6.0 MHz) 29 Z O 35 Differential Input Resistance (V CM = 0 V) R in 6 M Differential Input Capacitance (V CM = 0 V) C in 3.0 pf Equivalent Input Noise Voltage (R S = 00, f =.0 khz) 30 e n nv/ Hz Equivalent Input Noise Current (f =.0 khz) 3 i n 0.5 pa/ Hz V CC V in Vin Sections B C D V O V EE Figure. Equivalent Circuit Schematic (Each Amplifier)

5 ORDERING INFORMATION MC33272AD MC33272ADG Device Package Shipping SOIC SOIC (PbFree) 9 Units / Rail MC33272ADR2 MC33272ADR2G MC33272AP MC33272APG NCV33272ADR2* NCV33272ADR2G* MC3327AD MC3327ADG MC3327ADR2 MC3327ADR2G MC3327ADTBR2G MC3327AP MC3327APG NCV3327AD* NCV3327ADG* SOIC SOIC (PbFree) PDIP PDIP (PbFree) SOIC SOIC (PbFree) SOIC SOIC (PbFree) SOIC SOIC (PbFree) TSSOP (PbFree) PDIP PDIP (PbFree) SOIC SOIC (PbFree) 50 Units / Rail 55 Units / Rail 25 Units / Rail 55 Units / Rail NCV3327ADR2* NCV3327ADR2G* NCV3327ADTBR2G* SOIC SOIC (PbFree) TSSOP (PbFree) For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD0/D. *NCV prefix for automotive and other applications requiring site and control changes.

6 PACKAGE DIMENSIONS SOIC CASE 75A03 ISSUE H T SEATING PLANE A G 7 B P 7 PL 0.25 (0.00) M B M NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.. MAXIMUM MOLD PROTRUSION 0.5 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.27 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS INCHES C R X 5 F DIM MIN MAX MIN MAX A B C D D PL K M J F G.27 BSC BSC 0.25 (0.00) M T B S A S J K M P R SOLDERING FOOTPRINT* X 0.5 7X 7.0 X PITCH DIMENSIONS: MILLIMETERS *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 5