AZV358. Pin Assignments. Description DATA SHEET. Applications. Features. Functional Block Diagram. A Product Line of. Diodes Incorporated

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1 DUAL LOW VOLTAGE RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS Description Pin Assignments The is dual low voltage (2.7V to 5.5V) operational amplifiers which have rail-to-rail output swing capability. The input commonmode voltage range includes ground. The chip exhibits excellent speed-power ratio, achieving 1MHz of bandwidth and 1V/µs of slew rate with low supply current. M/G/MM Package (SOIC-8/TSSOP-8/MSOP-8) The is built with BiCMOS process. It has bipolar input and output stages for improved noise performance, low input offset voltage and higher output current drive. is available in the package of TSSOP-8 and MSOP-8. The small packages save space on pc boards, and enable the design of small portable electronic devices. It also allows the designer to place the device closer to the signal source to reduce noise pickup and increase signal integrity. is also available in standard SOIC-8 package. OUTPUT 1 IN 1- IN OUTPUT 2 IN 2- IN 2+ Features Applications (For =5V and =V, typical unless otherwise noted) Guaranteed 2.7V to 5.5V Performance No Crossover Distortion Gain-Bandwidth Product 1MHz Industrial Temperature Range: - C to +85 C Low Supply Current: 2µA Rail-to-Rail Output Swing under kω Load: H up to -mv L near to +65mV V CM : -.1V to -.8V Active Filters Low Power, Low Voltage Applications General Purpose Portable Devices Cellular Phone, Cordless Phone Battery-Powered Systems Functional Block Diagram 8 V BIAS1 IN- 2,6 V BIAS2 1,7 OUTPUT IN+ 3,5 V BIAS3 4 1 of 15

2 Absolute Maximum Ratings A =25 C, unless otherwise specified. Note 1) Note 1: Symbol Parameter Rating Unit Power Supply Voltage 6 V T J Operation Junction Temperature 15 C T STG Storage Temperature Range -65 to 15 C T LEAD Lead Temperature (Soldering, seconds) 2 C ESD (Machine Model) V ESD (Human Body Model) V Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to Absolute Maximum Ratings for extended periods may affect device reliability. Recommended Operating Conditions Symbol Parameter Min Max Unit Supply Voltage V T A Ambient Operating Temperature Range - 85 C 2.7V Electrical Characteristics (@T A =25 C, bold typeface applies over T A =- C to 85 C, =2.7V, =V, V CM =1.V, = /2 and >1MΩ, unless otherwise specified. Note 2) Symbol Parameter Conditions Min Typ Max Unit V IO Input Offset Voltage mv I B Input Bias Current na 5 5 I IO Input Offset Current na 15 V CM Input Common Mode Voltage Range for CMRR 5dB V I CC Supply Current = /2, A VCL =1, No 1 3 load 4 μa CMRR Common Mode Rejection Ratio V CM 1.7V 5 63 db PSRR Power Supply Rejection Ratio 2.7V 5V, =1V 5 db I SOURCE =V 5 ma Output Short Circuit Current I SINK =2.7V 3 ma H V Output Voltage Swing =kω to 1.35V L 18 mv GBWP Gain Bandwidth Product =pf 1 MHz ɸ M Phase Margin deg G M Gain Margin db Note 2: Limits over the full temperature are guaranteed by design, but not tested in production. 2 of 15

3 5V Electrical Characteristics A =25 C, bold typeface applies over T A =- o C to 85 o C, =5V, =V, V CM =2.V, = /2 and >1MΩ, unless otherwise specified. Note 2) Symbol Parameter Conditions Min Typ Max Unit V IO Input Offset Voltage mv I B I IO V CM I CC Input Bias Current Input Offset Current Input Common Mode Voltage Range Supply Current na na for CMRR 5dB V = /2, A VCL =1, No 2 4 load 615 μa 84 G V Large Signal Voltage Gain =2kΩ db 8 CMRR Common Mode Rejection Ratio V CM 4V 5 63 db PSRR Power Supply Rejection Ratio 2.7V 5V, =1V, V CM =1V 5 db I SOURCE =V 5 ma Output Short Circuit Current I SINK =5V 1 ma H L Output Voltage Swing =2kΩ to 2.5V =kω to 2.5V =2kΩ to 2.5V =kω to 2.5V SR Slew Rate 1 V/μs GBWP Gain Bandwidth Product =pf 1 MHz ɸ M Phase Margin deg G M Gain Margin db V mv Note 2: Limits over the full temperature are guaranteed by design, but not tested in production. 3 of 15

4 Performance Characteristics Supply Current vs. Supply Voltage Supply Current vs. Temperature 3 25 = /2 No Load = /2 No Load Supply Current ( A) 15 T A = - o C T A =25 o C T 5 A =85 o C Supply Voltage (V) Supply Current ( A) =5V =2.7V Temperature ( O C) Slew Rate vs. Supply Voltage Output Short Circuit Current vs. Supply Voltage Slew Rate (V/ S) Falling Edge Rising Edge A V =1 V IN =1Vp-p =K to 1/ Supply Voltage (V) Output Short Circuit Current_I SOURCE (ma) 5 3 =V short to Supply Voltage (V) Output Short Circuit Current vs. Supply Voltage Output Short Circuit Current vs. Temperature Output Short Circuit Current_I SINK (ma) =V short to Supply Voltage (V) Output Short Circuit Current _ I Source (ma) =5V =V to =2.7V Temperature ( O C) 4 of 15

5 Performance Characteristics (Cont.) Output Short Circuit Current vs. Temperature Output Voltage vs. Output Source Current Output Short Circuit Current_I SINK (ma) =V to =5V =2.7V Temperature ( O C) - Output Voltage Referenced to (V) =5V, = 1E Source Current (ma) Output Voltage vs. Output Source Current Output Voltage vs. Output Sink Current -Output Voltage Reference to (V) =2.7V =V E Source Current (ma) Output Voltage (V) 1 =5V = Sink Current (ma) Output Voltage vs. Output Sink Current Output Voltage Swing vs. Supply Voltage Output Voltage (V) 1.1 =2.7V =V Output Voltage Swing (mv) Negative Swing_L Positive Swing_ -H =K to /2 1 Sink Current (ma) Supply Voltage (V) 5 of 15

6 Performance Characteristics (Cont.) Output Voltage Swing vs. Temperature Gain and Phase vs. Frequency and Resistive Load Output Voltage Swing (mv) =K to /2 Negative Swing_L =5V =2.7V Positive Swing_ -H =5V =2.7V Temperature ( O C) Open Loop Gain (db) =6 =2K =K Phase Margin =6 =2K =K Gain =2.5V, =-2.5V = k k 1M Frequency (Hz) 8 - Phase Margin (Degree) Gain and Phase vs. Frequency and Capacitive Load Gain and Phase vs. Frequency and Capacitive Load Open Loop Gain (db) =pf =pf =47pF =pf =2.5V, =-2.5V =6 =pf =pf =47pF =pf Phase Margin Gain Phase Margin (Degree) Open Loop Gain (db) =pf =pf =pf Phase Margin =pf =pf =pf Gain =2.5V =-2.5V =K Phase Margin (Degree) -3 k k 1M Frequency (Hz) - - k k 1M Frequency (Hz) - THD+N vs. Frequency Non-Inverting Input Small Signal Pulse Response 1 =2.5V, =-2.5V =K A V =1 V IN =5V, =V =2KΩ V IN =mvp-p Unity Gain THD+N (%).1 =1Vp-p UT.1 =2.5Vp-p 1E-3 1k k k Frequency (Hz) 6 of 15

7 Performance Characteristics (Cont.) Non-Inverting Input Large Signal Pulse Response Non-Inverting Input Small Signal Response V IN =5V, =V =2KΩ V IN =1Vp-p Unity Gain V IN =2.5V =-2.5V =5pF =2KΩ V IN =mvp-p Unity Gain UT UT Non-Inverting Input Small Signal Response V IN =2.5V =-2.5V =pf =2KΩ V IN =mvp-p Unity Gain UT 7 of 15

8 Ordering Information - Package Temperature Range SOIC-8 - to 85 C Circuit Type Package M: SOIC-8 G: TSSOP-8 MM: MSOP-8 Part Number E1: Lead Free G1: Green Blank: Tube TR: Tape & Reel Marking ID Lead Free Green Lead Free Green Packing Type M-E1 M-G1 M-E1 M-G1 Tube MTR-E1 MTR-G1 M-E1 M-G1 Tape & Reel TSSOP-8 - to 85 C MSOP-8 - to 85 C G-E1 G-G1 EG3E GG3E Tube GTR-E1 GTR-G1 EG3E GG3E Tape & Reel MM-E1 MM-G1 MM-E1 MM-G1 Tube MMTR-E1 MMTR-G1 MM-E1 MM-G1 Tape & Reel BCD Semiconductor's Pb-free products, as designated with "E1" suffix in the part number, are RoHS compliant. Products with G1 suffix are available in green packages. 8 of 15

9 Package Outline Dimensions (All dimensions in mm(inch).) SOIC-8 1.(.39) Option (.185) 5.(.1) 1.27(. 5).(.4).3(.12) R.15(.6) 3.8(.15) 4.(.157) 1.35(.53) 1.75(.69).675(. 27).725(. 29) D 8 D :1.3(.13) 5.8(. 228) 6.(. 244) 8 8 Option 1.3(.12).5(.).15(.6).25(.).9(.35) (.17).8(.31) R.15(.6) Option 2.35(.14) Note: Eject hole, oriented hole and mold mark is optional. 9 of 15

10 Package Outline Dimensions (Cont.) (All dimensions in mm(inch).) TSSOP-8.5(.2).15(.6).8(.31) 1.5(.41) 2.9(.114) 3.(.122) 1.(.47) MAX.9(.4).(.8) SEE DETAIL A 12 TOP & BOTTOM R.9(.4) 4.3(.169) 4.5(.177) 6.(.252) R.9(.4) GAGE PLANE 8.(.16) SEATING PLANE.45(.18).75(.3).65(.26) 1.95(.77).19(.7).3(.12).25(.) DETAIL A 1.(.39) REF Note: Eject hole, oriented hole and mold mark is optional. of 15

11 Package Outline Dimensions (Cont.) (All dimensions in mm(inch).) MSOP-8.3(.12).65(.26).15(.6) 4.7(.185) 5.(.1).(.16).8(.31) 2.9(.114) 3.(.122) 8.75(.3).97(.38) 2.9(.114) 3.(.122).(.).(.8).8(.31) 1.(.47) ` Note: Eject hole, oriented hole and mold mark is optional. 11 of 15

12 Suggested Pad Layout SOIC-8 Grid placement courtyard G Z Y E X Z G X Y E Dimensions (mm)/(inch) (mm)/(inch) (mm)/(inch) (mm)/(inch) (mm)/(inch) Value 6.9/ / / / /.5 12 of 15

13 Suggested Pad Layout (Cont.) TSSOP-8 G Z Y E E1 X Dimensions Z (mm)/(inch) G (mm)/(inch) X (mm)/(inch) Y (mm)/(inch) E (mm)/(inch) E1 (mm)/(inch) Value 7.7/ /.164.4/ /.7.65/ / of 15

14 Suggested Pad Layout (Cont.) MSOP-8 E X G Z Y Z G X Y E Dimensions (mm)/(inch) (mm)/(inch) (mm)/(inch) (mm)/(inch) (mm)/(inch) Value 5.5/ /.1.45/ /.53.65/ of 15

15 IMPORTANT NOTICE DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to this document and any product described herein. does not assume any liability arising out of the application or use of this document or any product described herein; neither does convey any license under its patent or trademark rights, nor the rights of others. Any Customer or user of this document or products described herein in such applications shall assume all risks of such use and will agree to hold and all the companies whose products are represented on website, harmless against all damages. does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel. Should Customers purchase or use products for any unintended or unauthorized application, Customers shall indemnify and hold and its representatives harmless against all claims, damages, expenses, and attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized application. Products described herein may be covered by one or more United States, international or foreign patents pending. Product names and markings noted herein may also be covered by one or more United States, international or foreign trademarks. This document is written in English but may be translated into multiple languages for reference. Only the English version of this document is the final and determinative format released by. LIFE SUPPORT products are specifically not authorized for use as critical components in life support devices or systems without the express written approval of the Chief Executive Officer of. As used herein: A. Life support devices or systems are devices or systems which: 1. are intended to implant into the body, or 2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in significant injury to the user. B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or to affect its safety or effectiveness. Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related information or support that may be provided by. Further, Customers must fully indemnify and its representatives against any damages arising out of the use of products in such safety-critical, life support devices or systems. Copyright 13, 15 of 15