Packaged mm-wave GaN, GaAs and Si ICs for 5G and automotive radar
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1 Packaged mm-wave GaN, GaAs and Si ICs for 5G and automotive radar Eric Leclerc UMS 1 st Nov 2018
2 Outline Why heterogenous integration? About UMS Technology portfolio Design tooling: Cadence / GoldenGate / ADS / ETH Examples : 24GHz radar sensor 1Tx-2Rx with SiGe and GaAs 24GHz radar sensor 1Tx-4Rx 2W Integrated Front End for 5G with GaN and GaAs Core chip with SP interface S band 50W Q-MMIC in DFN Test and evaluation Questions? 2
3 Why heterogeneous integration? Many years ago «Monolithic Integration» was considered in RF and mm-wave industry as a must, an end in itself but a question remains open: what is the right unique capable process? : Performance Yield for very large MMIC, handling and with no cross-talk Considering now these features: Optimization=> selection of the best technologies for each function. Risk lower. Good level of isolation Well managed, controlled and reproducible integration. Flexibility & cost. Testing, screening of each part, easier job. Quality of 3D simulations (bond wires) Heterogeneous integration Devices. MMIC. Q-MMIC Modules System 3
4 UMS at a glance Source of RF MMIC solutions: COTS, ASIC & foundry services Long heritage of supplying to most demanding applications including for our mother companies: Airbus and Thales. Industrial facilities and 400 people in: Ulm (Germany): GaAs & GaN technology development and production Villebon (France): product development, back-end production, support UMS GmbH UMS SAS Sales evolution (in M ) 4 Sales split by market (2017)
5 Technology Portfolio UMS silicon process IC supply chain includes several WW & European foundries: Access to various processes: SiGe BiCMOS 150GHz to 320GHz Ft CMOS / RF CMOS from 250 to 40nm Use of our internal UMS III-V qualified processes: 5
6 Design Tools with external and internal PDKs UMS simulation tools / CADENCE environment UMS uses CADENCE development flow tools for mixed signal design Simulation of analogue transistor level (spectre model) and behavioral (Verilog / VHDL) models in the same CADENCE bench. This global system simulation capability allows accurate noise, power, spectrums and settling time simulations. Keysight Goldengate simulation and Momentum EM tools integrated in Cadence environment. Virtuoso AMS Designer (Eval mixed simu) SPICE Cadence Schematic/VHDL to layout «Virtuoso Digital Implementation» (eval) Layout interconnect parasitics extraction. (EM sim) Layout design rules check. (ASSURA, PVS) Layout versus schematic check. For III-V technologies we use ADS from Keysight Auto-Layout with p-cells. DRC, E/M available. 6
7 Package input transition I N T E G R AT E D 3 D E M ADS can easily simulate cavity, bond wires, and dielectric bricks: Bond wire interconnect between two substrates Chip to board, board to package transitions Spiral inductor w/ an air cavity And more Improved design productivity using assembly and package capabilities from ADS workflow (ease matching network optimization, consider manufacturing constraint, reduce design cycle development)
8 Example 1: Low cost 24GHz Transceiver TRx 24GHz / Automotive Radar sensor / High volume Frequency Band: GHz 13dBm Max Tx Power 12dB Tx Power control range 37dB Rx gain with 24dB Rx gain control range 11dB Rx SSB IF 100kHz, max RF gain -16dBm IP1dB RF min RF VGA gain Power & T C sensors Build in test for safety Temperature range from -40 C to +125 C DC bias: 3.3V / stage 8-0 ESD protected, RoHS compliant High performance small leadless plastic package Mixed Design included: Asynchronous logic (Low current) Decoders (up to 4:16) Multiplexer Divider 24GHz /16384 /16 D/A converter 4 bits (SPI sync) Registers Serial Peripheral Interface SPI (24 bits) 4 wires GaAs 8 BiCMOS
9 Example 2: Low cost 24GHz Transceiver Multi-die TRx 24GHz / Automotive Radar sensor Architecture flexibility 2 to 4 Rx Multi-technologies (GaAs HBT and passive, BiCMOS) for optimum cost / performance / time to market Low cost single package Same dies & 2 different products 9
10 2.50mm Ex 3: 5G High-Power Front-End 2W Highly Integrated Front-End 24-31GHz Low consumption Plastic package GaAs LNA 1.55mm QFN Lead HPA DC supply AB H PA GaN die 1.55mm QFN Lead Driver DC supply Self-biased Driver PA GaAs die Application QFN Lead IN RF TX High-throughput Fixed Access Wireless TDD Communication Systems Phased array antenna SPD T Sw itch Self-biased LNA TX/RX Antenna Vol tage Inverter Interface QFN Lead OUT RF RX UMS CHC6053 V Ctrl,SW V Ref,SW V G,Ctrl,LNA QFN Lead DC supply High linearity HPA RF bandwidth: 24-31GHz Tx Gain > 30dB Tx Pout > 33dBm Rx Gain > 18dB Rx Noise Figure < 3.5dB Rx P1dB: -7dBm Low consumption < 7W 28 leads QFN 4x5mm Presented in workshop session at EuMW 2018 WS/SC WS-03: Broadband and Packaged 5G High Power Front-End for 28GHz Solutions 10
11 Output Power (dbm) PDC (W) & PAE (%) Gain (db) Noise Figure & Gain (db) Ex 3: 5G High-Power Front-End 2W Integrated Front-End 24-31GHz TX Gain Frequency (GHz) RX Frequency (GHz) Gain NF Pout PAE PDC 26 GHz Input power (dbm) 11
12 Ex 4: Core ship with serial to parallel interface SPI + Core chip mainly for defense products Demonstrator of Control Functions + SPI 8 bits cascadable serial to parallel interface Validated 100MHz rate, -40 C to +85 C L Band Phase Shifter S Band Phase Shifter S Band Core Chip SPI can be chained to control Core chip (16 bits) 12
13 Ex 5: S-band 50W HPA Multi technology Q-MMIC: GaAs, GaN, laminate R&D exercise with Keysight on ETH thermal stack definition, using UMS electro-thermal GaN model High Power Amplifier S-band Power > 50W Efficiency : 50% Plastic package DFN 8x8mm² Splitter / combiner ICs Power Transistor Model Full ETH simulation with self-heating turned off in the electrical model Temperature profile with ETH Dissipated Power 4W 25W 10W
14 Test & evaluation board UMS develops product evaluation boards for: Customer evaluation of performances Customer support for product integration in their system Characterization purpose 14
15 Test & evaluation board UMS provides full characterization service RF from DC to 100GHz / digital control capability (SPI) Faraday specific box Automated test / test software definition Temperature -55 C to +125 C 15
16 Test fixtures development UMS develops production test set-up Test Fixture Design with socket PCB Definition (8x layers) PCB Layout PCB manufacturing & validation UMS develops production test set-up with customers Test Socket Co-Design & Optimization up to 44 GHz PCB Manufacturing sub-contracted Test sequence co-definition 16
17 Test in package Medium volumes UMS develops low to mid volume production test set-up Telecom product example: Transceiver Test Plan Definition Conversion Gain (baseband I/Q to RF) LO Leakage & SSB DC consumption Detectors & remaining I/Os SPI management Noise (by sampling) Semi-automatic handling tests Volume < 250k/year
18 Test in package High volumes UMS develops mass production test set-up Test PCB s & sockets integration Test software & sequence (100% functional RF test) Test handler mechanic s design & optimization CHC2442 QFN Test Multi-chip / multi techno / multifunction
19 Reliability test for Qualification UMS also proposes reliability tests & full product qualification service >15 years back-ground in product qualification >20M automotive AEC-Q100 qualified products sold per year RFIC KGD Environmental tests Ageing tests ESD/LU Pre-conditioning HBM/MM CDM LU 3 Assembly on reliability boards Assembly on reliability boards Storage 1x32 Pre-conditioning 1x64 Pre-conditioning 1x64 Thermal cycling HTOL 1x30 THB 1x30 Thermal cycling 1x32 Autoclave 1x32 Reliability assessment Qualification plan 19
20 THANK you for your attention Questions?
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