Exercise 3: EXERCISE OBJECTIVE

Transcription

1 Exercise 3: EXERCISE OBJECTIVE voltage equal to double the peak ac input voltage by using a voltage doubler circuit. You will verify your results with a multimeter and an oscilloscope. DISCUSSION times the peak ac input voltage minus the diode drop. The capacitors (C1 and C2) are in series. The voltage across two capacitors connected in series is the sum of the voltage across each capacitor. The addition of capacitor voltages produces the voltage doubling effect of the circuit. Festo Didactic P0 105

2 The 100 k resistors (R1 and R2) across the capacitors are equalizing resistors that evenly divide the capacitor voltages within the circuit. If two capacitors are connected in series and each capacitor is charged to 10 Vdc, the voltage across the two capacitors is a. 10 Vdc. b. 20 Vdc. A full-wave voltage doubler uses both alternations of the ac input voltage. One diode and one capacitor of the voltage doubler are paired for each half-cycle of the ac input. Only one diode conducts and charges its paired capacitor at a time. 106 Festo Didactic P0

3 Refer to the voltage doubler shown. When diode a. CR1 conducts, capacitor C1 is charged. b. CR2 conducts, capacitor C2 is charged. c. Both of the above The charge path for the positive input alternation is shown in the upper half of the voltage doubler circuit. The positive alternation of the input voltage forward biases diode CR1, and C1 is charged to V C1 = V pk V F. V F is the diode forward voltage drop of about 0.6 Vdc. It can be neglected if V pk is high. During this positive half-cycle, diode CR2 (not shown) is reverse biased and capacitor C2 is not charging. The charge path for the negative input alternation is shown in the bottom half of the voltage doubler circuit. The negative alternation of the input voltage forward biases diode CR2, and C2 is charged to V CR2 = V pk V F. V F is the diode forward voltage drop of about 0.6 Vdc. It can be neglected if V pk is high. Festo Didactic P0 107

4 During this negative half-cycle, CR1 (not shown) is reverse biased and capacitor C1 is not charging. Suppose the input peak voltage (V pk ) is 15 V pk. During the negative alternation of the ac input, C2 is charged (V C2 ) to about a Vdc. b Vdc. Because the discharge time constant of each capacitor is long with a 100 k equalizing resistor, each capacitor maintains a charge close to its maximum charged voltage between charging cycles. The resulting V o of the circuit is shown. Because both capacitors are in series, V o equals the sum of the voltages across each capacitor, or about 2 x V pk. 108 Festo Didactic P0

5 C1 is charged to 14.4 Vdc during the positive ac input alternation, and C2 is charged to 14.4 Vdc during the negative ac input alternation. Calculate the maximum dc output voltage (V o ) across C1 and C2. V o = Vdc (Recall Value 1) R L takes some energy away from each capacitor during the time the capacitor is not being charged and causes a ripple. However, the discharge time constant is small when the load resistor (R L ) has a relatively high value. Because one capacitor is always being charged during each half-cycle of the ac input, the output ripple frequency of a full-wave voltage doubler is two times the ac input frequency. If the ac input frequency is 50 Hz, the output ripple frequency of a full-wave voltage doubler is a. 100 Hz. b. 50 Hz. Festo Didactic P0 109

6 Because the input to the voltage doubler on the SEMICONDUCTOR DEVICES circuit board used in the following procedure is not a regulated power supply, the input peak voltage is reduced during the charging period of the doubler. The voltage reduction results from the high current demand during the charging period of the doubler, causing about a 2 Vdc voltage drop in the transformer (T1) secondary coil (which is used as the ac input). This T1 secondary coil voltage drop during charging causes the peaks of the ac input signal to be PROCEDURE Locate the FULL-WAVE RECTIFICATION WITH POWER SUPPLY FILTERS and VOLTAGE DOUBLER circuit blocks. Connect the circuit shown. In this procedure, points A and B of the T1 secondary are used to power the VOLTAGE DOUBLER circuit block at points A and B. 110 Festo Didactic P0

7 Connect the channel 1 probe of the oscilloscope to the top of the T1 primary. Connect the ground clip to the bottom of the T1 primary. Adjust the external sine wave generator for a frequency of 60 Hz (or to the frequency supplied by your local power company). Set the generator for a 20 V pk-pk signal at the T1 primary. Connect the channel 2 probe to point A of the VOLTAGE DOUBLER circuit block input, and connect the ground clip to point B. Observe the input signal to the voltage doubler. Festo Didactic P0 111

8 because a. of the voltage drop in the T1 secondary coil during the period when each diode conducts a relatively high current. b. the C1 charged voltage is added to the C2 charged voltage. On channel 2 of the oscilloscope, measure the peak input voltage to the voltage doubler. Input V pk = V (Recall Value 1) What value would you calculate for the doubler dc output voltage (across R1 and R2) based on your measured peak input voltage of V (Step 6, Recall Value 1 [neglect the diode voltage drops])? Calculated V O = Vdc (Recall Value 2) With the multimeter, measure the dc output voltage from the doubler (across R1 and R2). Measured V O = Vdc (Recall Value 3) 112 Festo Didactic P0

9 Do your calculated Vdc (Step 7, Recall Value 2) and measured Vdc (Step 8, Recall Value 3) output voltage values agree, considering that the diode voltage drops are accounted for in the measured value? a. yes b. no With the multimeter, measure the dc voltage charge across C2 (V C2 ). V C2 = Vdc (Recall Value 4) Festo Didactic P0 113

10 With the multimeter, measure the dc voltage charge across C1 (V C1 ). V C1 = Vdc (Recall Value 5) Does the sum of V C1 ( Vdc [Step 11, Recall Value 5]) and V C2 ( Vdc [Step 10, Recall Value 4]) equal the measured output voltage ( Vdc [Step 8, Recall Value 3]) within measurement tolerances? a. yes b. no Connect the channel 2 probe to the output terminal at the top of C1. Connect the ground clip to the bottom of C2. Adjust the oscilloscope to ac, and measure the ripple peak-to-peak voltage of the dc output. Ripple = mv pk-pk (Recall Value 6) 114 Festo Didactic P0

11 On channel 2 of the oscilloscope, measure the frequency of the ripple. The ripple frequency equals a. the frequency of the ac input signal on channel 1. b. two times the frequency of the ac input signal on channel 1. Place CM switch 18 in the ON position to add a 39 k load resistor across the output in parallel with R1 and R2. You can turn CM 18 off and on using the toggle switch. Observe the output signal on oscilloscope channel 2. With a 39 k load, the dc output ripple peak-topeak voltage a. increased. b. decreased. On channel 2 of the oscilloscope, measure the dc output ripple peak-to-peak voltage with a 39 k load (Be sure CM switch 18 is in the on position.). Ripple = mv pk-pk (Recall Value 7) With a multimeter, measure the dc output voltage from the voltage doubler with a 39 k load (Be sure CM switch 18 is in the on position.). V O = Vdc (Recall Value 8) Make sure all CMs are cleared (turned off) before proceeding to the next section. CONCLUSION times the peak ac input voltage. One diode conducts and charges its paired capacitor during each half-cycle of the ac input. Because both capacitors are in series across the output, the dc output equals the sum of the capacitor voltages. Because one capacitor is charged during each half-cycle of the ac input, the output ripple frequency of a full-wave voltage doubler is two times the ac input frequency. Festo Didactic P0 115

12 REVIEW QUESTIONS 1. Locate the VOLTAGE DOUBLER circuit block on the SEMICONDUCTOR DEVICES circuit board. Connect the circuit shown. Adjust the generator for a 60 Hz, 20 V pk-pk signal at the T1 primary. On the oscilloscope, observe the dc voltage at the doubler output. Place CM switch 17 in the ON position. You can turn CM 17 off and on using the toggle switch. Observe the output voltage change. The most likely cause of the output voltage decreasing with CM 17 on is that CM 17 caused a. open circuits in both diode circuits. b. an increase in the capacitance of the two capacitors. c. an open circuit between the input and one diode circuit. d. an increase in the load resistance. 2. The output of a voltage doubler is about two times the a. peak-to-peak voltage of the ac input. b. peak ac input voltage. c. voltage drop across both diodes. d. voltage drop across the load resistor. 3. A resistor with a high value (100 k a. equalize the capacitor voltage drops. b. increase the capacitor voltage change. c. increase the load resistance. d. decrease the diode current. 116 Festo Didactic P0

13 4. a. for 90º of each ac input cycle. b. during alternate cycles of the input voltage. c. during the same half-cycle of the input voltage. d. during alternate half-cycles of the input voltage. 5. The output ripple frequency of a full-wave voltage doubler a. is two times the input frequency. b. is half of the input frequency. c. equals the input frequency. d. depends on the capacitor values and load resistance. NOTE: Make sure all CMs are cleared (turned off) before proceeding to the next section. Festo Didactic P0 117