FEATURES TO-220 FULLPAK TO-247AC. S N-Channel MOSFET. Top View

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1 TN5N8SJ/TP5N8SJ/TP5N8FSJ N-Channel 8V (-S) Super Junction Power MOSFET PROUCT SUMMRY (V) at T J max. 8 R S(on) max. at 25 C (Ω) V GS = V.38 Q g max. (nc) 96 Q gs (nc) Q gd (nc) 2 Configuration Single FETURES Low figure-of-merit (FOM) R on x Q g Low input capacitance (C iss ) Reduced switching and conduction losses Ultra low gate charge (Q g ) valanche energy rated (UIS) PPLICTIONS Server and telecom power supplies Switch mode power supplies (SMPS) Power factor correction power supplies (PFC) Lighting - High-intensity discharge (HI) - Fluorescent ballast lighting vailable vailable vailable T O-22B TO-22 FULLPK TO-27C G G S Top View G S Top View Top View S G S N-Channel MOSFET BSOLUTE MXIMUM RTINGS (T C = 25 C, unless otherwise noted) PRMETER SYMBOL LIMIT UNIT rain-source Voltage 8 Gate-Source Voltage V GS ± 3 V Continuous rain Current (T J = 5 C) V GS at V T C = 25 C 5 I T C = C 2 Pulsed rain Current a I M 6 Linear erating Factor.7 W/ C Single Pulse valanche Energy b E S 297 mj Maximum Power issipation P 28 W Operating Junction and Storage Temperature Range T J, T stg -55 to 5 C rain-source Voltage Slope T J = 25 C 37 dv/dt Reverse iode dv/dt d 26 V/ns Soldering Recommendations (Peak Temperature) c for s 3 C Notes a. Repetitive rating; pulse width limited by maximum junction temperature. b. V = 5 V, starting T J = 25 C, L = 28.2 mh, R g = 25 Ω, I S =.5. c..6 mm from case. d. I S I, di/dt = /μs, starting T J = 25 C.

2 THERML RESISTNCE RTINGS TN5N8SJ/TP5N8SJ/TP5N8FSJ PRMETER SYMBOL TYP. MX. UNIT Maximum Junction-to-mbient R thj - 62 C/W Maximum Junction-to-Case (rain) R thjc -.7 SPECIFICTIONS (T J = 25 C, unless otherwise noted) PRMETER SYMBOL TEST CONITIONS MIN. TYP. MX. UNIT Static rain-source Breakdown Voltage V GS = V, I = 25 μ V Temperature Coefficient Δ /T J Reference to 25 C, I = m V/ C Gate-Source Threshold Voltage (N) V GS(th) = V GS, I = 25 μ 2 - V V GS = ± 2 V - - ± n Gate-Source Leakage I GSS V GS = ± 3 V - - ± μ = 8 V, V GS = V - - Zero Gate Voltage rain Current I SS μ = 52 V, V GS = V, T J = 25 C - - rain-source On-State Resistance R S(on) V GS = V I = Ω Forward Transconductance g fs = 3 V, I = S ynamic Input Capacitance C iss VGS = V, Output Capacitance C oss = V, Reverse Transfer Capacitance C rss f = MHz - - Effective Output Capacitance, Energy pf Related a C o(er) = V to 52 V, V GS = V Effective Output Capacitance, Time Related b C o(tr) Total Gate Charge Q g Gate-Source Charge Q gs V GS = V I = 8, = 52 V - - nc Gate-rain Charge Q gd Turn-On elay Time t d(on) Rise Time t r V = 52 V, I = 8, Turn-Off elay Time t d(off) V GS = V, R g = 9. Ω ns Fall Time t f Gate Input Resistance R g f = MHz, open drain Ω rain-source Body iode Characteristics MOSFET symbol Continuous Source-rain iode Current I S showing the integral reverse G Pulsed iode Forward Current I SM S p - n junction diode iode Forward Voltage V S T J = 25 C, I S = 8, V GS = V V Reverse Recovery Time t rr ns Reverse Recovery Charge Q rr T J = 25 C, I F = I S = 8, di/dt = /μs, V R = V μc Reverse Recovery Current I RRM Notes a. C oss(er) is a fixed capacitance that gives the same energy as C oss while is rising from % to 8 % S. b. C oss(tr) is a fixed capacitance that gives the same charging time as C oss while is rising from % to 8 % S. 2

3 TYPICL CHRCTERISTICS (25 C, unless otherwise noted) TN5N8SJ/TP5N8SJ/TP5N8FSJ I, rain-to-source Current () TOP 5 V V 3 V 2 V V V 9 V 8 V 7 V 6 V BOTTOM 5 V T J = 25 C R S(on), rain-to-source On Resistance (Normalized) I = 8 V GS = V , rain-to-source Voltage (V) Fig. - Typical Output Characteristics T J, Junction Temperature ( C) Fig. - Normalized On-Resistance vs. Temperature I, rain-to-source Current () TOP 5 V V 3 V 2 V V V 9 V 8 V 7 V BOTTOM 6 V T J = 5 C 5 V , rain-to-source Voltage (V) Fig. 2 - Typical Output Characteristics Capacitance (pf) C rss C oss C iss V GS = V, f = MHz C iss = C gs C gd, C ds Shorted C rss = C gd C oss = C ds C gd , rain-to-source Voltage (V) Fig. 5 - Typical Capacitance vs. rain-to-source Voltage I, rain-to-source Current () = 3.8 V T J = 25 C T J = 5 C V GS, Gate-to-Source Voltage (V) = 52 V = 325 V = 3 V V GS, Gate-to-Source Voltage (V) Q g, Total Gate Charge (nc) Fig. 3 - Typical Transfer Characteristics Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage 3

4 TN5N8SJ/TP5N8SJ/TP5N8FSJ 2 I S, Reverse rain Current () T J = 5 C T J = 25 C V GS = V I, rain Current () V S, Source-rain Voltage (V) Fig. 7 - Typical Source-rain iode Forward Voltage T J, Case Temperature ( C) Fig. 9 - Maximum rain Current vs. Case Temperature 8 I, rain Current ().. Operation in this rea Limited by R S(on) T C = 25 C T J = 5 C Single Pulse Limited by R S(on) * I M = Limited BVSS Limited μs ms ms - rain -to-source Voltage (V) * V GS > minimum V GS at which R S(on) is specified, rain-to-source Breakdown Voltage (V) T J, Junction Temperature ( C) Fig. 8 - Maximum Safe Operating rea Fig. - Temperature vs. rain-to-source Voltage Normalized Effective Transient Thermal Impedance. uty Cycle = Single Pulse..... Pulse Time (s) Fig. - Normalized Thermal Transient Impedance, Junction-to-Case

5 TN5N8SJ/TP5N8SJ/TP5N8FSJ R R G V GS.U.T. V Q GS Q G Q G - V V Pulse width µs uty factor. % Fig. 2 - Switching Time Test Circuit V G Charge Fig. 6 - Basic Gate Charge Waveform 9 % Current regulator Same type as.u.t. 5 kω 2 V.2 µf.3 µf % V GS t d(on) t r t d(off) t f.u.t. V - S V GS 3 m Vary t p to obtain required I S Fig. 3 - Switching Time Waveforms L Fig. 7 - Gate Charge Test Circuit I G I Current sampling resistors R G I S.U.T - V V t p. Ω Fig. - Unclamped Inductive Test Circuit t p V I S Fig. 5 - Unclamped Inductive Waveforms 5

6 TN5N8SJ/TP5N8SJ/TP5N8FSJ Peak iode Recovery dv/dt Test Circuit.U.T. - Circuit layout considerations Low stray inductance Ground plane Low leakage inductance current transformer - - R g dv/dt controlled by R g river same type as.u.t. I S controlled by duty factor.u.t. - device under test - V river gate drive P.W. Period = P.W. Period V GS = V a.u.t. l S waveform Reverse recovery current Body diode forward current di/dt.u.t. waveform iode recovery dv/dt V Re-applied voltage Inductor current Body diode forward drop Ripple 5 % I S Note a. V GS = 5 V for logic level devices Fig. 8 - For N-Channel 6

7 TO-27C (High Voltage) Package Information 3 B R/2 Q E E/2 S 2 7 ØP (atum B) Ø k M B M ØP 2 2 x R (2) 2 3 Thermal pad 5 L C 2 x b2 3 x b. M C M b Lead ssignments. Gate 2. rain 3. Source. rain 2 x e L See view B C E (b, b2, b) () Section C - C, -, E - E MILLIMETERS INCHES MILLIMETERS INCHES IM. MIN. MX. MIN. MX. IM. MIN. MX. MIN. MX E E b e 5.6 BSC.25 BSC b Ø k.25. b L b L b N 7.62 BSC.3 BSC b Ø P c Ø P c Q R S 5.5 BSC.27 BSC E View B C C Planting (c) E. M B M View - (b, b3, b5) Base metal c

8 Package Information TO-22B L H() Q L() E 2 3 M * b() Ø P F MILLIMETERS INCHES IM. MIN. MX. MIN. MX b b() c E e e() F H() J() L L() Ø P Q ECN: X2-28-Rev. N, 8-Oct-2 WG: 57 Notes * M =.32 mm to.62 mm (dimension including protrusion) Heatsink hole for HVM e b C e() J()

9 Package Information TO-22 FULLPK (HIGH VOLTGE) E n Ø P d d3 u L V L b b2 b3 c 2 e MILLIMETERS INCHES IM. MIN. MX. MIN. MX b b b c d d E e 2.5 BSC. BSC L L n Ø P u v ECN: X9-26-Rev. B, 26-Oct-9 WG: 5972 Notes. To be used only for process drawing. 2. These dimensions apply to all TO-22, FULLPK leadframe versions 3 leads. 3. ll critical dimensions should C meet C pk >.33.. ll dimensions include burrs and plating thickness. 5. No chipping or package damage. 2

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