HVQFN16 HVQFN (thermal enhanced very thin quad flatpack; no leads) NA (not applicable) P (plastic) MO-220 S (surface mount) Issue date

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1 HVQFN16 packag; no lads; 16 trminals; body 3 x 3 x 8 Fbruary 2016 Packag information 1. Packag summary Tabl 1. Packag summary Trminal position cod Packag typ dscriptiv cod Packag typ industry cod Packag styl dscriptiv cod Packag styl suffix cod Packag body matrial typ JEDE packag outlin cod Mounting mthod typ Q (quad) HVQFN16 HVQFN16 HVQFN (thrmal nhancd vry thin quad flatpack; no lads) N (not applicabl) P (plastic) MO-220 S (surfac mount) Issu dat Symbol Paramtr Min Typ Nom Max Unit D packag lngth mm E packag width mm satd hight [tbd] mm 2 packag hight [tbd] [tbd] mm n 2 actual quantity of trmination

2 2. Packag outlin HVQFN16: packag; no lads; 16 trminals; body 3 x 3 x D B trminal 1 indx ara E 1 c dtail X 1 1/2 b 5 8 v M w M B y 1 y L 4 9 E h 2 1/ trminal 1 indx ara D h mm X scal DIMENSIONS (mm ar th original dimnsions) UNIT (1) max. 1 b c D (1) D h E (1) E h 1 2 L v w y y 1 mm Not 1. Plastic or mtal protrusions of mm maximum pr sid ar not includd. OUTLINE VERSION REFERENES IE JEDE JEIT MO EUROPEN PROJETION ISSUE DTE Fig. 1. Packag outlin HVQFN16 () ll information providd in this documnt is subjct to lgal disclaimrs. NXP Smiconductors N.V ll rights rsrvd Packag information 8 Fbruary / 5

3 3. Soldring Footprint information for rflow soldring of HVQFN16 packag Hx Gx D P (0.105) SPx nspx SPy Hy Gy SPy tot nspy SLy By y SPx tot SLx Bx x soldr land soldr past dposit soldr land plus soldr past occupid ara nspx nspy 2 2 Dimnsions in mm P x y Bx By D SLx SLy SPx tot SPy tot SPx SPy Gx Gy Hx Hy Issu dat Fig. 2. Rflow soldring footprint for HVQFN16 () sot758-1_fr ll information providd in this documnt is subjct to lgal disclaimrs. NXP Smiconductors N.V ll rights rsrvd Packag information 8 Fbruary / 5

4 4. Lgal information Disclaimrs Limitd warranty and liability Information in this documnt is blivd to b accurat and rliabl. Howvr, NXP Smiconductors dos not giv any rprsntations or warrantis, xprssd or implid, as to th accuracy or compltnss of such information and shall hav no liability for th consquncs of us of such information. NXP Smiconductors taks no rsponsibility for th contnt in this documnt if providd by an information sourc outsid of NXP Smiconductors. In no vnt shall NXP Smiconductors b liabl for any indirct, incidntal, punitiv, spcial or consquntial damags (including - without limitation - lost profits, lost savings, businss intrruption, costs rlatd to th rmoval or rplacmnt of any products or rwork chargs) whthr or not such damags ar basd on tort (including nglignc), warranty, brach of contract or any othr lgal thory. Notwithstanding any damags that customr might incur for any rason whatsovr, NXP Smiconductors aggrgat and cumulativ liability towards customr for th products dscribd hrin shall b limitd in accordanc with th Trms and conditions of commrcial sal of NXP Smiconductors. Right to mak changs NXP Smiconductors rsrvs th right to mak changs to information publishd in this documnt, including without limitation spcifications and product dscriptions, at any tim and without notic. This documnt suprsds and rplacs all information supplid prior to th publication hrof. ll information providd in this documnt is subjct to lgal disclaimrs. NXP Smiconductors N.V ll rights rsrvd Packag information 8 Fbruary / 5

5 5. ontnts 1. Packag summary Packag outlin Soldring Lgal information... 4 NXP Smiconductors N.V ll rights rsrvd For mor information, plas visit: For sals offic addrsss, plas snd an mail to: salsaddrsss@nxp.com Dat of rlas: 8 Fbruary 2016 ll information providd in this documnt is subjct to lgal disclaimrs. NXP Smiconductors N.V ll rights rsrvd Packag information 8 Fbruary / 5

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