PIN CONNECTIONS Representative Schematic Diagram

Transcription

1 The MC34063A Series is a monolithic control circuit containing the primary functions required for DC to DC converters. These devices consist of an internal temperature compensated reference, comparator, controlled duty cycle oscillator with an active current limit circuit, driver and high current output switch. This series was specifically designed to be incorporated in Step Down and Step Up and Voltage Inverting applications with a minimum number of external components. Refer to Application Notes AN920A/D and AN954/D for additional design information. PDIP P, P SUFFIX CASE 626 Operation from 3.0 V to 40 V Input Low Standby Current Current Limiting Output Switch Current to.5 A Output Voltage Adjustable Frequency Operation to 00 khz Precision 2% Reference SO D SUFFIX CASE 75 SOEIAJ M SUFFIX CASE 96 PIN CONNECTIONS Representative Schematic Diagram ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page of this data sheet. DEVICE MARKING INFORMATION See general marking information in the device marking section on page of this data sheet. This device contains 5 active transistors. Semiconductor Components Industries, LLC, 2000 August, 2000 Rev. 6 Publication Order Number: MC34063A/D

2 MAXIMUM RATINGS Rating Symbol Value Unit Power Supply Voltage V CC 40 Vdc Comparator Input Voltage Range V IR 0.3 to +40 Vdc Switch Collector Voltage V C(switch) 40 Vdc Switch Emitter Voltage (V Pin = 40 V) V E(switch) 40 Vdc Switch Collector to Emitter Voltage V CE(switch) 40 Vdc Driver Collector Voltage V C(driver) 40 Vdc Driver Collector Current (Note.) I C(driver) 00 ma Switch Current I SW.5 A Power Dissipation and Thermal Characteristics Plastic Package, P, P Suffix T A = 25 C P D.25 W Thermal Resistance R θja 00 C/W SOIC Package, D Suffix T A = 25 C P D 625 W Thermal Resistance R θja 60 C/W Operating Junction Temperature T J +50 C Operating Ambient Temperature Range T A C MC34063A 0 to +70 MC33063AV 40 to +25 MC33063A 40 to +5 Storage Temperature Range T stg 65 to +50 C. Maximum package power dissipation limits must be observed. 2. ESD data available upon request. 2

3 ELECTRICAL CHARACTERISTICS (V CC = 5.0 V, T A = T low to T high [Note 3.], unless otherwise specified.) Characteristics Symbol Min Typ Max Unit OSCILLATOR Frequency (V Pin 5 = 0 V, C T =.0 nf, T A = 25 C) f osc khz Charge Current (V CC = 5.0 V to 40 V, T A = 25 C) I chg µa Discharge Current (V CC = 5.0 V to 40 V, T A = 25 C) I dischg µa Discharge to Charge Current Ratio (Pin 7 to V CC, T A = 25 C) I dischg /I chg Current Limit Sense Voltage (I chg = I dischg, T A = 25 C) V ipk(sense) mv OUTPUT SWITCH (Note 4.) Saturation Voltage, Darlington Connection (I SW =.0 A, Pins, connected) Saturation Voltage (Note 5.) (I SW =.0 A, R Pin = 2 Ω to V CC, Forced β 20) V CE(sat).0.3 V V CE(sat) V DC Current Gain (I SW =.0 A, V CE = 5.0 V, T A = 25 C) h FE Collector Off State Current (V CE = 40 V) I C(off) µa COMPARATOR Threshold Voltage T A = 25 C T A = T low to T high V th V Threshold Voltage Line Regulation (V CC = 3.0 V to 40 V) MC33063A, MC34063A MC33363AV Reg line mv Input Bias Current (V in = 0 V) I IB na TOTAL DEVICE Supply Current (V CC = 5.0 V to 40 V, C T =.0 nf, Pin 7 = V CC, V Pin 5 > V th, Pin 2 = Gnd, remaining pins open) I CC 4.0 ma 3. T low = 0 C for MC34063A, 40 C for MC33063A, AV T high = +70 C for MC34063A, +5 C for MC33063A, +25 C for MC33063AV 4. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible. 5. If the output switch is driven into hard saturation (non Darlington configuration) at low switch currents ( 300 ma) and high driver currents ( 30 ma), it may take up to 2.0 µs for it to come out of saturation. This condition will shorten the off time at frequencies 30 khz, and is magnified at high temperatures. This condition does not occur with a Darlington configuration, since the output switch cannot saturate. If a non Darlington configuration is used, the following output drive condition is recommended: IC output Forced of output switch : 0 I C driver 7.0 ma * * The 00 Ω resistor in the emitter of the driver device requires about 7.0 ma before the output switch conducts. 3

4 MC34063A, MC33063A µ µ Figure. Output Switch On Off Time versus Oscillator Timing Capacitor Figure 2. Timing Capacitor Waveform β Figure 3. Emitter Follower Configuration Output Saturation Voltage versus Emitter Current Figure 4. Common Emitter Configuration Output Switch Saturation Voltage versus Collector Current Figure 5. Current Limit Sense Voltage versus Temperature Figure 6. Standby Supply Current versus Supply Voltage 6. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible. 4

5 µ µ Test Conditions Results Line Regulation V in =.0 V to 6 V, I O = 75 ma 30 mv = ±0.05% Load Regulation V in = 2 V, I O = 75 ma to 75 ma 0 mv = ±0.07% Output Ripple V in = 2 V, I O = 75 ma 400 mvpp Efficiency V in = 2 V, I O = 75 ma 7.7% Output Ripple With Optional Filter V in = 2 V, I O = 75 ma 40 mvpp Figure 7. Step Up Converter 5

6 Figure. External Current Boost Connections for I C Peak Greater than.5 A a. External NPN Switch b. External NPN Saturated Switch (See Note 7.) 7. If the output switch is driven into hard saturation (non Darlington configuration) at low switch currents ( 300 ma) and high driver currents ( 30 ma), it may take up to 2.0 µs to come out of saturation. This condition will shorten the off time at frequencies 30 khz, and is magnified at high temperatures. This condition does not occur with a Darlington configuration, since the output switch cannot saturate. If a non Darlington configuration is used, the following output drive condition is recommended. 6

7 µ µ Test Conditions Results Line Regulation V in = 5 V to 25 V, I O = 500 ma 2 mv = ±0.2% Load Regulation V in = 25 V, I O = 50 ma to 500 ma 3.0 mv = ±0.03% Output Ripple V in = 25 V, I O = 500 ma 20 mvpp Short Circuit Current V in = 25 V, R L = 0. Ω. A Efficiency V in = 25 V, I O = 500 ma 3.7% Output Ripple With Optional Filter V in = 25 V, I O = 500 ma 40 mvpp Figure 9. Step Down Converter Figure 0. External Current Boost Connections for I C Peak Greater than.5 A 0a. External NPN Switch 0b. External PNP Saturated Switch 7

8 µ µ µ Test Conditions Results Line Regulation V in = 4.5 V to 6.0 V, I O = 00 ma 3.0 mv = ±0.02% Load Regulation V in = 5.0 V, I O = 0 ma to 00 ma V = ±0.09% Output Ripple V in = 5.0 V, I O = 00 ma 500 mvpp Short Circuit Current V in = 5.0 V, R L = 0. Ω 90 ma Efficiency V in = 5.0 V, I O = 00 ma 62.2% Output Ripple With Optional Filter V in = 5.0 V, I O = 00 ma 70 mvpp Figure. Voltage Inverting Converter Figure 2. External Current Boost Connections for I C Peak Greater than.5 A 2a. External NPN Switch 2b. External PNP Saturated Switch

9 MC34063A MC34063A MC34063A *Optional Filter. Figure 3. Printed Circuit Board and Component Layout (Circuits of Figures 7, 9, ) INDUCTOR DATA Converter Inductance (µh) Turns/Wire Step Up 70 3 Turns of #22 AWG Step Down Turns of #22 AWG Voltage Inverting 2 Turns of #22 AWG All inductors are wound on Magnetics Inc. 557 toroidal core. 9

10 Calculation Step Up Step Down Voltage Inverting t on /t off V out V V F in(min) V V in(min) sat V out V F V in(min) V sat V out V out V F V V in sat (t on + t off ) f f f t off t on t off t on t off t on t off t on t off t on t off t on t off t on (t on + t off ) t off (t on + t off ) t off (t on + t off ) t off C T 4.0 x 0 5 t on 4.0 x 0 5 t on 4.0 x 0 5 t on I pk(switch) 2I out(max) t on t off 2I out(max) 2I out(max) t on t off R sc 0.3/I pk(switch) 0.3/I pk(switch) 0.3/I pk(switch) L (min) (V in(min) V sat ) I pk(switch) t on(max) (V in(min) V sat V out ) I pk(switch) t on(max) (V in(min) V sat ) I pk(switch) t on(max) C O 9 I out t on I (t pk(switch) on t ) off 9 V ripple(pp) V ripple(pp) I out t on V ripple(pp) V sat = Saturation voltage of the output switch. V F = Forward voltage drop of the output rectifier. The following power supply characteristics must be chosen: V in Nominal input voltage. V out Desired output voltage, I out Desired output current. V out.25 R2 R f min Minimum desired output switching frequency at the selected values of V in and I O. V ripple(pp) Desired peak to peak output ripple voltage. In practice, the calculated capacitor value will need to be increased due to its equivalent series resistance and board layout. The ripple voltage should be kept to a low value since it will directly affect the line and load regulation. NOTE: For further information refer to Application Note AN920A/D and AN954/D. Figure 4. Design Formula Table 0

11 ORDERING INFORMATION Device Package Shipping MC33063AD SO 9 Units / Rail MC33063ADR2 SO 2500 Units / Tape & Reel MC33063AP DIP 50 Units / Rail MC33063AVD SO 9 Units / Rail MC33063AVDR2 SO 2500 Units / Tape & Reel MC33063AVP DIP 50 Units / Rail MC34063AD SO 9 Units / Rail MC34063ADR2 SO 2500 Units / Tape & Reel MC34063AP DIP 50 Units / Rail MC34063BD SO 9 Units / Rail MC34063BDR2 SO 2500 Units / Tape & Reel MC34063AM SOEIAJ 94 Units / Rail MC34063AMEL SOEIAJ 000 Units / Tape & Reel MC34063AML SOEIAJ 000 Units / Tape & Reel MC34063AML2 SOEIAJ 2000 Units / Tape & Reel MC34063AMR SOEIAJ 000 Units / Tape & Reel MC34063AMR2 SOEIAJ 2000 Units / Tape & Reel MARKING DIAGRAMS PDIP P, P SUFFIX CASE 626 PDIP P, P SUFFIX CASE 626 SO D SUFFIX CASE 75 SO D SUFFIX CASE 75 SOEIAJ M SUFFIX CASE 96 3x063AP AWL YYWW 33063AVP AWL YYWW 3x063 ALYWz ALYWz M063A ALYW x = 3 or 4 z = A denotes AD suffix J denotes BD suffix A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week

12 PACKAGE DIMENSIONS PDIP P, P SUFFIX PLASTIC PACKAGE CASE ISSUE K 5 4 F B T H A G D N C K L J M SO D SUFFIX PLASTIC PACKAGE CASE ISSUE T A E B C A e D B H A h X 45 C L 2

13 SOEIAJ M SUFFIX PLASTIC PACKAGE CASE 96 0 ISSUE O Z D E H E M L LE DETAIL P Q b e A A P c 3

14 Notes 4

15 Notes 5

16 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION NORTH AMERICA Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 027 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada ONlit@hibbertco.com Fax Response Line: or Toll Free USA/Canada N. American Technical Support: Toll Free USA/Canada EUROPE: LDC for ON Semiconductor European Support German Phone: (+) (Mon Fri 2:30pm to 7:00pm CET) ONlit german@hibbertco.com French Phone: (+) (Mon Fri 2:00pm to 7:00pm CET) ONlit french@hibbertco.com English Phone: (+) (Mon Fri 2:00pm to 5:00pm GMT) ONlit@hibbertco.com EUROPEAN TOLL FREE ACCESS*: *Available from Germany, France, Italy, UK, Ireland CENTRAL/SOUTH AMERICA: Spanish Phone: (Mon Fri :00am to 5:00pm MST) ONlit spanish@hibbertco.com ASIA/PACIFIC: LDC for ON Semiconductor Asia Support Phone: (Tue Fri 9:00am to :00pm, Hong Kong Time) Toll Free from Hong Kong & Singapore: ONlit asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center 4 32 Nishi Gotanda, Shinagawa ku, Tokyo, Japan Phone: r4525@onsemi.com ON Semiconductor Website: For additional information, please contact your local Sales Representative. 6 MC34063A/D