Beam Loss monitoring R&D. Arden Warner Fermilab MPS2014 Workshop March 5-6, 2014

Transcription

1 Beam Loss monitoring R&D Arden Warner Fermilab MPS2014 Workshop March 5-6, 2014

2 Outline PXIE Technical Concerns PXIE Study plans Preliminary scvd R&D Cold Ionization chambers 2 MPS2014; Arden Warner

3 Loss Mechanisms at PXIE 30keV 2.1MeV LEBT RFQ MEBT HWR 11MeV Beam Dump Ion Source Diagnostics LEBT Kicker and Ion source /primary actuators for beam Chopper must be closely monitored Low energy beam will transition from RT to SC at 2.1 MeV in the PXIE front-end Complicated chopping scenarios Require feedback and monitoring of intensity/losses 3 MPS2014; Arden Warner

4 Technical Concerns CW Beam: Losses develop continuously; no large, peak beam intensities to trigger loss monitors. MPS must allow pulsed, diagnostic beam operation when CW losses inhibit normal operation. MEBT Chopper: Kicks out individual bunches to reduce average current of beam from 5mA to 1mA. Diagnostics needed to insure SRF is not overloaded. Low Energy SRF Transition: Most loss monitors are ineffective at low energies. Reduced penetration depth of beam energy impacting niobium. Need a way to detect losses before cavities quench. 4 MPS2014; Arden Warner

5 Warm section: PXIE Study Plans Develop understanding of acceptable loss rates in LEBT RFQ MEBT Develop strategy to monitor chopped beam from the MEBT Low energy cold section: Detection of beam loss in cryomodules Develop understanding of low energy beam loss mechanisms and their instruments Develop/select sensor technology to directly measure low energy beam loss Understand impact of dark current effects on MPS instruments 5 MPS2014; Arden Warner

6 Preliminary scvd Detector Test CVD diamonds are being investigated because of their sensitivity to single particles, nanosecond time response and the excellent radiation resistivity which makes them perfectly suitable for applications in high-radiation environments. In addition operation in vacuum at both room temperature and 1.8 Kelvin has been demonstrated. Interest for PIXIE/PIP-II: 1. Develop an effective loss monitor to detect low energy proton losses (2.1 MeV) as a diagnostic to protect the PIXIE cryogenic system at injection. 2. Provide a detector capable of single particle detection as an effective diagnostic for beam extinction measurements in the accelerator. Characteristics of crystal that were tested: Parameters: Substrate material Substrate size Electrode size Electrode material Detector capacitance Bias Voltage scvd diamond 4.6 mm x 4.6 mm x 0.5 mm 4 mm x 4 mm Gold 3 pf 500 Volts 6 MPS2014; Arden Warner

7 CVD General Principle and Characteristics 7 MPS2014; Arden Warner

8 Diamond Beam Loss Monitor Response Detector located inside the vacuum with the crystal angled toward the dump. 160 µs beam pulses, 200 µa 3 ma, 2.5 MeV and 500 volt bias on the detector. Window in case exposes crystal to the beam. The ideal crystal should be thin (100 micron limit possible dependent on area). Beam Toroid signal detector Single particle detection of scattered electrons and secondary protons from dump Fast Charge Amplifier: 100 MHz, 4 mv/fc Zoom Reflections due to cable capacitance is understood and correctable 8 MPS2014; Arden Warner

9 Installation Inside CM2 scvd Diamond test also underway at ASTA Installation in cryo-module near BPM and quadrupole 9 Arden Warner, FNAL

10 Proton Interaction ISOLDE P.T. TEVATRON LHC PXIE PIP-II Particle bunches Absorption Single particles Absorption Single particles Traversing Compliments of Erich Griesmayer

11 Electron Interaction Particle bunches Absorption Single particles Absorption Single particles Traversing 400 Compliments of Erich Griesmayer

12 LHC - DBLM 1 ms DBLM Ionization Chambers Compliments of Erich Griesmayer

13 LHC - DBLM Zoom x us Compliments of Erich Griesmayer

14 LHC - DBLM Zoom x ns Compliments of Erich Griesmayer

15 Cryogenic Beam Loss Monitors (Ionization chamber) Monitors and recycling integrator electronics fabricated and calibrated by Bridgeport Instruments, LLC. Highlights operation in air and high vacuum Operates from 5K to 350K Stainless steel vessel, 120cm 3, filled with He-gas He-gas filling at bar pressure Sensitivity: 1.9 pa/(rad/hr) Readout via current-to-frequency converter (1.9 Hz/(Rad/hr) and FPGA- TDC Pulses can be sent through long cables Features Custom-built prototype detector for operation as a beam loss monitor at cryogenic temperatures Helium filled ionization chamber with signal current proportional to dose rate All material radiation hard and suitable for operation at 5K Current is measured with a recycling integrator I-F converter for low current and a wide dynamic range. A Fermilab designed FPGA based TDC measures time intervals between pulses output from the recycling integrator ensures a fast response along with current measurement resolution better than 10- bits. 15 Arden Warner, FNAL (warner@fnal.gov)

16 Cryogenic Beam Loss Monitors Specifications 16 Arden Warner, FNAL

17 Cryogenic Ionization chamber 5k 350K Bias voltage and electronics The electronics is self-contained and requires no computer to operate. Helium was chosen because of its properties (boiling point 5K) and the fact that it will be in a helium environment during operation anyway. Fill port 17 Arden Warner, FNAL (warner@fnal.gov)

18 Source test and calibration 18 Arden Warner, FNAL

19 Cryogenic Loss Monitor operation The chamber housing is held at negative potential and negative charge is collected on the center electrode. The HV is -95 V and is kept well below the minimum breakdown voltage of 156V in Helium. The electronics uses a recycling integrator as a current to frequency converter with a wide dynamic range. The charge per pulse is 1.63pC or 238µR at 1 atm (room temp) of He. The recycling integrator consist of a charge integrating amplifier with a 0.50 pf capacitance followed by a discriminator which senses when the capacitor is fully charged. The FPGA generates a fixed-width (1.2µs) discharge pulse with an amplitude of 3.3V. It connects to the amplifier input via a 13 MΩ resistor, creating a 254 na discharge current 19 Arden Warner, FNAL (warner@fnal.gov)

20 Bench top measurements Pulses with 150nA input current Pulses with 300nA input current The maximum periodic pulse rate at the output is close to 700 KHz. The corresponding maximum chamber current is 1.60 µa or 842 KR/hr. Pulses can be sent loss-free over great distances and the technique allows to measure radiation levels with dynamic range of 100,000: 1 20 Arden Warner, FNAL (warner@fnal.gov)

21 Cryogenic Loss Monitor Connection and signal path Recycling integrator 1.2 µs NIM pulses (1.63 pc or atm Output signal NIM to LVDS FPGA-TDC 21 Arden Warner, FNAL (warner@fnal.gov)

22 In typical digitization/readout schemes as shown in Fig., a counter is utilized to accumulate the number of pulses generated by the recycling integrator to digitize the total charge. In order to calculate current with reasonable resolution, a long period must be waited for each sample. For example, to achieve 7-bit resolution, the sampling period corresponds to 128 pulses when input current is at upper limit. This scheme provides a total dosage of the radiation over long period but is not fast enough for accelerator beam protection. Typical digitization scheme with a counter. In our new scheme, the same recycling integrator output is sent to an FPGA in which a time-todigital converter (TDC) is implemented. The TDC is based on a multi-sampling scheme in which the input transition is sampled with four different phases of the system clock. With system clock rates of 250 MHz and four-phase sampling, a 1- ns time measurement resolution can be achieved. digitization scheme using an FPGA based TDC. 22 Arden Warner, FNAL

23 TDC Implemented with FPGA There are two popular schemes for FPGA TDC: Multiple sampling based scheme: LSB: 0.6 to 1 ns. Delay line based scheme: LSB: 40 to 100 ps. We are currently working on a variation of the delay line based TDC called Wave Union TDC. pulse input to 8 Channel LVDS Cyclone III FPGA Arden Warner, FNAL (warner@fnal.gov)

24 Multi-Sampling TDC FPGA Multi-Sampling TDC FPGA Ultra low-cost: 48 channels in $18.27 EP2C5Q208C7. Sampling rate: 250 MHz : x4 phases = 1 GHz. LSB = 1 ns. Multiple Sampling c0 c90 c180 c270 Clock Domain Changing c0 c90 QF QE QD Q3 Q2 Q1 Q0 4Ch Trans. Detection & Encode Coarse Time Counter DV T0 T1 TS This picture represent a placement in Cyclone FPGA Logic elements with non-critical timing are freely placed by the fitter of the compiler. Arden Warner, FNAL (warner@fnal.gov) 24

25 Input Current 100 na/div Bench-top measurements with FPGA- TDC I=Q/dt Output Pulses Input current and out-put pulses FPGA-TDC data generated by measuring time between pulses A Scheme using FPGA-based time-to-digital converter (TDC) to measure time intervals between pulses output from the recycling integrator is employed to ensure a fast beam loss response along with a current measurement resolution better than 10-bit. Arden Warner, FNAL (warner@fnal.gov)

26 Dark current measurements at Photo-injector and HTS Counter/timer show 630 counts = 150 mr Initial cold measurements were done at the horizontal test stand (HTS) shown here. A VME based counter timer board was used to count pulse in ACNET: Counter/timer showed counts corresponding to 150mR Test cavity Test are now being done using the FPGA-TDC method which is faster with better resolution Loss due to Dark current background at A0-photo-injector. Measured to be ~ 400 na downstream of bend magnet 40 µs rf gate (dark current only no photo-electrons injected) HTS installation VME based counter/timer board 26 Arden Warner, FNAL

27 Design improvements and modifications Final test are underway with FNAL designed FPGA-TDC at HTS We have increased the pressure from 1bar to 1.5bars to establish the best operating point for the device. The calibration S of the monitors is almost completely determined by the volume V of the enclosed gas and by the type of gas: S V ρ. e/e ion ( ρ is gas density and E ion is mean energy deposition to create electron-ion pairs) We had Bridgeport Instruments modify they FPGA code in the recycling integrator electronics box so that the leading edge of the discriminator can be seen at the NIM port output. This would improve the resolution of the TDC measurement between pulses. A mechanical scheme to easily mount the loss monitor in a cryomodule near the quads and BPMs is being done as shown in the following example. 27 Arden Warner, FNAL

28 Arden Ayube Warner 6/15/2010 SCRF Research at Fermilab SRF=Superconducting Radio Frequency 1.3 GHz 9-Cell SRF Cavity 8 Cavity SRF Cryomodule

29 29 Arden Warner, FNAL

30 Cryogenic Loss Monitor proposed installation in CM2 30 Arden Warner, FNAL

31 Proposed installation in cryomodule II QUAD SS clamp plates BPM BLM with t-slot flange (welded) G10/11 Plate with t-slot 31 Arden Warner, FNAL