Paper Code: PSPC_2015_24 Designing a Compensating Electronic Circuit to Enhance Capacitive Voltage Transformer Characteristics

Transcription

1 Paper Code: PSPC_215_24 Designing a Compensating Electronic Circuit to Enhance Capacitive Voltage Transformer Characteristics Mohammad Hadi Zare, Ahmad Mirzaei Yazd University Yazd, Iran zare@yazd.ac.ir Hossein Askarian Abyaneh Amirkabir University of Technology Tehran, Iran Abstract Capacitive voltage transformer (CVT) is widely used to convert high voltage signals to low voltage ones for measurement, protection and control. It has poor dynamics which can lead to maloperation of protective relays. Moreover, CVT has a nonsmooth frequency response and limited band width which make it inappropriate for system harmonic measurements. This paper proposes a new method for decreasing CVT voltage distortions and correcting CVT dynamic response as well as its steady state response. An electronic circuit is designed so as to reproduce CVT transients. The final output which is the summation of CVT voltage and the designed circuit voltage has considerably low distortions and is a replica of the input voltage. The proposed method is independent of the load and the Ferroresonance Suppression Circuit (FSC) connected to the CVT. Simulation results confirm the efficiency and accuracy of the proposed method. Finally, CVT percentage error for the proposed method is compared with the dynamic compensation method. Keywords Capacitive voltage transformer; Transient response; Bandwidth; Voltage emulator circuit. I. INTRODUCTION Coupling capacitor voltage transformers or capacitive voltage transformers (CVTs) are commonly used throughout the highvoltage (HV) and extrahighvoltage (EHV) power system. The size and cost of wirewound electromagnetic voltage transformers (VTs) are proportional to the voltage. While VTs reproduce primary voltages with excellent fidelity, the CVT is often more economical at higher voltages. [1] Theoretically, the output waveform of a CVT should be an exact replica of its input waveform under all conditions [2][4]. This requirement can easily be satisfied under steady state condition. However, the CVT dynamic response is inferior. A CVT contains a number of inductive and capacitive components. When a fault occurs in the power system, the stored energy in these elements cannot scatter promptly. As a result, nonfundamental frequency components emerge at the CVT output. These components deform sinusoidal voltage waveform and cause some protective problems in the high speed voltagebased relays. Distance relay overreach is a consequent of the CVT dynamic response during a fault. The compensation of CVT output voltage is unavoidable to improve the performance of protective relays and increase measurement accuracy. A lot of researches have been conducted to model the CVT. However, very limited research on correcting the CVT output has been carried out [5][9]. A method to estimate the voltage phasors of the CVT output is offered by Pajuelo [1]. This method that is based on the least squares technique, analyzes different harmonics of the voltage provided by the CVT. It estimates the phasors of the distorted voltage. This method can minimize the impact of CVT transients on distance relay. However, it will cause time delay in the operation of protective devices since its computation is reliable after a couple of cycles. Reference [11] proposes an algorithm for compensating the distorted secondary voltage of CVT in the time domain by considering the hysteresis characteristic of the core. This method estimates the actual voltage from the measured secondary voltage of the CVT, the burden current, and the voltage of stepdown transformer. Neural network is an alternative technique used to approximate the inverse transfer function of the CVT and can correct its secondary voltage [12]. Multilayer feedforward networks is chosen and trained for different power system conditions, fault types, fault locations, fault inception angles, source impedance ratio (SIR), and burdens. Hou et al. [13] suggested the use of Fourier technique to get the fundamental frequency component from the corrupted voltage. Fourier technique is not accurate because the frequencies of the oscillatory components are quite close to the fundamental frequency. In addition, their time constants are in the order of the power cycle. So, this method encounters filtering problems. The idea of using nonrecursive digital filter for compensating CVT response was first suggested by [14]. The

2 implemented filter will impose a time delay on the relay input signal that results in decreasing power system security and dependability. A dynamic compensation method using a compensating algorithm based on the inverse transfer function of the CVT was proposed by [15]. This method is able to remove major undesirable transients from the CVT output voltage. It uses a simplified model of CVT in which some parameters of the stepdown transformer and ferroresonance suppression circuit are neglected. Since the sampling frequency is definite, this method cannot compensate high frequency transients. All of the mentioned methods depend on the CVT parameters so that a slight variation in the CVT structure or its burden affects the compensation efficiency. Moreover, most of the presented approaches require some calculations to produce a nondistorted voltage. These approaches are not suitable for real time application. This paper offers an innovative method to eliminate the undesirable transients at the CVT output for different conditions. This method improves the CVT steady state response as well as its dynamic characteristic. An electronic circuit is designed to remove transients at the CVT output without imposing any delay on the response. This method is independent of the CVT burden and ferroresonance suppression circuit specifications. II. CVT RESPONSE CHARACTERISTICS Capacitive voltage transformer has an uneven frequency response and a limited bandwidth. It has an ideal response just at the vicinity of fundamental frequency. So, different frequency components that emerge at the output terminal during a fault in the power system will be attenuated or amplified. Deformation of the voltage waveform is a consequent of the frequency response characteristic which causes some protective problems. A. CVT Construction A generic CVT is plotted in Fig. 1. It consists of a capacitive voltage divider, compensating reactor, stepdown transformer, and ferroresonance suppression circuit. Capacitive voltage divider (C 1 and C 2 ) reduces the primary high voltage of the power system to an intermediate voltage level, typically 515 kv. The compensating reactor (L, R) eliminates the capacitive divider reactance at the power frequency. This reactance cancellation prevents any phase shift between the primary and secondary voltages at the fundamental frequency. The stepdown transformer (L T1, L T2, R T1, R T2, C T1, L m, and R Fe ) converts the medium voltage to a low measurable voltage level [16,17]. The compensating reactor and stepdown transformer have nonlinear inductances. They along with the divider capacitance provide a susceptible circumstance for ferroresonance. Therefore, all CVTs are protected by ferroresonance suppression circuit (FSC). These circuits are normally placed on the secondary of stepdown transformer. There are two major kinds of FSC. One model which is called passive ferroresonance suppression circuit (PFSC) uses a Fig. 1. Capacitive voltage transformer structure saturable inductor in parallel with a resistor. The other kind which is called active ferroresonance suppression circuit (AFSC) comprises a resistor in series with a parallel LC branch. B. Decaying Transients A decaying transient is an error voltage appearing at the output terminals of a CVT resulting from a sudden drop in the primary voltage, typically produced by a nearby phase to ground fault. It may be damped oscillatory or decayed unidirectional depending upon the design of the CVT, the connected burden, and the fault incidence point on the voltage waveform [18]. Since the CVT generated transients result from the interaction of the stored energy at the capacitive divider and the compensating reactor, the severity of decaying transients is highly dependent on these elements. The higher sum of capacitances C 1 and C 2, the lower magnitude of the decaying transients but the cost of the CVT increases. CVTs with higher compensating reactance cause more destructive dynamic response. CVT burden is another effective factor on the response quality. Most CVT designs give better dynamic performance for burdens lower than the rated burden. As the power factor decreases, either leading or lagging, the transient response becomes worse. An active ferroresonance suppression circuit deteriorates CVT transient response more than a passive one. It acts like a bandpass filter and introduces some time delay in the CVT secondary output. The energy storage elements of an AFSC contribute to the severity of the CVT transient. In contrast, a PFSC has a minor effect on the CVT transient response. It presents high impedance in the absence of ferroresonance. In general, faults that occurred at the zero crossing point on the voltage waveform lead the worst CVT response because the capacitors has maximum stored energy. The fundamental frequency component of voltage undergoes a dramatic change in this case. On the other hand, faults initiated at the peak crossing point produce high frequency transients that can be filtered at the entrance of protective relays. SIR (the ratio of the system equivalent impedance and the relay reach impedance) determines the amount of voltage drop at the CVT installation place after a fault occurrence. Systems with high SIR create more deformity at the CVT voltage waveform than low SIR systems.

3 HI LO ABI V 86 V BI BO 5 نهمین کنفرانس تخصصی حفاظت و کنترل سیستم های قذرت CVT error is proportional to the difference between estimated value and true value of the fault voltage signal and computed as: V(CVT) V(Ideal) % max 1 V (Ideal) (1) where V (CVT) and V (Ideal) refer to the fundamental frequency components of the measured value by the CVT output and the ideal value, respectively. B. Voltage Emulator of Series Capacitor The circuit shown in Fig. 3 produces a voltage proportional to the voltage drop on the divider capacitor, C eq. The CVT input current, I 1, is turned to a corresponding voltage, V in, by a unit resistor. A buffer comprising the OpAmp U 1 and resistors R 1, R 2, R 3, R 4 provides a high input impedance circuit to prevent loading effect on the input voltage. By choosing R 1 equal to R 2, it makes a gain of 1. An integrator circuit comprising the OpAmp U 2, inductor L 1, and resistors R 5, R 6, R 7 integrates the input voltage V in. The output voltage of this III. COMPENSATING CVT RESPONSE During a change in the CVT input voltage from one steady state mode to another one, some decaying transients will emerge at its output terminal which may cause maloperation of protective relays connected to it. All of the CVT elements contribute to the distortion of output voltage. However, energy storage elements especially capacitive divider and compensating reactor have the most influence on the CVT dynamic response. The stored energy in these elements takes time to reach to a new condition. Their values are chosen so as to eliminate corresponding impedances at the fundamental frequency. At the other frequencies, the impedance of dividing capacitor and compensating reactor altogether increases and causes voltage drop across these elements. Thus, the voltage of CVT output deceases. Moreover, by increasing the frequency of input voltage, the active ferroresonance suppression circuit exhibits low impedance and passes more current. Meanwhile, currents passing through the stray capacitors of stepdown transformer rise. These currents finally find their way through the capacitive divider and compensating reactor which cause voltage drop across them. It deteriorates the voltage reduction at the CVT output terminals. Vin HI R1 R3 Fig. 1. The compensated CVT circuit R2 U1 L1 1 2 R4 R5 R6 U2 Fig. 2. Emulator circuit of series capacitor voltage V1 Vin R9 R8 U3A Vo1 R7 A. Voltage Drop Emulator This paper, offers a method to eliminate the undesirable transients of CVT by adding a compensatory voltage to the CVT output. A designed circuit imitates voltage drop across the capacitive divider and compensating reactor. This voltage is added to the CVT output terminals with the turn ratio of stepdown transformer. This method unlike the digital compensating algorithms does not impose any time delay to the final voltage. Thus, it is appropriate for realtime applications. Fig. 2 exhibits an outline of this method. First, an amperemeter measures the current passing through the capacitive divider and compensating reactor. Then it is converted to the voltage via a resistor of 1Ω. An electronic circuit estimates the voltage drop across the storage elements regarding value of capacitance, reactance, passing current, and the frequency. This circuit is independent of magnitude, power factor, and structure of the burden. The type of ferroresonant suppression circuit also does not affect the performance of this circuit. LO Vo1 Vo2 V2 R1 C3 HI R11 R12 R13 L2 LO HI Fig. 3. Emulator circuit of series reactor voltage R16 R18 R2 R17 R19 U4 U5 R21 Vcv t R15 Vo2 R14 Vf inal DB R22 Fig. 4. An adder circuit

4 Fundamental Component of Fundamental Component of Gain (db) نهمین کنفرانس تخصصی حفاظت و کنترل سیستم های قذرت circuit is: V R 6 O2 Vin sl 1 (2) 2 where s stands for the complex frequency. This circuit creates a voltage equal to the voltage drop cross the divider capacitor when the parameters R 6 and L 1 satisfy the following equation. R6 1 1 sl a sc 1 eq where a is the turn ratio of the stepdown transformer. C. Voltage Emulator of Series Inductor Fig. 4 depicts the designed circuit that is able to emulate voltage drop across the compensating reactor. The input voltage, V in, which is corresponding to the current passing through the compensating reactor applies to the noninverting terminal of the operational transconductance amplifier (OTA) via resistors R 8 and R 9. OTA is an amplifier whose differential input voltage produces an output current. Thus, it is a voltage controlled current source. In the ideal OTA, the output current is a linear function of the differential input voltage and is obtained as follows: I (V V ) g out in in m where V in is the voltage at the noninverting input, V in is the voltage at the inverting input, and g m is the transconductance of the amplifier. The transconductance of OTA can be adjusted by the resistor R 12. The output current of the OTA enters the inductor L 2 to be converted to a voltage that is similar to the voltage across the compensating reactor. This voltage obtains as: V sl g V O2 6 m in The cascade transistors act as a buffer to diminish loading effects on the next circuits. A first order filter is placed at the final stage of circuit to eliminate the DC component of voltage. To produce the replica voltage of the compensating reactor, parameters L 2 and g m should be selected so that the following equation is satisfied: 1 sl g sl a 6 m eq D. Distortionfree Voltage The voltage emulator circuits create voltages that can be used to improve the CVT response. Adding these voltages to the CVT voltage makes a distortionfree waveform which is similar to the CVT input voltage. Fig. 5 shows an adder circuit. In case all resistances are equal, the final voltage is obtained as: VFinal Vo1 Vo2 VCVT (3) (4) (5) (6) (7) B. W. = 13 Hz B. W. = 2.8 khz Frequency (Hz) Fig. 5. Frequency response of the ordinary and modified CVTs with AFSC Fig. 6. CVT response with AFSC and zero crossing fault voltage temporal waveform fundamental component voltage Fig. 7. CVT response with AFSC and peak crossing fault voltage temporal waveform fundamental component voltage

5 Fundamental Component of Fundamental Component of gain, db نهمین کنفرانس تخصصی حفاظت و کنترل سیستم های قذرت This circuit has low output impedance which minimizes the voltage drop on the burden. Moreover, the OpAmp U 5 supplies the required current of the burden. So, it reduces voltage drop across the series components such as divider capacitor and compensating reactor. IV. SIMULATION RESULTS The designed circuit can generate a realtime voltage which is proportional to the transients created by the CVT. Adding this voltage to the CVT voltage results a distortionfree waveform that can be applied to the burden. It not only improves the CVT dynamic response, but also the steady state response and the frequency response. A CVT model according to Fig. 1 is applied to evaluate the proposed method in correcting the CVT response. The parameters and their values are presented in Table 1. PSpise software which is able to produce precise transient waveforms is used to simulate CVT behavior. Two kinds of ferroresonance suppression circuit with two different fault angles are selected and voltage waveforms of the ordinary CVT and the modified CVT are studied. Finally, the efficiency of the proposed method in correcting the CVT response is compared to the dynamic compensation method [15]. A. Active Ferroresonance Suppression Circuit A typical Active ferroresonance suppression circuit (AFSC) is comprised of a 9 F capacitance in parallel with an 11.3 mh inductance which all of them are in series with a 1.93 Ω resistance. Frequency response of the modified CVT and the ordinary CVT is plotted in Fig. 6. It is obvious that the ordinary CVT has an ideal characteristic just at the vicinity of fundamental frequency. On the other hand, the frequency response of the modified CVT is smooth for a wider range. The bandwidth of the modified CVT is 2.8 khz while the bandwidth of the ordinary CVT is only 13 Hz. Fig. 7a shows the voltage of the modified and ordinary CVTs in a system with SIR=5 and a zero crossing fault. The compensating voltage is also depicted in the figure. This voltage is the reverse of the CVT generated transients. Thus, adding it to the ordinary CVT output, results a correct response. The decaying transients last more than two cycles. Fig. 7b presents the fundamental component voltage of both modified and ordinary CVTs. As it can be seen the fundamental component of the ordinary CVT voltage is underestimated for one cycle and overestimated for another cycle. It has an error of 88%. On the other hand, the fundamental component of modified CVT after fault is very close to the final value and has an error of 4.5%. Fig. 8a shows the temporary response of the ordinary and modified CVTs in accompany with the compensating voltage for a system with SIR=5 and peak crossing fault. The transients last more than two cycles. During this time, the ordinary CVT voltage undergoes sever distortions. However, the modified CVT exhibits a dynamic response very close to the ideal response B. W. = 2.8 khz B. W. = 6.9 khz frequency, Hz Fig. 8. Frequency response of the ordinary and modified CVTs with PFSC Fig. 9. CVT response with PFSC and zero crossing fault voltage temporal waveform fundamental component voltage Fig. 1. CVT response with PFSC and peak crossing fault voltage temporal waveform fundamental component voltage

6 Fig. 8b demonstrates the fundamental component voltage of the ordinary and modified CVTs. The ordinary CVT has an error of 54% while the percentage error of the modified CVT is 9.2%. B. Passive Ferroresonance Suppression Circuit A passive ferroresonance suppression circuit (PFSC) is made of a nonlinear inductance in parallel with a resistor. Since in our studies applied voltage to the CVT is under the rated voltage, the nonlinear inductance lies at its linear region. The typical values of the inductance and resistance are.94 H and 35 Ω, respectively. Frequency response of the ordinary CVT and the modified CVT equipped with PFSC are plotted in Fig. 9. The modified CVT has a smoother frequency response especially for subharmonic frequencies. The modified CVT has a 6.9 khz bandwidth while the bandwidth of the ordinary CVT is about 2.8 khz. Fig. 1a depicts the voltages of the modified and ordinary CVT in a system with SIR=5 and zero fault angle. This figure also presents the compensating voltage which should be added to the ordinary CVT voltage to produce a distortionfree voltage. Compare to the AFSC, the PFSC produces less distortion on the CVT output. The fundamental components of the ordinary and modified CVT are plotted in Fig. 11b. Both of these components are close to the final value. The percentage error of the ordinary CVT and the modified CVT are 16% and 1.7%, respectively. The waveforms of the modified and ordinary CVTs for a peak crossing fault at time.1 second are plotted in Fig. 11a. The ordinary CVT has a decaying DC voltage component. Its voltage waveform has very low distortion. The fundamental component of voltage for both ordinary and modified CVTs is shown in Fig. 11b. The percentage error of the ordinary CVT and the modified CVT are 3% and 1.2%, respectively. Table 2 compares the efficiency of the proposed method with dynamic compensating method [15] for a zero crossing fault and various SIRs. The dynamic compensating method is restricted to the CVTs equipped with passive ferroresonance suppression circuit though CVTs equipped with active ferroresonance suppression circuit create more distortion in their voltage waveform. This table also presents the percentage error of noncompensated CVT. The SIR of a system plays an important role on the CVT dynamic response. As it increases, the amount of distortions on the CVT output rises and consequently the percentage error intensifies. The dynamic compensating method can diminish CVT error to some extent. However, in the high SIR conditions, the error is considerable. The proposed method can excellently cope with the CVT transients and improves its dynamic and steady state responses. V. CONCLUSION Dynamic response of capacitive voltage transformers after a fault in power system may lead protective relays to trip incorrectly. Decaying transients that emerge at the CVT output may change the voltage of fundamental frequency component. In this paper, a novel compensating method for reducing CVT error is presented in detail and is evaluated. The proposed method can remove transients from CVT output under different conditions. Some advantages of this method include: The proposed method can eliminate CVT transients whether low frequency or high frequency components. The modified CVT voltage is nearly a replica of its input voltage. CVT error is reduced for various SIRs and fault angles. CVT bandwidth is considerably increased. This method does not impose any time delay on CVT response which is desirable for realtime applications. The proposed method is independent of load and FSC characteristics. This method is more efficient than the dynamic compensating method. VI. APPENDEX TABLE I CVT CIRCUIT PARAMETERS [15] Parameter C 1 C 2 L R C T1 L T1 R T1 L m R Fe L T2 R T2 L 1 R 1 R 2 R L value 2.2 nf 37.8 nf H 7.95 kω.5 nf 1.2 H 1.4 kω 5 kh 1 MΩ.125 mh.125 Ω.94 H 35 Ω 445 Ω 14.6 Ω.82 H

7 SIR TABLE II PERCENTAGE ERROR OF CVT FOR TOW DIFFERENT COMPENSATING METHODS Ordinary CVT Dynamic Compensating Method The Proposed Method REFERENCES [1] D. Costello, and Z. Karl, "CVT transients revisited Distance, directional overcurrent, and communicationsassisted tripping concerns." In Protective Relay Engineers, th Annual Conference for, pp IEEE, 212. [2] M. SanayePasand, R. Aghazadeh, Capacitive voltage substations ferroresonance prevention using power electronic devices, International Conference on Power System Transients IPST, 23, New Orleans, USA. [3] P. Sakarung, S. Chatratana, Application of PSCADEMTDC and chaos theory to power system ferroresonanace analysis, International Conference on Power System Transients IPST, 25, Montreal, Canada. [4] A. Villa and Z. Romero, Failure analysis of CVT from substations EL Tablazo and Cuatricentenario up 4 kv, International Conference on Power System Transients IPST, 25, Montreal, Canada. [5] J.R. Lucas, P.G. McLaren, W.W.L. Keerthipala, R.P. Jayasinghe, Improved Simulation Models for Current and Voltage Transformers in Relay Studies, IEEE Trans. Power Deliv., vol.7 n. 1, 1992, pp [6] Working group C5 of the systems protection subcommittee of the IEEE power system relaying committee, Mathematical Models for Current, Voltage, and Coupling Capacitor Voltage Transformers, IEEE Trans. Power Deliv., vol. 15 n. 1, 2, pp [7] M. Kezunovic, C. W. Fromen, S. L. Nilsson, Digital Models of Coupling Capacitor Voltage Transformers for Protective Relay Transient Studies, IEEE Trans. Power Deliv., vol. 7 n. 4, 1992, pp [8] J.R. Marti, L.R. Linares, H.W. Dommel, Current Transformers and Coupling Capacitor Voltage Transformers in Realtime Simulations, IEEE Trans. Power Deliv., vol.12 n. 1, 1997, pp [9] L.J. Kojovic, M. Kezunovic, C.W. Fromen, A New Method for the CCVT Performance Analysis using Field Measurements, Signal Processing and EMTP Modeling, IEEE Trans. Power Deliv., vol. 9 n. 4, 1994, pp [1] E. Pajuelo, G. Ramakrishna, M.S. Sachdev, An improved voltage phasor estimation technique to minimize the impact of CCVT transients in distance protection, Canadian Conference on Electrical and Computer Engineering, 25. [11] Y.C. Kang, T.Y. Zheng, S.W. Choi, Y.H. Kim, Y.G. Kim, S.I. Jang, S.H. Kang, Design and Evaluation of a Compensating Algorithm for the Secondary Voltage of a Coupling Capacitor Voltage Transformer in the Time Domain, IET Gener. Transm. Distrib., vol. 3 n. 9, 28, pp [12] H. Khorashadi Zadeh, and L. Zuyi, "A compensation scheme for CVT transient effects using artificial neural network." Electric Power Systems Research 78, no. 1 (28): 338. [13] D. Hou and J. Roberts, Capacitive voltage transformer: transient overreach concerns and solutions for distance relaying, Canadian Conference on Electrical and Computer Engineering, IEEE, 1996, pp [14] H.B. Siguerdidjane, J. Gaonach, and N. LeRohellec, Application of digital power simulators: advantages, Proceedings of First International Conference on Digital Power System Simulators, College Station, pp.83 87, April 1995, TX, USA. [15] J. Izykowski, B. Kasztenny, E. Rosolowski, M.M. Saha, B. Hillstrom, Dynamic Compensation of Capacitive Voltage Transformers, IEEE Trans. Power Deliv., vol. 13 n. 1, Jan 1998, pp [16] Y. Li, Y. Po, Z. Zheyuan, Z. Wei, and P. Zhuo. "Analysis on the Influence Factors of Capacitor Voltage Transformer Dielectric Loss Measurement." Energy and Power Engineering 5, 213. [17] Zhiyuan, Yuan, and Z. Wei. "Research on the capacitor voltage transformer measurement error under harmonic environment." In Chinese Automation Congress (CAC), pp. 1419, 213. [18] Transient Response of Coupling Capacitor Voltage Transformers IEEE Committee Report, IEEE Trans. Power Apparatus and Systems, vol. PAS1 n. 12, Dec 1981, pp