Novel Multilevel Inverter Carrier-Based PWM Method

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1 98 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 5, NO. 5, SEPTEMBER/OCTOBER 999 Novel Multilevel Inverter Carrier-Based PWM Method Leon M. Tolbert, Senior Meber, IEEE, and Thoas G. Habetler, Senior Meber, IEEE Abstract The advent of the transforerless ultilevel inverter topology has brought forth various pulse width odulation (PWM) schees as a eans to control the switching of the active devices in each of the ultiple voltage levels in the inverter. An analysis of how existing ultilevel carrier-based PWM affects switch utilization for the different levels of a diode-claped inverter is conducted. Two novel carrier-based ulti-level PWM schees are presented which help to optiize or balance the switch utilization in ultilevel inverters. A kw prototype six-level diode-claped inverter has been built and controlled with the novel PWM strategies proposed in this paper to act as a voltage source inverter. Index Ters Carrier-based pulsewidth odulation, diodeclaped inverter, ultilevel converter, ultilevel inverter, ultilevel pulse width odulation. I. INTRODUCTION Multilevel pulse width odulation (PWM) inverters have been developed to overcoe shortcoings in solid state switching device ratings so that large otors can be controlled by high-power adjustable frequency drives. The ost popular structure proposed as a transforerless voltage source inverter is the diode claped converter based on the neutral point converter proposed by Nabae []. A three-phase 6-level diode-claped inverter is shown in Fig.. The two ultilevel PWM ethods ost discussed in the literature are ultilevel carrier based PWM and ultilevel space vector PWM; both are extensions of traditional twolevel PWM strategies to several levels. Investigators have proposed carrier-based ultilevel sine-triangle PWM schees for control of a ultilevel diode claped inverter used as a otor drive or static var copensator []-[9]. Others have generalized space vector PWM theory for use with ultilevel inverters []-[]. A third PWM ethod used to control a ultilevel diode claped converter is with selective haronic eliination []-[4]. While the ultilevel PWM techniques developed thus far have been extensions of two-level PWM ethods, the ultiple levels in a diode-claped inverter offer extra degrees of freedo and greater possibilities in ters of device Paper IPCSD 998, presented at the 998 IEEE Industry Applications Society Annual Meeting, St. Louis, MO, October -6, and approved for publication in the IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS by the Industrial Power Converter Coittee of the IEEE Industry Applications Society. Manuscript released for publication March 8, 999. L. M. Tolbert is with the Oak Ridge National Laboratory, Oak Ridge, TN USA (e-ail: tolbertl@ornl.gov). T. G. Habetler is with the School of Electrical and Coputer Engineering, Georgia Institute of Technology, Atlanta, GA -5 USA (e-ail: to.habetler@ece.gatech.edu). Publisher Ite Identifier S (99)56-. Vdc V6 C5 C4 V4 V5 C V C V C V D4 D D D D D D D4 Sc5 Sc4 Sc Sc Sc D4 Sc'5 Sc'4 Sc' Sc' Sc' D D utilization, state redundancies, and effective switching frequency. In this paper, novel carrier-based ultilevel PWM schees are presented which take advantage of the special properties available in ultilevel inverters to iniize switch utilization and/or balance the switching duty aong its various levels. II. EXISTING MULTILEVEL CARRIER-BASED METHODS A. Subharonic PWM Method D Sb D4 Other authors have extended two-level carrier based PWM techniques to ultilevel inverters by aking the use of several triangular carrier signals and one reference signal per phase. Carrara [] developed ultilevel subharonic PWM (SH-PWM) as follows. For an -level inverter, - carriers with the sae frequency f c and sae peak-to-peak aplitude A c are disposed such that the bands they occupy are contiguous. The reference, or odulation, wavefor has peak-to-peak aplitude A and frequency f, and it is centered in the iddle of the carrier set. The reference is continuously copared with each of the carrier signals. If the reference is greater than a carrier signal, then the active device corresponding to that carrier is switched on; and if the reference is less than a carrier signal, then the active device corresponding to that carrier is switched off. In ultilevel inverters, the aplitude odulation index, a, and the frequency ratio, f, are defined as D D D4 D Sb5 Sb4 Sb Sb Sb'5 Sb'4 Sb' Sb' Sb' Fig.. Circuit diagra of a three-phase 6-level diode claped inverter. D D D D D D D4 Sa5 Sa4 Sa Sa Sa Sa'5 Sa'4 Sa' Sa' Sa' VLa VLb VLc /99$. 999 IEEE

2 99 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 5, NO. 5, SEPTEMBER/OCTOBER Fig.. Multilevel carrier-based SH-PWM showing carrier bands, odulation wavefor, and inverter output wavefor ( 6, f, a.8). Fig.. Multilevel carrier-based SFO-PWM showing carrier bands, odu-lation wavefor, and inverter output wavefor (6, f, a.8). a A ( ) f A c, () f c. () f Carrara also considered different ethods of disposing the any carrier bands required in ultilevel PWM. The three cases he considered for an inverter with an odd nuber of levels were as follows: ) alternative phase opposition disposition where each carrier band is shifted by 8 fro the adjacent bands; ) phase opposition disposition where the carriers above the zero reference are in phase but shifted by 8 fro those carriers below the zero reference; ) in-phase disposition where all the carriers are in phase (further exaination of in phase disposition is given in this paper). Fig. shows a set of carriers ( f ) with all of the carriers in phase for a six-level diode-claped inverter and a sinusoidal reference voltage with a.8. The resulting output voltage of the inverter is also shown in Fig.. B. Switching Frequency Optial PWM Method Steinke [] proposed a carrier-based ethod tered switching frequency optial PWM (SFO-PWM) which was siilar to Carrara s except that a zero sequence (triplen haronic) voltage is added to each of the carrier wavefors. This ethod takes the instantaneous average of the axiu * * * and iniu of the three reference voltages (V, V, V ) a b c and subtracts this value fro each of the individual reference voltages to obtain the odulation wavefors, i.e., ( Va * Vb * Vc * ) + ( Va * Vb * Vc * ) ax,, in,, Voffset * * V V V, a SFO a offset * * bsfo b offset * * c SFO c offset, () V V V, (4) V V V. SFO-PWM is illustrated in Fig. for the sae reference voltage wavefor that was used in Fig.. The resulting output voltage of the inverter is also shown in Fig.. The Va * Vb * Vc * SFO-PWM technique can only be used for three-phase threewire systes, and it enables the odulation index to be increased by 5% before overodulation, or pulse dropping, occurs. The addition of this triplen-offset voltage continuously centers all of the three reference wavefors in the carrier band, which Holes [5] showed for carrier-based two-level PWM is siilar to using space vector PWM with the zero voltage state divided evenly at the beginning and end of each half carrier interval. The analog equivalent of () and (4) is shown in Fig. 4 [6]. III. CARRIER PHASE ANGLE EFFECT ON SWITCHING Previously, Menzies [5] considered two siple cases of what effect the displaceent phase angle φ, between the odulation wavefor (sinusoidal reference) and the set of carrier wavefors, has on the switching of the active devices and the unfiltered inverter output wavefor distortion where V * a R R V cos( θ φ ). (5) The two cases considered were: ) the carrier is a axiu when the reference is a axiu (φ ), referred to as a W-type carrier set and ) the case where the carrier is a iniu when the reference is a axiu, referred to as a M-type carrier set. In this paper, all displaceent phase angles were considered. The displaceent phase angle between the reference and carrier set was varied increentally by. radians fro to π/ radians ( degrees) to see what effect this would have on the total switchings of the R Va + - * SFO Vb * SFO Vc * SFO Fig. 4. Analog equivalent circuit for SFO-PWM zero sequence addition.

3 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 5, NO. 5, SEPTEMBER/OCTOBER (a) SH-PWM, f, a.8, φ. rad, N sw 4 (a) SFO-PWM, f, a.8, φ. rad, N sw (b) SH-PWM, f, a.8, φ. rad, N sw 8 (b) SFO-PWM, f, a.8, φ.8 rad, N sw (c) SH-PWM, f, a.8, φ.8 rad, N sw 4 (c) SFO-PWM, f, a.8, φ. rad, N sw (d) SH-PWM, f, a.8, φ. rad, N sw 46 (d) SFO-PWM, f, a.8, φ. rad, N sw (e) SH-PWM, f, a.8, φ.5 rad, N sw 5 (e) SFO-PWM, f, a.8, φ.5 rad, N sw Fig. 5. Output voltage wavefors for a 6-level inverter controlled with SH-PWM for various phase angles φ. Fig. 6. Output voltage wavefors for a 6-level inverter controlled with SFO-PWM for various phase angles φ.

4 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 5, NO. 5, SEPTEMBER/OCTOBER 999 TABLE I NUMBER OF MAIN DEVICE SWITCHINGS IN EACH LEVEL FOR FIG. 5 AND LINE-LINE VOLTAGE THD FOR RD - 9 TH HARMONICS Phase Switches/Cycle (SH-PWM, 6, f, a.8) % V ab Angle, φ Sa S a S a S a4 S a5 N THD sw.rad %.rad %.8rad %.rad %.5rad 5 5.7% Voltage (p.u.) TABLE II NUMBER OF MAIN DEVICE SWITCHINGS IN EACH LEVEL FOR FIG. 6 AND LINE-LINE VOLTAGE THD FOR RD 9 TH HARMONICS Phase Switches/Cycle(SFO-PWM, 6, f, a.8) % V ab Angle, φ Sa S a S a S a4 S a5 N THD sw.rad %.8rad %.rad %.rad %.5rad.9% active devices and the output wavefor distortion. In Fig. 5, an exaple of controlling a 6-level inverter with the SH-PWM ethod, with a.8 and f, shows that the total nuber of switchings (active device transition fro on-to-off or off-to-on), N sw, during a odulation cycle, /f, can vary between 4 and 5 depending on the phase angle of the reference. Although the wavefors are not quarter-wave syetric for soe values of φ, the wavefors are always half-wave syetric regardless of the displaceent angle. Note that in a traditional two-level inverter with a single carrier wave, N sw 4 for f regardless of the displaceent phase angle and for all values of a <. Table I shows the nuber of switchings at each level of the diode-claped inverter for the exaples shown in Fig. 5. The upper and lower ain device pairs (S a - S a, S a5 - S a 5, in a 6-level inverter), in general, are switched ore often than the interediate switches for carrier-based control where each level has the sae carrier frequency and all levels of the inverter are being used ( a >.6 in a 6-level inverter). Table I also shows the line-line voltage total haronic distortion (THD) for the rd through 9 th haronics for the exaples shown in Fig. 5. In Fig. 6, an exaple with a 6-level inverter with the SFO- PWM ethod and the sae paraeters as Fig. 5 shows that the total nuber of switchings can vary between and 46. Table II shows the nuber of switchings at each level of the inverter for the exaples represented in Fig. 6. Again, and even ore draatically, the upper and lower ain device pairs are switched ore often than the interediate switches. Table II also shows the line-line voltage total haronic distortion (THD) for the rd through 9 th haronics for the exaples shown in Fig. 6. Fig. 7 shows the frequency spectru for the unfiltered output phase voltage shown in Fig. 5(a) (φ. rad, N sw 4) and Fig. 5(e) (φ.5 rad, N sw 5). Fro these Phase Voltage (p.u.) (a) V an, SH-PWM, f, a.8, φ. rad, N sw frequency spectrus, one can see that the doinant haronic in the phase voltage ( st ) is the carrier ratio f. The frequency spectrus for line-line voltages are also shown in Fig. 7. One should note that no haronic coponent exists at the carrier ratio in the line-line voltage (b) V ab, SH-PWM, f, a.8, φ. rad, N sw (c) V an, SH-PWM, f, a.8, φ.5 rad, N sw (d) V ab, SH-PWM, f, a.8, φ.5 rad, N sw Fig. 7. Frequency spectru of unfiltered output phase and line-line voltage wavefors. (a) fro Fig. 5(a), (c) fro Fig. 5(e).

5 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 5, NO. 5, SEPTEMBER/OCTOBER 999 One can also see that the only difference in the frequency spectru for the two different displaceent angles is in the agnitude of the haronics whose order is above the carrier ratio ( f ). The agnitude of the haronics whose order is below the carrier ratio is nearly identical for the two cases. An algorith was written to count the total nuber of switchings during a odulation cycle with varying values of φ for f fro 9 to 9 for the SH-PWM and SFO-PWM cases for values of a between.5 and.5 and for 6. Soe interesting observations have been gleaned fro these siulations. ) If the carrier ratio f is a ultiple of 6, the phase angle between the carrier and reference generally has no effect on the total nuber of switchings, i.e., N sw does not vary with φ (N sw f for this case). ) If the carrier ratio f is even (ultiple of ), then the axiu nuber of switchings for a odulation cycle is f and N sw f -j where j,,, (exact values for j depend on a and the carrier ratio f ). ) If the carrier ratio f is odd, then the axiu nuber of switchings for a odulation cycle is greater than f and N sw f +4j where j -, -,,, (exact values for j depend on a and the carrier ratio f ). 4) The nuber of switchings per odulation cycle are a function of the aplitude odulation index, the carrier ratio, and the displaceent phase angle. At lower aplitude odulation indices ( a <.6 in a 6-level inverter with SH-PWM), soe levels go unused [8]. These points show a ajor difference between two-level PWM and ultilevel PWM. In two-level PWM, the switching frequency is always equal to the carrier frequency for odulation indices less than unity. In ultilevel PWM, the switching frequency can be less than or greater than the carrier frequency and is a function of the displaceent angle between the carrier set and the odulation wavefor. By choosing a phase displaceent angle that iniizes the nuber of active device switchings for a particular a and f, switching losses can be reduced by as uch as 5%, which increases the efficiency of the inverter considerably. Another possible phase shifting ethod not yet explored is to shift each of the carrier bands relative to one another instead of shifting the whole carrier band set relative to the odulation wavefor. IV. VARIABLE FREQUENCY CARRIER BANDS A ethod that could control or at least predict the nuber of switchings that occur at each level in a ultilevel inverter would be advantageous. To accoplish this objective in a ultilevel voltage source inverter that has a sine wave reference, knowledge of how long the reference dwells in each of the carrier tie bands is required. The following section details how this inforation is obtained. voltage (p.u.) voltage (p.u.) tband tband t t t t t 4 t / π/ tband tband (a) In carrier based ultilevel PWM, the nuber of carrier bands is one less than the nuber of voltage levels as shown in Fig. 8(a) for an inverter with an odd nuber of bands (even nuber of levels) and in Fig. 8(b) for an inverter with an even nuber of bands (odd nuber of levels). For a sine wave odulation (reference) wavefor centered in the carrier bands (SH-PWM), the duration of tie that the wavefor exists during each of the bands occupied can be coputed as follows. Using the aplitude syetry of the sinewave about the tie axis, the band crossing ties t n, where the reference wavefor crosses fro one band to an adjacent band, for bands above (or containing the zero axis in the case that is even) can be coputed fro (6). n od tn arcsin, n,,,... a ( ), (6) where od(x/y) is the odulus operator. Also noting that the sinewave has a axiu aplitude at π/, this is set equal to t. Fro (6), the band dwell ties in radians (starting at the band adjacent to the zero axis in the case that is odd or the band occupying the zero axis in the case that is even) are then calculated: ( ) tband t t, where n,,,..., n n+ n band band - band - band tie (radians) band band band tband - tband - tband odd nuber of carrier tie bands ( is even) tband tband t t t t t / π/ tband band - band - band tie (radians) band band band tband - tband - tband (b) even nuber of carrier tie bands ( is odd) Fig. 8. SH-PWM reference dwell ties for individual carrier bands.. (7) A. SH-PWM

6 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 5, NO. 5, SEPTEMBER/OCTOBER 999 nuber of switchings per band, N swn, and the frequency ratio, fn, for each band n of an inverter is approxiately given as follows: - f n π N tband swn n π N ( t t ) n + swn n. (9) Phase Voltage (p.u.) - (a) carriers, reference, and inverter phase voltage wavefor (b) phase voltage haronic spectru (c) line-line voltage haronic spectru Fig. 9. SH-PWM where carriers have different frequencies ( f 9 for Band, Band -; f 4 for Band, Band -; f 49 for Band ). Because of the syetry of the sinewave about the zero axis, the bands below the zero axis are siply tband n tbandn. (8) The nuber of switchings per odulation cycle at each level of the inverter is dependent on the carrier frequency for that level and the duration of tie that the reference wavefor dwells within the level s corresponding tie band. If the carrier frequency for all of the levels is identical, the top and botto levels will have any ore switchings than the interediate levels as shown in the previous section. One ethod to balance the nuber of active switchings aong the levels is to vary the carrier frequency of each band based on the tie duration that the reference wavefor dwells during the tie band. The relationship between the Fro (9) and solutions to (7) and (8), the frequency ratio fn for each band can be set such that each of the levels in the inverter has approxiately the sae nuber of active device switchings per cycle, i.e., N swn is the sae for all levels. Fig. 9 shows an exaple of the carrier waves and resulting output phase voltage fro this control where N swn has been set to 4. Haronic spectra for the phase voltage and line-line voltage are also shown in Fig. 9. B. SFO-PWM To control the nuber of switchings in a ultilevel inverter that is using SFO-PWM, different equations are needed to calculate the tie duration that a sine wave reference wavefor with zero sequence addition dwells in each band. Fig. (a) shows the carrier bands and reference wavefor for ultilevel SFO-PWM control. Fro this figure, one can see that the odulation wavefor contains two segents that can be closely approxiated as straight lines. Each of these line segents have a horizontal tie duration of π/ radians and a vertical aplitude of.75 a (-). Using the properties of proportional triangles fro the enlarged area shown in Fig. (b), the following equations result: tband ( ) t int. 75 line a ( ), and () π. 75 ( ) n a tline tband n int. 75 ( ), () ( ) a ( 75 ) int. a ( ) where n,,,,. The two hups at the top and botto of the SFO-PWM odulation wavefor each have a tie duration of π/ radians. Considering the case where the two hups are wholly contained within a tie band, the tie duration that the odulation wavefor dwells within these two bands can be given as π π tband n+ tband ( n+ ) + tline, () where n is the axiu value used in (). Once the duration of dwell tie for each of the carrier bands is known, (9) can be used to balance the nuber of switchings per odulation cycle aong the levels of the inverter.

7 4 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 5, NO. 5, SEPTEMBER/OCTOBER 999 voltage (p.u.) band - band - band band band band π/6 π/ 5π/6 7π/6 π/6 π tie (radians) (a) band band.75* a *(-) band - int(.75* a *(-) band - Fig.. Prototype 6-level, kw back-to-back diode claped converter. tband tband tband - tband - t line π/ (b) Fig.. Carrier bands for a 7-level inverter with SFO-PWM. (a) Modulation wavefor and carrier bands. (b) Expanded view of straight segent. - - Fig.. SFO-PWM where carriers have different frequencies ( a.85, f 5 for top and botto bands, f 55 for interediate bands, φ.). Fig. shows SFO-PWM where carriers have different frequencies for the interediate bands ( f 5) and the top and botto bands ( f ) so that each level has switchings per cycle. This exaple illustrates that balancing the switchings at each level of the inverter when using SFO- PWM requires a large difference between the frequency of the carrier bands that contain the two hups and the carrier bands that intercept only the straight line portion of the odulation wavefor. V. HARDWARE IMPLEMENTATION A 6-level three-phase back-to-back kw converter prototype, pictured in Fig., has been built for operation at a line voltage of 8V for use as an adjustable speed drive for an induction otor [7-8]. The active switching devices used for the converter were V, A MOSFETs. Each internal dc level of the converter had a capacitance of 6.7 F. A table of switching patterns, which correspond to different aplitude odulation indices and can be optiized for the fewest switches per cycle by deterining the phase displaceent angle to use at each aplitude odulation index, was calculated off-line and stored in a digital signal processor controller as 4 states per cycle. A constant voltage/frequency control technique was applied to the otor drive syste. As a user interface, a potentioeter was adjusted to apply an external V signal to the controller. The V signal apped directly to a 6 Hz fundaental frequency for the gate signals sent to the inverter. Also, the switching patterns corresponding to the various odulation indices were apped fro the V external control signal. The inverter was used to drive a ¾ hp induction otor and was first controlled with SH-PWM with the following paraeters: a.95, f 5, and φ. rad. The inverter s output line-neutral voltage wavefors for all three phases are shown in Fig. (a), and the line-line voltage wavefor V ab and current wavefor I a are shown in Fig. (b). Fro the line-neutral wavefors, one can see that the top and botto active devices in each phase switch 4 ties per odulation cycle whereas the interediate devices only switch 6 ties per odulation cycle. The prototype inverter was also controlled using carrier bands with different carrier frequencies as discussed in section IV of this paper. Specifically, the top and botto bands had a frequency index of 7, while the next innerost bands had a frequency index of 7, and the center band had a frequency index of 4. The aplitude odulation index a.95, and φ. for this exaple. Fig. 4 shows the inverter s output line-neutral and line-line voltage wavefors and current wavefor when using this type of control ethod. All of the active devices in the inverter switch states either 8 or ties per odulation cycle.

8 5 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 5, NO. 5, SEPTEMBER/OCTOBER 999 V bn V an For this particular exaple, the control schee balanced the nuber of device switchings but slightly increased the distortion in the inverter s output voltage. However, because a sinusoidal line-line voltage is the desired wavefor for ost otor drives, an algorith can be written to deterine apriori the iniu haronic distortion for a given aplitude odulation index and desired switch utilization by cobining the procedures outlined previously in sections III and IV V cn (a) Line-neutral voltages, V an, V bn, V cn I a V ab (b) Line-line voltage, V ab, and current, I a (c) Haronic spectru for line-line voltage, V ab Fig.. Experiental voltage and current wavefors for ultilevel converter controlled with sae frequency carrier-bands. (SH-PWM, a.95, φ. rad, f 5 for all bands). The total haronic distortion of the line-line voltage wavefor in Fig. (b) is 4.6%, and no individual haronic coponent has a agnitude greater than.4% of the fundaental. The THD for the rd through 9 th haronic of the line-line voltage wavefor in Fig. 4(b) is 8.8%. Fro the haronic spectru shown in Fig. 4(c), the doinant haronics (5 th at 5.% and 9 th at 5.4%) are adjacent to the frequency index of 7. VI. CONCLUSION Multilevel carrier-based PWM offers any ore degrees of freedo than traditional two-level PWM. In ultilevel PWM, the switching frequency can be less than or greater than the carrier frequency and is a function of the displaceent phase angle between the carrier set and the odulation wavefor. By adjusting the displaceent phase angle in ultilevel PWM switching strategies, switching losses can be iniized for a ore efficient ultilevel inverter. In traditional subharonic PWM and switching frequency optial PWM, the top and botto switches are switched uch ore often than the interediate devices. A novel ethod to balance device switchings for all of the levels in a diode claped inverter has been deonstrated for SH-PWM and SFO-PWM by varying the frequency for the different triangle wave carrier bands. A 6-level back-to-back diode claped converter prototype has established that these novel carrier-based switching strategies can be used to enable better switch utilization. The need for an algorith to cobine the two procedures studied (changing the phase displaceent angle and varying the frequency of the carrier bands) has been identified. REFERENCES [] A. Nabae, I. Takahashi, and H. Akagi, A new neutral-point-claped PWM inverter, IEEE Trans. Industry Applications, vol. IA-7, no. 5, Sept. 98, pp [] J. K. Steinke, Control strategy for a three phase ac traction drive with a - level GTO PWM inverter, IEEE PESC 88, 988, pp [] G. Carrara, S. Gardella, M. Marchesoni, R. Salutari, G. Sciutto, A new ultilevel PWM ethod: A theoretical analysis, IEEE Trans. Power Electronics, vol. 7, no., July 99, pp [4] R. W. Menzies, P. Steier, J. K. Steinke, Five-level GTO inverters for large induction otor drives, IEEE Trans. Industry Applications, vol., no. 4, July 994, pp [5] R. W. Menzies, Y. Zhuang, Advanced static copensation using a ultilevel GTO thyristor inverter, IEEE Trans. Power Delivery, April 995, pp [6] Y. Chen, B. Mwinyiwiwa, Z. Wolanski, B. T. Ooi, Regulating and equalizing DC capacitance voltages in ultilevel STATCOM, IEEE Trans. Power Delivery, vol., no., April 997, pp [7] N. S. Choi, J. G. Cho, G. H. Cho, A general circuit topology of ultilevel inverter, IEEE PESC, 99, pp. 96. [8] N. S. Choi, G. C. Cho, G. H. Cho, Modeling and analysis of a static var copensator using ultilevel voltage source inverter, IEEE IAS Annual Meeting, 99, pp [9] V. G. Agelidis, M. Calais, Application specific haronic perforance evaluation of ulticarrier PWM Techniques, IEEE PESC, 998, pp

9 6 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 5, NO. 5, SEPTEMBER/OCTOBER 999 V bn V cn V an [] M. H. Ohsato, G. Kiura, M. Shioya, Five-stepped PWM inverter used in photovoltaic systes, IEEE Trans. Industrial Electronics, vol. 8, no. 5, Oct. 99, pp [4] G. Carrara, D. Casini, S. Gardella, R. Salutari, Optial PWM for the control of ultilevel voltage source inverter, Fifth Annual European Conference on Power Electronics, vol. 4, 99, pp [5] D. G. Holes, The significance of zero space vector placeent for carrier based PWM schees, IEEE IAS Annual Meeting, 995, pp [6] S. Bhattacharya, D. G. Holes, D. M. Divan, Optiizing three phase current regulators for low inductance loads, IEEE IAS Annual Meeting, 995, pp [7] L. M. Tolbert, F. Z. Peng, and T. G. Habetler, Multilevel converters for large electric drives, IEEE Trans. Industry Applications, vol. 5, no., Jan./Feb. 999, pp [8] L. M. Tolbert, F. Z. Peng, and T. G. Habetler, Multilevel PWM Methods at Low Modulation Indices, IEEE APEC 99, 999, pp. 9. (a) Line-neutral voltages, V an, V bn, V cn V ab Leon M. Tolbert (S 88-M 9-SM 98) received the B.E.E. and M.S. degrees in electrical engineering in 989 and 99, respectively fro the Georgia Institute of Technology, Atlanta, where he is currently a Ph.D. candidate. He joined the Engineering Division of Lockheed Martin Energy Systes in 99 and has worked on several electrical distribution projects at the three U.S. Departent of Energy plants in Oak Ridge, TN. Since 997 he has been a Research Engineer in the Power Electronics and Electric Machinery Research Center at the Oak Ridge National Laboratory. He has published several technical papers in the areas of power quality, ultilevel converters, and otor drives. Mr. Tolbert was the co-recipient of the 99 Second Prize Paper Award of the Industrial Drives Coittee of the IEEE Industry Applications Society. He is a Registered Professional Engineer in the State of Tennessee I a (b) Line-line voltage, V ab, and current, I a Thoas G. Habetler (S 8-M 8-SM 9) received the B.S.E.E. and M.S. degrees in electrical engineering fro Marquette University, Milwaukee, WI, and the Ph.D. degree fro the University of Wisconsin, Madison, in 98, 984, and 989, respectively. Fro 98 to 985, he was with the Electro-Motive Division, General Motors Corporation, as a Project Engineer. While there, he was involved in the design of switching power supplies and voltage regulators for locootive applications. He is currently an Associate Professor of Electrical Engineering, Georgia Institute of Technology, Atlanta. His research interests are in switching converter technology and electric achine protection and drives. Dr. Habetler was co-recipient of the 989 First Prize Paper Award and the 99 Second Prize Paper Award of the Industrial Drives Coittee, and the 994 Second Prize Paper Award of the Electric Machines Coittee of the IEEE Industry Applications Society. He serves as Publications Chair of the IEEE Power Electronics Society. (c) Haronic spectru for line-line voltage, V ab Fig. 4. Experiental voltage and current wavefors for ultilevel converter controlled with variable frequency carrier-bands. (SH-PWM, a.95, φ. rad, f 7 for top and botto bands, f 7 for interediate bands, f 4 for center band). [] M. Fracchia, T. Ghiara, M. Marchesoni, M. Mazzucchelli, Optiized odulation techniques for the generalized N-level converter, IEEE PESC, 99, pp. 5. [] H. L. Liu, G. H. Cho, Three-level space vector PWM in low index odulation region avoiding narrow pulse proble, IEEE Trans. Power Electronics, vol. 9, no. 5, Sept. 994, pp [] G. Sinha, T. A. Lipo, A four level rectifier-inverter syste for drive applications, IEEE IAS Annual Meeting, 996, pp

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