SHENZHEN TENA ELECTRONICS CO., LTD. TNJ8324 PFY MINI PRODUCT SPECIFICATION FOR RF IN THE LCD TV MULTI-MEDIA ENVIRONMENT CUSTOMER APPROVAL

Transcription

1 MINI FOR RF IN THE LCD TV MULTI-MEDIA ENVIRONMENT CUSTOMER APPROVAL A Original Release REV. DATE SIGN Desktop Video tuner system DRAWING NO. APPROVAL CHECK DESIGN DATE DATE DATE REVISIONS. S TOTAL 2

2 2 NO ITEM GENERAL Supply Voltage Control system Tuning System IF System Receiving System Receiving Channels True 5Vdevice (low power dissipation) I 2 C bus control of tuning, address selection AFC status information PLL controlled tuning True synchronous PLL vision IF demodulator Systems PAL B/G,D/K,I, SECAM B/G,D/K, NTSC M/N Full frequency range BAND CHANNELS (MHz) VHF LOW VHF HIGH UHF Intermediate Frequency SYSTEM FREQUENCY(MHz) B/G D/K. I M/N Picture Colour Sound Sound Antenna Input Impedance Output Impedance Weight Connection VHF/UHF: 75 ohm unbalanced Demodulator Video output: AF Sound output Approximate: 2 grams Antenna :pin SYMBOL PIN VOUT Composite Video Baseboard signal output AOUT 2 AF sound output AFT 3 AFT OUT RF AGC 4 RF AGC 4.V IN(factory section) +B 5 Supply Voltage : +5V SIF 6 SIF OUT SCL 7 I 2 C-bus Serial clock SDA 8 I 2 C -bus Serial data AS 9 I 2 C -bus address select BT Tuning Voltage (factory section) IF OUT IF signal output

3 3 NO ITEM Operating Temp RH Storage Temp Maximum Supply Voltage to terminal - to 9%: Standard 6% -2 SYMBOL PARAMETER PIN MIN TYP MAX UNIT VS Supply voltage V VS (ripple) Peak-to-peak ripple voltage susceptibility (at 5V+5%): 2Hz to KHz >KHz to 5KHz 5 2 mvp-p mvp-p Is Supply current 2 ma Vscl SCL-bus input Voltage V SDA-bus input Voltage V 8 ISDA SDA-bus current open collector + +5 ma VSDA VAS Address select Voltage V ZIF ZCVBS 2ndIF Sound output load impedance DC AC Compile Video Baseboard signal load impedance: DC AC K K TI Load dune constant ns VIF IF supply voltage V VIF (ripple) Peak-to-peak ripple voltage susceptibility (at 5V5%) 2Hz to KHz >KHz to 5KHz 2 mvp-p mvp-p IIF IF supply carnet ma ZAF AF Sound output load impedance DC AC 2..6 K K

4 NO 7 Overall performance ITEM SYMBOL PARMETER VALUE UNIT Tamp Ambient temperature RH Relative humidity % VS Supply voltage 5 V ZCVBS Video output load impedance 75 ZIF IF sound output load impedance >5 TPR Pre-heating tune: +5V at pin 4 mnule ZSAF Aerial source impedance unbalance ELECTRICAL CHARACTERISTICS NO ITEM 2 VSWR Min Typ Max Unit Condition 5 22 Vant Radiation ~.75GHz 46 db 23 Image rejection VHF low VHF high UHF 24 If rejection 6 db 25 /2 IF susceptibility off-air UHF 5 56 db 26 Cross modulation 7 db 27 OSC Voltage at all pins 8 db 28 OSC lock-in time 5 ms The Video signal-to-sound 29 interference ratio with the tuner exposed to sound dingles in the audio frequency range Hz to KHz and sound pressure levels up to 5dB 4 db 3 NO 3 Video and audio characteristics ITEM CVBS characteristics: Video amplitude signal at pin 8 DC level sync pulse at pin 8 Test Point Min Type.35 Ma x.2 db Uni t V V 75 Terminate Condition Notes Notes

5 5 NO ITEM Test Point MIN TYPE MAX UNIT CONDITION 32 Video amplitude drop with respect to modulation. MHz at Temp=45 At MHz At 2MHz At 3MHz At 4MHz At 4.43MHz db 33 Sound carrier rejection 4 db 34 CVBS S/N(outweighed) 44 db 35 Gain limited sensitivity at db reduction of Video output 3 db Audio characteristics: AF output level measured via LP 2KHz filter RMS detector 5 us de-emphasis THD measured via LP 2KHz filter RMS detector 5 us de-emphasis S/N measured via filter peak detector 5 us de-emphasis AF 3dB response measured via LP 2KHz filter RMS detector de-emphasis off V % db 2 6 KHz 38 AM suppression ratio 2 4 db 4 Digital AFC Status Parameter Conditions Frequency (KHz) Digital read-out Input voltage at ADC:. to.5 Vs -25 ADC word at I2C bus Input voltage at ADC :.5 to.3 Vs During read operation Input voltage at ADC:.3 to.45 Vs 2 Input voltage at ADC:.45 to.6 Vs Input voltage at ADC:.6 to. Vs Application information (I 2 C -bus date format) A detailed description of the I 2 C -bus specification with application, is gives in brochure the I 2 C -bus and how to use it,

6 ELECTRONICS CO., LTD 6 BYTE MSB DATA BYTE LSB COMMAND Address byte (ADB) MA MA A Divider byte (DB) N4 N3 N2 N N N9 N8 A Divider byte (DB2) N7 N6 N5 N4 N3 N2 N N A Control byte (CB) CP T2 T T RSA RSB A Ports byte (PB) X X X X BS4 BS3 BS2 BS A NOTE: 5 A = Acknowledge 52 Address selection Vs = +5V(PLL supply voltage) Voltage applied on as input MA MA Address to. Vs C default.2 to.3 Vs C2.4 to.6 Vs C4.9 to Vs C8 53 Divider ratio: N=6*{fRF(pc) + fif(pc)}, where (pc) is picture carrier and frf and fif are expressed in MHz. fosc=n/6(mhz) N=2 4 N4+2 3 N3+2 2 N N2+2 N+2 N 54 Ratio select bits 55 Band switching RSA RSB STEP SIZE X 5KHz 3.25KHz(for slow picture search) 62.5KHz(for normal picture search) BAND BITE X X X X BS4 BS3 BS2 BS Low band X X X X mid band X X X X High band X X X X NOTES:. X = don't care BS to BS4 are output ports on the PLL device. 2. BS3 is a system switch output for customer applications.

7 7 56 Control Byte CP=, Change pump current 6uA CP=, Change pump current 24uA(normal operation) 57 Test mode settings T2=T=; T= for normal operation. 58 Write mode Start-Adb-Ack-Db-Ack-Db2-Ack-cb-Ack-pb-Ack Stop. Start-Adb-Ack -cb-ack-pb-ack-db-ack-db2-ack Stop. Start-Adb-Ack-Db-Ack-Db2-Ack-cb-Ack Stop. Start-Adb-Ack-Db-Ack-Db2-Ack Stop. Where Start = start condition Adb = address byte Ack = acknowledge Db = divider byte Db2 = divider byte2 Cb = control byte Pb = ports byte Stop = stop condition 59 READ mode The in-lock can be to read by setting the R/W bit to logica. BYTE MSB DATA BYTE LSB COMMAND Address byte MA MA A Status byte POR FL A2³ A³ AO³ A NOTES. POR = Power on Reset, POR= at power-on. 2. FL = In-lock flag, FL=: loop is phase-locked. 3. A2 to A=digital outputs of the 5-level ADC. 4. A = Acknowledge. 5. READ mode. Start-Adb-Ack-STB-Ack-STROb2-stoping Ack form processor-end-of data. Start-Adb-Ack-STB-stoping Ack form processor-end-of data. Where STB = status bytes.

8 8 6 SIF /VIF I²C-CONTROL (TDA9885) Read format Table I²C-bus read format(slave transmits data) S BYTE A BRTE 2 AN P A6 A5 A4 A3 A2 A A R/W D7 D6 D5 D4 D3 D2 D D Slave address data Table 2 Explanation of Table SYMBOL FUNCTION S START condition, generated by the master Slave address (first MAD) R/W= Read command, generated by the master A Acknowledge bit, generated by the slave Date 8-bit data word, transmitted by the slave AN Acknowledge-not bit, generated by the master P STOP condition, generated by the master The master generates an acknowledge when it has received the data word READ. The master next generates an acknowledge, then slave begins transmitting the data word READ, and so on until the master generates an Acknowledge-not bit and transmits a STOP condition. 6.. SLAVE ADDRESS The first module address MAD is the standard address. For applications without I²C-bus:see Tables 4 and 5. Table 3 Data read register (status register) MSB BIT LSB D7 D6 D5 D4 D3 D2 D D AFCWIN RIFLEV AFC4 AFC3 AFC2 AFC PONR

9 TNJ8324 PFY 9 Table 4 Description of status register bits BIT VALUE AFCWIN AFC window VCO in.6 MHZ AFC window. note VCO out of.6 MHZ AFC window VIFLEV AFC4: PONR VIF input level High level; VIF input voltage 2Uv(typically) Low level Automatic frequency control See Table 5 Power-on reset After power-on reset or after supply breakdown After a successful reading of the status register Note. if no IF input is applied, then bit AFCWIN= due to the fact that the VCO is forced to the AFC window border for fast load-in behaviour. Table 5 Automatic frequency control; note BIT AFC4 AFC3 AFC2 AFC fvif (fp-87.5khz) Fp-62.5KHz Fp-37.5KHz Fp-2.5KHz Fp-87.5KHz Fp-62.5KHz Fp-37.5KHz Fp-2.5KHz Fp+2.5KHz Fp+37.5KHz Fp+62.5KHz Fp+87.5KHz Fp+2.5KHz Fp+37.5KHz Fp+62.5KHz (Fp+87.5KHz) Note.Fp is the nominal frequency of fvif.

10 TNJ8324 PFY 6.2 Write format Table 6 I²C- bus write format(slave receives data);note S BYTE A BYTE2 A BYTE3 A BYTE n A P R/W Bits7 to Bits 7 to A6 to A A7 to A Slave address sub address Data Data n Note. The auto-increment of the subaddress stops. if the subaddress is 3. Toble 7 Explanation of Table 6 SYMBOL FUNCTION S START condition, generated by the master Slave address R/W= Write command, generated by the master A Acknowledge bit, generated by the slave Subaddress(SAD) See Table 8 Date,data n 8-bit data words, transmitted by the master(see Tables 9, and2 P STOP condition 6.2. SUBADDRESS If more than data byte is transmitted, then auto-increment is performed: starting from the transmitted subaddress and auto-increment of subaddress in accordance with the order of Table 8. Table 8 Definition of the subaddress (second byte after slave address);note MSB BIT REGISTER LSB A7² A6³ A5³ A4³ A3³ A2³ A A SAD for switching mode SAD for adjust mode SAD for data mode Notes.x=don t care 2.Bit A7= is not allowed. 3.Bits A6 to A2 will be ignored by the internal hardware.

11 ` DATA BYTE FOR SWITCHING MODE Table 9 Bit description of SAD register for switching mode(sad=) and 3 2 BIT VALUE Output port2 for SAW switching or monitoring High-impedance, disabled or HIGH Low-impedance, active or LOW Output port for SAW switching or external input High-impedance, disabled or HIGH Low-impedance, active or LOW Forced audio mute On Off TV standard modulation Positive AM TV(for positive AM TV choose 6.5MHz for second SIF) Not used Negative FM TV Not used Carrier mode QSS mode Inter carrier mode Mute of FM AF outputs Active Inactive Video mode(sound trap) Sound trap bypass Sound trap active DATA BYTE FOR ADJUST MODE Tabe Bit description of SAD register for adjust mode(sad=) BIT VALUE to Audio gain -6Db db De-emphasis time constant 5us 75us De-emphasis On off Tuner takeover point adjustment See Table

12 TNJ8324 PFY 2 Table Tuner takeover point adjustment bits BIT Note. db is equal to 7mV(RMS). TOP ADJUSTMENT (DB)

13 DATA BYTE FOR DATA MODE Table 2 Bit description of SAD register for data mode(sad=) BIT VALUE 7 VIF-AGC output at pin OP2 Dependent on bits 5 and ;see Table 3 6 L standard PLL gating HIGH Gating in case of 36% positive modulation Gating in case of %positive modulation 5 VIF,SIF and tuner minimum gain 4 to 2 and Dependent on bit 7;see Table 3 Standard frequency video IF FvIF=58.75MHz FvIF=45.75MHz FvIF=38.9MHz FvIF=38.MHz FvIF=33.9MHz FvIF=33.4MHz Not used Not used Standard frequency sound inter carrier(sound 2 nd IF) FFM=4.5MHz FFM =5.5MHz FFM =6.MHz FFM =6.5MHz(for positive modulation choose 6.5 MHz) Table 3 Options in extended TV mode bit3= of SAD register FUNCTION BT 7= BT 7= BT5= BT5= BT5= BT5= Pin OP Port function Port function Port function VIF-AGC external input Pin OP2 Port function Port function VIF-AGC output Port function Gain Normal gain Minimum gain Normal gain External gain

14 TNJ8324 PFY 4 Table 4 Data setting after power-on reset(default setting for MAD=) REGISTER MSB LSB D7 D6 D5 D4 D3 D2 D D Switching mode Adjust mode Data mode Table 5 Data setting after power-on reset(default setting for MAD=) REGISTER MSB LSB D7 D6 D5 D4 D3 D2 D D Switching mode Adjust mode Data mode

15 5 For convenience, the programming has consolidated as a single table. Descrlption Bits TV System B/G I D/K M/N Force audio mute Video Trap Bypass B X Auto Mute FM B X Carrier Mode B2 X FM Mode B3 X TV Modulation B4 X Forced Mute Audio B5 Not Used(OP) B6 X Not Used (OP2) B7 X Top Adjustment C X C X C2 X C3 X C4 X De-Emphasis C5 X De-Emphasis Time C6 X Audio Gain C7 X Sound Intercarrier E X E X Video IF E2 X E3 X E4 X IF Gain E5 X L/L PLL Gating E6 X VIF AGC Output E7

16 ELECTRONICS CO., LTD 6 Example : To tune to B/G (47.25 MHz) in high band Fosc = = 5.5 MHz N = (5.5 MHz) / (62.5 khz) = F E2 (Hexadecimal) DB = F H and DB2 = E2 H CB = CE H PB = 8 H (because of high band selected)

17 ELECTRONICS CO., LTD 7 B/G Vision IF=38.9MHz sound IF=33.4MHz BAND VHF LOW VHF HIGH CHANNEL NO. FREQUENCY TABLE(B/G) PICTURE SOUND LOCAL OSC UNIT: MHz IMAGE

18 ELECTRONICS CO., LTD B/G Vision IF=38.9MHz sound IF=33.4MHz 8 BAND VHF HIGH UHF FREQUENCY TABLE (B/G) UNIT: MHz CHANNEL PICTURE SOUND LOCAL OSC IMAGE NO

19 ELECTRONICS CO., LTD 9 B/G Vision IF=38.9MHz sound IF=33.4MHz BAND UHF FREQUENCY TABLE (B/G) UNIT: MHz CHANNEL PICTURE SOUND LOCAL OSC IMAGE NO

20 SHENZHEN TENA ELECTRONICS CO., LTD 2 unit mm A note: tolerances are.3, unless otherwise specified. SYMBOL PIN VOUT Composite Video Baseboard signal output AOUT 2 AF sound output AFT 3 AFT OUT RF AGC 4 RF AGC 4.V IN(factory section) +B 5 Supply Voltage : +5V SIF 6 SIF OUT SCL 7 I 2 C-bus Serial clock SDA 8 I 2 C -bus Serial data AS 9 I 2 C -bus address select BT Tuning Voltage (factory section) IF OUT IF signal output