Advanced Power Electronics Corp. APE8957 TYPICAL APPLICATION PACKAGE ORDERING INFORMATION 7A ULTRA LOW DROPOUT LINEAR REGULATOR APE8957

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1 7A ULTRA LOW DROPOUT LINEAR REGULATOR FEATURES Ultra Low Dropout Voltage 10mV at 7A Output Current Low ESR Output Capacitor (MLCC) Applicable 0.8V Reference Voltage Fast Transient Response Current Limit and Thermal Shutdown Protection Adjustable Output Voltage by External Resistors Power-on-Reset Monitoring on Both and Pins Under Voltage Protection Power OK Output with a Delay Time Internal Soft-Start SOP-8 with Exposed Pad Package RoHS Compliant & Halogen Free DESCRIPTION The is a 7A ultra low dropout linear regulator. The product is specifically designed to provide well supply voltage for front side bus termination on motherboard and NB applications. The IC needs two supply voltages, a voltage for the circuitry and a main supply voltage for power conversion, to reduce power dissipation and provide extremely low dropout. The integrates many functions. A Power-on-Reset(POR) circuit monitors both supply voltage to prevent wrong operations. A thermal shutdown and current limit functions protect the device against thermal and current over-load. A indicates the output status with time delay which is set internally. It can control other converter for power sequence. The can be enabled by other power system. Pulling and holding the pin below 0.V shuts off the output. The is available in ESOP-8 package which features small size as SO-8 and exposed pad to reduce the junction-to-case resistance, being applicable in ~W applications. TYPICAL APPLICATION R 1K R 1K =V =1.V =V R.1-1Ω =1.V C1 1uF GND R1 1K C 1~8nF R K C 100uF C 0.1uF C 0uF =1.V/7A C 0.1uF C1 1uF GND =V x (1+R1/R) V=0.8V R1 9K R 78K C uf C 0pF C uf =1.V/7A Figure 1. Output Capacitor with ESR > 0mΩ Figure. Output Capacitor is MLCC PACKAGE ORDERING INFORMATION Package type MP : ESOP-8 Data and specifications subject to change without notice

2 ABSOLUTE MAXIMUM RATINGS Supply Voltage(V CNTL ) -0. to 7 V Supply Voltage(V IN ) -0. to. V and Pin Voltage -0. to + 0.V Power Good Voltage(V ) -0. to 7 V Power Dissipation(P D ) W Storage Temperature Range(T ST ) - C To 10 C Junction Temperature Range(T J ) - C To 10 C Operating Temperature Range(T OP ) -0 C To + 8 C Thermal Resistance from Junction to Case(Rth JC ) 1 C/W Thermal Resistance from Junction to Ambient(Rth JA ) 0 C/W Note. Rth JA is measured with the PCB copper area(need connect to Exposed pad) of approx. 1. in (multi-layers) RECOMMDED OPERATING CONDITIONS Supply Voltage(V CNTL ) +.1 to V Supply Voltage(V IN ) +1.1 to. V Output Voltage(V OUT ) V CNTL =.V +0.8 to 1. V V CNTL =V +0.8 to V IN -0. V Output Current(I OUT ) +0 to 7 A Junction Temperature Range(T J ) - C To 1 C PACKAGE INFORMATION ESOP-8L (MP) (Top View) GND ELECTRICAL SPECIFICATIONS ( V CNTL =V, V IN =1.V, V OUT =1.V, T A =, unless otherwise specified) Parameter SYM TEST CONDITION MIN TYP MAX UNITS POR Threshold V CNTL(PORTH) V POR Hysteresis V CNTL(hys) V POR Threshold V IN(PORTH) V POR Hysteresis V IN(hys) V Nominal Supply Current I CNTL =V CNTL 0. 1 ma Shutdown Current I SD =0V ua Feedback Voltage V V CNTL =. ~ V V Load Regulation I OUT = 0A ~ 7A % Dropout Voltage V DROP I OUT = 7A, V CNTL =V, T J = o C V I OUT = 7A, V CNTL =V, T J =~1 o C V

3 ELECTRICAL SPECIFICATIONS(Cont.) Soft Start Time T SS - - ms Pin Logic High Threshold Voltage Hysteresis V H Enable V mv Pin Pull-Up Current I =GND ua Current Limit I LIM V CNTL =. ~ V, T J = o C A V CNTL =. ~ V, T J =-~1 o C A Under Voltage Threshold V Falling V Threshold Voltage for Power OK V V Rising 90% 9% 9% V Threshold Voltage for Power Not OK V PNOK V Falling 78% 81% 8% V Low Voltage Sinks ma V Delay Time T DELAY ms Thermal Thutdown Temperature T SD ºC Thermal Thutdown Hysteresis ºC PIN DESCRIPTIONS PIN SYMBOL GND PIN DESCRIPTION GND Pin Feedback Pin IC Power Supply Pin H : Normal Operation ; L : Shutdown Power OK Output Pin Pin Input Voltage Input Voltage BLOCK DIAGRAM N-MOSFET Power-ON Reset Enable Current Limit Soft-Start And Control Logic - + Error Amp Bandgap Thermal Shutdown 0.V + UV - GND Delay % Vref

4 FUNCTION PIN DESCRIPTION Connecting this pin to an external resistor divider receives the feedback voltage of the regulator. The output voltage set by the resistor divider is determined by: = 0.8 x (1 + R1/R) Where R1 is connected from to with Kelvin sensing and R is connected from to GND. A bypass capacitor may be connected with R1 in parallel to improve load transient response. The recommended R and R1 are in the range of 1k~100kohm. and Exposed Pad Main supply input pins for power conversions. The exposed pad provides a very low impedance input path for the main supply voltage. Please tie the exposed pad and Pin (Pin ) together to reduce the dropout voltage. The voltage at this pin is monitored for Power-On Reset purpose. Power input pin of the control circuitry. Connecting this pin to a +V(recommended) supply voltage provides the bias for the control circuitry. The voltage at this pin is monitored for Power-On Reset purpose. Power-OK signal output pin. This pin is an open-drain output used to indicate status of output voltage by sensing voltage. This pin is pulled low when the rising voltage is not above the V threshold or the falling voltage is below the VPNOK threshold, indicating the output is not OK. Enable control pin. Pulling and holding this pin below 0.V shuts down the output. When re-enabled, the IC undergoes a new soft-start cycle. Left this pin open, an internal current source 10uA pulls this pin up to voltage, enabling the regulator. Output of the regulator. Please connect Pin and together using wide tracks. It's necessary to connect an output capacitor with this pin for closed-loop compensation and improving transient responses. FUNCTION DESCRIPTION Power-On-Reset Power-On-Reset (POR) circuit monitors both input voltages at and pins to prevent wrong logic controls. The POR function initiates a soft-start process after the two supply voltages exceed their rising POR threshold voltages during powering on. The POR function also pulls low the pin regardless the output voltage when the voltage falls below it s falling POR threshold. Internal Soft-Start An internal soft-start function controls rise rate of the output voltage to limit the current surge at start-up. The typical soft-start interval is about ms. Current Limit The monitors the current via the output NMOS and limits the maximum current to prevent load and from damage during overload or short circuit

5 FUNCTION DESCRIPTION(Cont.) Output Voltage Regulation An error amplifier working with a temperature compensated 0.8V reference and an output NMOS regulates output to the preset voltage. The error amplifier designed with high bandwidth and DC gain provides very fast transient response and less load regulation. It compares the reference with the feedback voltage and amplifies the difference to drive the output NMOS which provides load current from to. Under Voltage Protection (UVP) The monitors the voltage on pin after soft-start process is finished. Therefore the UVP is disabling during soft-start. When the voltage on pin falls below the under-voltage threshold, the UVP circuit shuts off the output immediately. After a while, the starts a new soft-start to regulate output. Thermal Shutdown A thermal shutdown circuit limits the junction temperature of. When the junction temperature exceeds +10 C, a thermal sensor turns off the output NMOS, allowing the device to cool down. The regulator regulates the output again through initiation of a new soft-start cycle after the junction temperature cools by 0 C, resulting in a pulsed output during continuous thermal overload conditions.

6 Package Outline : ESOP-8 ADVANCED POWER ELECTRONICS CORP. P Millimeters SYMBOLS MIN NOM MAX A B C D 0 8 E Q F M B A L H L J K G P REF. 1.7 TYP... Q... I J 1.All Dimension Are In Millimeters..Dimension Does Not Include Mold Protrusions. Part Marking Information & Packing : ESOP-8 897MP YWWSSS Part Number Package Code Date Code (YWWSSS) Y:Last Digit Of The Year WW:Week SSS:Sequence