Advanced Power Electronics Corp. APU1150M-HF-3TR. 4A Ultra-low Dropout Regulator. Applications. Ordering Information. Typical Application APU1150-3
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1 Features Typical Dropout of 0.7 at A Fast Transient Response oltage Reference Initial Accuracy of % Built-In Thermal Shutdown RoHS-compliant, halogen-free Applications. to.7 Point of Load DC/DC Conversion Technology Licensed from International Rectifier Description A Ultra-low Dropout Regulator The APU0 is a A regulator with extremely low dropout voltage using a proprietary bipolar process that achieves comparable equivalent on-resistance to that of discrete MOSFETs. This product is specifically designed to provide well regulated supply for applications requiring.8 or lower voltages from. ATX power supplies where high efficiency of a switcher can be achieved with- out the cost and complexity associated with switching regulators. One such application is the new graphic chip sets that require anywhere from. to.7 supply. Ordering Information APU0S-HF-TR APU0M-HF-TR RoHS-compliant halogen-free -pin TO-6 on tape and reel (800 pcs/reel) RoHS-compliant halogen-free 8-pin SO-8 on tape and reel (000 pcs/reel) Typical Application. C 00uF APU0-0 R 8 C 00uF.7 C 00uF Figure - Typical application of APU0 in a. to.7 supply. 00 USA /7
2 Absolute Maximum Ratings Input oltage ()... 7 Control Input oltage ()... Power Dissipation... Internally Limited Storage Temperature Range C To 0 C Operating Junction Temperature Range... 0 C To 0 C Electrical Specifications Unless otherwise specified, these specifications apply for CIN=µF, COUT=0µF, and TJ=0 to C. Typical values refer to TJ= C. =. PARAMETER SYM TEST CONDITION MIN TYP MAX UNITS Reference oltage REF =.7 to, =.0 to., Io=0mA to A, ADJ= Line Regulation =. to 7, =.7 to., Io=0mA, ADJ= m Load Regulation (Note ) =.7, =., Io=0mA to A, ADJ=0 - + m Dropout oltage (Note ) ADJ=0 for all conditions below: ( - ) =.0, Io=.A.00. =.0, Io=A.0. =.0, Io=A..0 Dropout oltage (Note ) ADJ=0 for all conditions below: ( - ) Current Limit Minimum Load Current (Note ) Thermal Regulation Ripple Rejection Control Pin Current ust Pin Current IADJ =.7, Io=.A =.7, Io=A =.7, Io=A =.7, =.0, o=00m, ADJ=0 =, =., ADJ=0 0ms Pulse =, =, Io=A, ADJ=0, TJ= C, RIPPLE=PP at 0Hz ADJ=0 for all below conditions: =.7, =.0, Io=.A =.7, =.0, Io=A =.7, =.0, Io=A =.7, =.0, ADJ= A ma %/W db ma µa Note : Minimum load current is defined as the mini- mum current required at the output in order for the output voltage to maintain regulation. Typically the resistor dividers are selected such that it automatically main- tains this current. Note : Low duty cycle pulse testing with Kelvin connections is required in order to maintain accurate data. Note : Dropout voltage is defined as the minimum differential between and required to maintain regu- lation at. It is measured when the output voltage drops % below its nominal value. 00 USA /7
3 Pin Configuration -PIN PLASTIC TO-6 (S) Tab is FRONT IEW 8-PIN PLASTIC SOIC (M) CTRL 7 SENSE TOP IEW 8 6 OUT OUT Pin Descriptions θja= C/W for 0." square pad θja= C/W for " square pad area PIN # PIN SYMBOL PIN DESCRIPTION This pin is the positive side of the reference which allows remote load sensing to achieve excellent load regulation. A resistor divider from this pin to the pin and ground sets the output voltage. The output of the regulator. A minimum of 0µF capacitor must be connected from this pin to ground to insure stability. This pin is the supply pin for the internal control circuitry as well as the base drive for the pass transistor. This pin must always be higher than the pin in order for the device to regulate. (See specifications) The input pin of the regulator. Typically a large storage capacitor is connected from this pin to ground to insure that the input voltage does not sag below the minimum drop out voltage during the load transient response. This pin must always be higher than in order for the device to regulate. (See specifications) Block Diagram +. + CURRENT LIMIT THERMAL SHUTDOWN Figure - Simplified block diagram of the APU0. 00 USA /7
4 Application Information Introduction The APU0 adjustable regulator is a five-terminal device designed specifically to provide extremely low dropout voltages comparable to the PNP type without the disadvantage of the extra power dissipation due to the base current associated with PNP regulators. This is done by bringing out the control pin of the regulator that provides the base current to the power NPN and connecting it to a voltage that is grater than the voltage present at the pin. This flexibility makes the APU0 ideal for applications where dual inputs are available such as a computer mother board with an ATX style power supply that provides and. to the board. One such application is the new graphic chip sets that require anywhere from. to.7 supply such as the Intel I70 chip set. The APU0 can easily be programmed with the addition of two external resistors to any voltages within the range of. to.. Another major requirement of these graphic chips such as the Intel I70 is the need to switch the load current from zero to several amps in tens of nanoseconds at the processor pins, which translates to an approximately 00 to 00ns of current step at the regulator. In addition, the output voltage tolerances are also extremely tight and they include the transient response as part of the specification. The APU0 is specifically designed to meet the fast current transient needs as well as providing an accurate initial voltage, reducing the overall system cost with the need for fewer number of output capacitors. Another feature of the device is its true remote sensing capability which allows accurate voltage setting at the load rather than at the device. Output oltage Setting The APU0 can be programmed to any voltages in the range of. to. with the addition of and R external resistors according to the following formula: = REF + ( ) R +IADJ R Where: REF =. Typically IADJ = 0µA Typically and R as shown in Figure : APU0 REF IADJ = 0uA Figure - Typical application of the APU0 for programming the output voltage. in APU0 R R The APU0 keeps a constant. between the pin and the ADJ pin. By placing a resistor across these two pins and connecting the and pin together, a constant current flows through, adding to the Iadj current and into the R resistor producing a voltage equal to the (./) R + IADJ R. This voltage is then added to the. to set the output voltage. This is summarized in the above equation. Since the minimum load current requirement of the APU0 is 0mA, is typically selected to be a Ω resistor so that it automatically satisfies this condition. Notice that since the IADJ is typically in the range of 0µA it only adds a small error to the output voltage and should be considered when very precise output voltage setting is required. Load Regulation Since the APU0 has separate pins for the output () and the sense (), it is ideal for providing true remote sensing of the output voltage at the load. This means that the voltage drops due to parasitic resistance such as PCB traces between the regulator and the load are compensated for using remote sensing. Figure shows a typical application of the APU0 with remote sensing. RL Figure - Schematic showing connection for best load regulation. 00 USA /7
5 Stability The APU0 requires the use of an output capacitor as part of the frequency compensation in order to make the regulator stable. Typical designs for the microprocessor applications use standard electrolytic capacitors with typical ESR in the range of 0 to 00mΩ and an output capacitance of 00 to 000µF. Fortunately as the capacitance increases, the ESR decreases resulting in a fixed RC time constant. The APU0 takes advantage of this phenomena in making the overall regulator loop stable. For most applications a minimum of 00µF aluminum electrolytic capacitor such as Sanyo, MGX series, Panasonic FA series as well as the Nichicon PL series insures both stability and good transient response. Thermal Design The APU0 incorporates an internal thermal shutdown that protects the device when the junction temperature exceeds the allowable maximum junction temperature. Although this device can operate with junction temperatures in the range of 0 C, it is recommended that the selected heat sink be chosen such that during maximum continuous load operation the junction temperature is kept below this number. The example below shows the steps in selecting the proper surface mount package. Assuming, the following conditions: =.7 =. = IOUT = A (DC Avg) Calculate the maximum power dissipation using the following equation: PD = IOUT ( - )+ ( ) ( ) IOUT 60 ( - ) PD = (. -.7)+ ( -.7) =.8W 60 Using table below select the proper package and the amount of copper board needed. Pkg Copper θja( C/W) Max Pd Max Pd Area (TA= C) (TA= C) TO-6."X.".W.6W TO-6.0"X.0" 0.7W.0W TO-6 0.7"X0.7".W.6W TO-6 Pad Size.W.0W SO-8.0"X.0".0W.6W Note: Above table is based on the maximum junction temperature of C. As shown in the above table, any of the two packages will do the job. For low cost applications the SOIC 8-pin package is recommended. 00 USA /7
6 Package Dimensions: SO-8 D Millimeters SYMBOLS MIN NOM MAX 8 e 7 6 B E E A...7 A B C D E E L θ e.7 TYP A A DETAIL A L θ c. All dimensions are in millimeters.. Dimensions do not include mold protrusions. DETAIL A Marking Information: SO-8 U0M YWWSSS Product: APU0 Package: M = RoHS-compliant halogen-free SO-8 Date/lot code (YWWSSS) Y: Last digit of the year WW: Work week SSS: Lot code sequence 00 USA 6/7
7 Package Outline: TO-6-L Millimeters SYMBOLS MIN NOM MAX A b L c L E E c L D D e L θ 0 8. All dimensions are in millimeters.. Dimensions do not include mold protrusions. Marking Information: TO-6-L U0S YWWSSS Product: APU0 Package: S = RoHS-compliant halogen-free TO-6-L Date/lot code (YWWSSS) Y: Last digit of the year WW: Work week SSS: Lot code sequence 00 USA 7/7
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