Push-Pull Class-E Power Amplifier with a Simple Load Network Using an Impedance Matched Transformer

Transcription

1 Proceedings of the International Conference on Electrical, Electronics, Computer Engineering and their Applications, Kuala Lumpur, Malaysia, 214 Push-Pull Class-E Power Amplifier with a Simple Load Network Using an Impedance Matched Transformer Jinhee Kwon, Hwiseob Lee, Wooseok Lee, Mincheol Seo, and Youngoo Yang School of Information and Communication Engineering, Sungkyunkwan University Suwon, , Republic of Korea yang9@skku.edu ABSTRACT This paper presents a push-pull class-e power amplifier based on a simple load network using the impedance matched transformer. The proposed load network consists of an impedance matched transformer and series LC filter. The transformer which is made of a ferrite core and an enamelcoated wire was used to match to the optimal load impedance as well as to convert a balanced output signal to a single-ended signal. The proposed power amplifier achieved low second harmonic distortion with push-pull structure and low third harmonic using LC filter, which includes a shunt capacitor. The designed and implemented power amplifier showed an efficiency of 83.8% at an output power of 37.4 dbm using 6.78 MHz input signal. At the same output power level, the second and third harmonic distortions are dbc and dbc, repectively. KEYWORDS Class-E power amplifier, switching amplifier, transformer, push-pull amplifier, harmonic distortion 1 INTRODUCTION Since the power amplifiers (PAs) dissipate significant power in the transmitter, the PAs have been designed for higher efficiency [1], [2]. The switching mode amplifiers, such as class E and D, can theoretically deliver 1% efficiency by removing non-zero drain voltage while they have non-zero current. Due to high efficiency and simple design procedure, the class-e PA has been widely used in many applications [3]-[7]. However, when the Z1 + I1 V1 - N1 Figure 1. Equivalent circuit of an ideal transformer. transistor acts as a switch, it generates undesirable harmonic distortion. Many studies have been done on push-pull structure to reduce harmonic distortion. Pushpull structure is capable of providing lower even harmonics although more components are needed [8]-[1]. In this paper, a push-pull class-e PA with a simple load network is proposed using an impedance matched transformer. The transformer is built by winding enamel-coated wires around a ferrite core. It works as an impedance transformer as well as a balun. In addition, by applying dc supply voltage through the center tap in the primary coil, RF chokes can be eliminated. Series LC circuit between transistor outputs is deployed not only for filtering out the third harmonic signal but also for a shunt capacitor at the fundamental frequency. The proposed push-pull class-e PA was designed and implemented using a MOSFET. The experimental results of the proposed PA were compared to those from the previous works. N2 2 IMPEDANCE MATCHED TRANSFORMER I2 Z2 + V2 - ISBN: SDIWC 21

2 Phase difference ( ) Proceedings of the International Conference on Electrical, Electronics, Computer Engineering and their Applications, Kuala Lumpur, Malaysia, 214 Figure 1 shows an equivalent circuit of an ideal transformer. The voltage and current of an ideal transformer is directly related to the ratio of the winding turns as follows. V V ( N / N ), (1) I2 I1 ( N1 / N2). (2) Since Z 2 = V 2 /I 2 and Z 1 = V 1 /I 1, the impedance ratio can be expressed using the turn ratio of a transformer. Z 1 N 1. (3) Z2 N2 To match the impedance from 5 Ω to the optimum load impedance using the transformer without other matching circuits, the turn ratio of 2:3 was chosen in this work. Due to the frequency-dependent permeability of the ferrite core, an insertion loss becomes unacceptable at high frequency. To keep a low insertion loss at 6.78 MHz, a ferrite having high permeability of 1,5 was selected. Inductances of the coils in the transformer are also determined by a permeability of the ferrite core and the number of turns. To get an optimal load reactance which is affected by the inductances of the coils, the number of turns was adjusted. To realize a turn ratio of 2:3, two transformers were implemented and compared. One has 4 primary turns and 6 secondary turns, while the other has 6 primary turns and 9 secondary turns. The measured frequency characteristics of the implemented transformers are shown in Figure 2. Both transformers show low insertion losses of about.3 db, magnitude differences of less than.2 db and phase differences of within ±.2 from 18. Figure 3 shows the measured impedances looking into the implemented transformers and the extracted optimum load impedance. From the load-pull simulation, the optimum extracted load impedance is 22 + j*23 Ω for the best efficiency. When the number of turns are 6 and 9, the input impedance of the transformer with 5 load is j*24.9 Ω which is very close to th e 2 1j -1j Insertion loss (db) Magnitude difference (db) db (4:6) -.32 db (6:9) (4:6) (6:9) Frequency (MHz) (a).2 db (4:6).1 db (6:9) Frequency (MHz) (b) 5j Figure 2. Measured performances of the implemented transformers according to the frequency: (a) insertion losses and (b) magnitude and phase differences 25j Fund j*14 Fund 22.3+j*24.9 Optimum load impedance 22 + j* Figure 3. Measured impedances looking into the implemented transformers. optimum load impedance. Hence, the 6:9 transformer is selected for the proposed PA. 1j ISBN: SDIWC 22-25j -1j

3 Ids (A) Proceedings of the International Conference on Electrical, Electronics, Computer Engineering and their Applications, Kuala Lumpur, Malaysia, 214 VCC 6.78 MHz OSC VCC Differential current buffer VGS1 VGS2 Vdd Impedance matched transformer Fund: shunt C 3 rd harmonic: short Output Vgs (V) V GS1 V GS V Figure 4. Schematic diagram of the designed push-pull class-e PA. Fund : shunt C 3 rd harmonic filter Differential current buffer Vdd Output DC block Time (nsec) Figure 6. Measured voltage waveforms at the switching transistors gates. 3 Vds Ids Line: Simulated Scatter: Measured 1.5 Impedance matched transformer Figure 5. A photograph of the implemented push-pull class-e PA Vds (V) DESIGN OF THE PROPOSED POWER AMPLIFIER Figure 4 shows an overall schematic diagram of the proposed push-pull class-e PA. The proposed PA is driven by a differential current buffer with a 6.78 MHz square wave. The square wave is generated by an oscillator. The differential buffer makes the single-ended to a differential signal that has a peak voltage of 1 V. A simple load network using the impedance matched transformer is adopted for the proposed push-pull class-e PA. The drain bias voltage, V DD of 8 V, is applied through the center tap of the transformer. By adding an inductor to the shunt capacitor in series, a series resonance at the 3 rd harmonic frequency was realized to suppress the 3 rd Time (nsec) Figure 7. Simulated and measured voltage and current waveforms at the drain of the switching transistor. harmonic signal. The LC circuit acts as a shunt capacitor at the fundamental frequency. 4 IMPLEMENTATION AND EXPERIMENTAL RESULTS A photograph of the implemented push-pull class-e PA is shown in Figure 5. The proposed PA was implemented on a FR4 substrate using Infineon s low-cost switching MOSFET of BSZ42DN25NS3. Figure 6 shows the measured voltage waveforms at the switching transistors gates. These input signals with a peak voltage of 9.89V, which are generated by the differential ISBN: SDIWC 23

4 DE (%) Proceedings of the International Conference on Electrical, Electronics, Computer Engineering and their Applications, Kuala Lumpur, Malaysia, Table 1. Performance comparison to the previous works Pout (dbm) Pout DE Drain bias voltage (V) (a) [7] [11] This work Device MOSFET GaN MOSFET Frequency (MHz) Pout (W) V DD (V) N/A 2 8 Efficiency (%) Harmonics (dbc) N/A N/A 2 nd : rd : Harmonics (dbc) th Drain bias voltage (V) (b) Figure 8. Measured performances according to the dc supply voltage: (a) output power and drain efficiency, (b) harmonic distortion. current buffer circuit, are applied to the switching transistors. Figure 7 shows the simulated and measured drain voltage and current waveforms for the drain bias voltage, V DD, of 8V. The measurement results are in good agreement with those obtained from the simulation using ADS. The simulated and measured peak drain voltages are 23.3 V and 22 V, respectively. The measured performances according to the drain bias voltage of from 5 to 11 V are shown in Figure 8. From the measurement results, the implemented PA exhibited output power levels of up to 1 W and efficiencies of from 81.6 to 84.2%. It also showed that the second and third harmonic distortion levels are less than -4 and -4.5 dbc respectively. Table 1 summarizes the measured results of the proposed PA in comparison to the previously published class-e PAs. 5 CONCLUSIONS In this paper, we proposed a push-pull class- E PA based on a simple load network using the impedance matched transformer. The load network employs a transformer which has coils having 6 primary turns and 9 secondary turns for optimal load impedance matching. A 6.78 MHz input signal generated by an oscillator is applied to the differential current buffer which generates differential output voltage. The implemented amplifier exhibited very similar waveforms to the simulated ones. For the dc supply voltage of from 5 V to 11 V, an output power of up to 1 W and a drain efficiency of from 81.6 to 84.2% were achieved. Due to the push-pull structure and resonant third harmonic filter, the PA also showed low harmonic distortion levels. The proposed PA has a very simple structure and good performances compared to the previously published class-e PAs. ACKNOWLEDGEMENT This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korean government (MSIP) (214R1A5A111478). ISBN: SDIWC 24

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