A Doherty Power Amplifier with Extended Efficiency and Bandwidth

Transcription

1 This article has been accepted and published on J-STAGE in advance of copyediting. Content is final as presented. IEICE Electronics Express, Vol.* No.*,*-* A Doherty Power Amplifier with Extended Efficiency and Bandwidth Zhiqun Cheng 1a), Jiangzhou Li 1, Guohua Liu 1b), Steven Gao 2 1. Key Lab. of RF Circuit and System, Education Ministry, Hangzhou Dianzi University, Hangzhou , China, 2. School of Engineering and Digital Arts, University of Kent, UK a) zhiqun@hdu.edu.cn, b)ghliu@hdu.edu.cn Abstract: This paper proposes a modified Doherty power amplifier (DPA) configuration for bandwidth and efficiency operations. To mitigate the efficiency degradation resulting from the incomplete load modulation network (LMN) and the knee voltage effect, the carrier transistor s optimum load impedances based on related constant voltage standing wave ratio (VSWR) circle theory are introduced. Meanwhile, a innovative LMN with broadband matching technologies is adopted, which plays a guiding role on the bandwidth expansion from the theoretical point of view. In order to verify the practical feasibility of the design scheme, two 10W GaN HEMT transistors are used to design a broadband DPA. The measurement results show that the working bandwidth of the power amplifier is from 1.6GHz to 2.6GHz. The saturated output power of the whole frequency band is about dBm and the drain efficiency (DE) is more than 50.8% at the input power of 33dBm. In addition, the DE is % at 6-dB back-off power. Measurement results verify that the proposed enhancement techniques of bandwidth and efficiency are effective for DPA. Keywords: Doherty power amplifier, constant VSWR circle, broadband matching technologies, bandwidth, drain efficiency Classification: Microwave and millimeter wave devices, circuits, and systems References IEICE 2017 DOI: /elex Received March 2, 2017 Accepted March 17, 2017 Publicized April 6, 2017 [1] S C. Cripps, RF Power Amplifiers for Wireless Communications. Norwood, MA, USA: Artech House, [2] Doherty W H. A New High Efficiency Power Amplifier for Modulated Waves[J]. Radio Engineers, Proceedings of the Institute of, 1936,24(9): [3] G. Sun and R. H. Jansen, Broadband Doherty power amplifier via real frequency technique, IEEE Trans. Microw. Theory Tech., vol.mtt-60, no. 1, pp , Jan [4] K. Bathich, A. Z. Markos, and G. Boeck, Frequency response analysis and 1

2 bandwidth extension of the Doherty amplifier, IEEE Trans. Microw.Theory Tech., vol. 59, no. 4, pp , Apr [5] J. Xia, X. Zhu, L. Zhang, J. Zhai, and Y. Sun, High-efficiency GaN Doherty power amplifier for 100-MHz LTE-advanced application based on modified load modulation network, IEEE Trans. Microw. Theory Tech.,vol. 61, no. 8, pp , Aug [6] R. Giofre, P. Colantonio, F. Giannini, and L. Piazzon, New output combiner for Doherty amplifiers, IEEE Micro. Wireless Compon. Lett., vol. 23,no. 1, pp , Jan [7] J. Kwon et al., Broadband Doherty power amplifier based on asym-metric load matching networks, IEEE Trans. Circuits Syst. Exp. Briefs,vol. 62, no. 6, pp , Jun [8] M. N. A. Abadi, H. Golestaneh, H. Sarbishaei, and S. Boumaiza An extended bandwidth Doherty power amplifier using a novel output combiner, in IEEE MTT-S Int. Dig., Tampa, FL, USA, 2014, pp.1 4. [9] Grebennikov A, Wong J. A Dual-Band Parallel Doherty Power Amplifier for Wireless Applications [J]. Microwave Theory and Techniques, IEEE Transactions on, 2012,60(10): [10] S. Jee, J. Lee, S. Kim, Y. Park, and B. Kim, Highly linear 2-stage Doherty power amplifier using GaN MMIC, J. Electromagn. Eng. Sci.,vol. 14, no. 4, pp , Dec [11] Kurokawa K.Power waves and the scattering matrix [J]. IEEE Trans on Miscowave Theory and Techniques,1965,13: Introduction In order to improve the data transmission rate and spectrum utilization, modern mobile communications are more use linear modulation and multi-carrier technology, thus resulting the system efficiency is getting lower and lower. Investigate its reason, the peak-to-average power ratios (PAPRs) of modulated signals are in a state of continuous growth, leading to power amplifier (PA) working in output power back-off region. To overcome the limited average efficiency in back-off region of PA when driven with such signal characteristics. The DPA, envelope tracking (ET), envelope elimination restoration (EER) and other efficiency enhancement concepts have been proposed. But DPA [1],[2] have been widely used because of simple structure and low cost. In the theory of conventional DPA, the load modulation network (LMN) and transistor internal parasitic parameters are the two main factors to constraint further enhance the broadband and efficiency. So to solve these problems, many published papers have given different methods, such as changing structure of the Doherty combiner, real frequency method[3],[4], novel LMN[5],[6],[7] as well as parallel combiners structure[8],[9] and other methods. Although the results of these studies in the realization of DPA bandwidth expansion and efficiency increasement have played a very positive role, overall these structures are still more complex and difficult to fully implement. The conventional DPA block diagram is shown in the Fig.1. The up branch of the schematic is the carrier power amplifier and the down one is peaking power amplifier. In normal working condition, the carrier and peaking amplifiers operate 2

3 in depth class-ab and class-c, respectively. As is shown in Fig.2, in the case of fundamental frequency, the current of the carrier amplifier(class-ab) is higher than the current of the peaking amplifier(class-c), so the load impedance of the two amplifiers cannot be pulled to the optimum value, that results in incomplete load modulation and then affects the performance of DPA. On the other hand, because of the effect of the LMN, the carrier power amplifier impedance can change dynamically from 100Ω at 6-dB back-off power to 50Ω at saturation power. Meanwhile the characteristic impedances of ZT and ZL are respectively set to 50Ω and 35.3Ω[10]. Fig.1. Block diagram of the conventional DPA. Fig.2. Diagram of power amplifier current and conduction angle This paper focuses on DPA efficiency and bandwidth problem. And the paper is organized as follows: the design method of optimum load impedances and proposed LMN are described in Section 2, simulation and measurement results in Section 3 and Section 4 shows the conclusion. 2 DPA analysis and design 2.1 Design of Output Matching Networks In order to avoid the impact of incomplete load modulation on DPA bandwidth and efficiency, we proposes a modified DPA configuration. Fig.3 shows the proposed OMN combiners structure of bandwidth and efficiency enhanced DPA. For improving the DPA load modulation effect and maintain high efficiency at high back-off power level, we also should keep to the following principles in the design process. 1) At saturation power, the carrier amplifier and peak power amplifier transistor should be matched to the optimal load impedances Z opt,c,h and Z opt,p,h. So in 3

4 this case, the corresponding maximum output power is P C,max and P P,max. Here, the PC,max/PP,max equal to 1:δ and δ is set to unit quantity. 2) In the case of a back-off power, the carrier amplifier should be matched to the optimum impedance Zopt,C,L, such that the carrier amplifier enters the saturation state at the output power of (PC,max+PP,max)/(1+δ) 2 and has the highest possible efficiency. 3) Before the peak amplifier is turned on, the output impedance Z out,l of the peak amplifier should be as large as possible to minimize the effect of power leakage on efficiency. Fig.3. Block diagram of the proposed bandwidth and efficiency enhanced DPA. So in different working conditions, the carrier amplifier OMNc will play a decisive role, assumption OMN is a two-port network with no consumption, its s-parameters have the following properties: S 2 11 j 1 S11 e S 2 (1) j 1 S * 2 11 e j S11e For is the phase of the network S.When the reference impedance of OMNc input and output are respectively specified as Zopt,C,H and ZC,H, the S11=0[11] according to the definition of the generalized s-parameter, then Equation (1) can be rewritten to: j 0 e S j e 0 (2) On the other hand, according to equation (2) and select ZC,H as the reference impedance of the network s-parameter and assume that ZC,H has matched to Zopt,C,H in the OMNc. When the load impedance of OMNc is replaced by ZC,L, the reflection coefficient of the network input can be written as: S S S 12 C, L 2 j opt, C, L 11 C, L 1 S22 C, L combining Equation (3) and referring to the parameter values of the load modulation network in Fig.2, the required parameters can be calculated as: 2 j opt, C, L e 2 VSWR opt, C, L 1 e (3) (4) (5) 4

5 From equation (4) and (5), when the OMNc is designed to match ZC,H to Zopt,C,H, the network will match ZC,L to the VSWR with Zopt,C,H as the center and (1+δ) as radius. Also the specific position is determined by the transmission phase of the network. Fig.4. Optimum and matched impedances of the carrier amplifiers. Fig.4 shows the optimum and matched impedances of the carrier amplifiers, when Zopt,C,H moves along the constant power contour PC,max from point a to point c, the constant VSWR contour which the center is Zopt,C,H has multiple intersections with the constant efficiency contour of the carrier amplifier at the back-off power, and each position to achieve the different highest efficiency ranging. If and only if point c is located at the b point, the constant VSWR contour intersects the maximum value of the constant efficiency contour, the intersection should be the best choice of Zopt,C,L and b should Preferred as Zopt,C,H. Adhere to the above theoretical and design principles, after the determination of the relationship between the two characteristic impedance values, it is easy to design the carrier amplifier and peak power amplifier OMN. And OMN just match the impedance of the transistor load pull to the impedance before LMN, It is worth noting that an impedance step matching structure is selected as the prototype of the OMN. 2.2 Design of load modulation network (LMN) In this section, a modified bandwidth enhanced LMN based on broadband matching technologies is proposed as shown in Fig.5, its characteristics are defined based on the design goals and the LMN also uses the impedance step matching structure with different transmission line characteristic impedance, whose continuous change is conductive to the realization of broadband matching. Compared with the only use of two impedance transform lines (shown in Fig.1), this structure benefits well for the broadband feature. As shown in Fig.5 marked, the characteristic impedances of Z 1 and Z 2 and Z 3 need to be decided according to the actual situation of the circuit. Fig.6 compares the broadband properties of different types DPA structures. It is readily observed that magnitudes of S of the proposed innovative DPA provides a wider flatness than conventional and parallel architecture over the frequency 5

6 IEICE Electronics Express, Vol.* No.*,*-* band, which means great convenience for broadband impedance matching and potential for bandwidth enhancement. Here, the specific value f/f0 denotes a normalized frequency and center frequency f0=2.1ghz. Fig.5. Simplified DPA diagrams based on modified bandwidth enhanced LMN. Fig.6. The proposed modified DPA and conventional DPA, parallel DPA broadband properties. 3 Simulation and measurement results Fig.7. Photograph of the fabricated circuit. In order to validate the bandwidth feature of proposed modified DPA based on broadband matching technologies, a broadband DPA is fabricated and measured. The carrier amplifier gate voltage is set to -2.7V whose biased at class-ab mode and the peaking amplifier gate voltage is set to -5.5V(class-C), while the drain biases of the two branches are both 28V. A equal division Wilkinson power splitter is carefully designed in order to have identical current driving situation in the case 6

7 of saturation. The characteristic impedances of broadband matching network are elaborately tuned to find the optimal value. Fig.7 shows the DPA photography of the fabricated circuit. Output Power(dBm) Frequency(GHz) Fig.8. Measured and simulated output powers and drain efficiencies versus frequency at saturation power. Output Power(dBm) Frequency(GHz) Fig.9. Measured and simulated output powers and drain efficiencies versus frequency at 6-dB back-off power. Efficiency_meas Efficiency_simu Power_meas Power_simu Efficiency_meas Efficiency_simu Power_meas Power_simu Drain Efficiency(%) Drain Efficiency(%) 52 Drain Efficiency(%) GHz 1.8 GHz 2.0 GHz 2.2 GHz 2.4 GHz 2.6 GHz Output Power(dBm) Fig.10. Measured CW drain efficiency versus output power. With continuous wave (CW) signals, the measured output powers and drain efficiencies of DPA at saturation are shown in Fig.8. The measured drain efficiency (DE) is more than 50.8%, and the saturated output power of the whole frequency band is about dBm at the input power of 33dBm. the maximum output power reaches 44dBm at 2.1GHz. Fig.9 represents the DPA performance at 7

8 6-dB back-off power. DPA drain efficiency (DE) is more than 41.5% in the above mentioned frequency band. And also the 6-dB back-off output power is about dBm at the input power of 25dBm, relative bandwidth attains to 47%. Besides, Fig.10 shows drain efficiencies of the proposed DPA. The results of proposed DPA have great improvement compared with conventional Doherty. It meets excellent broadband and efficiency characteristics. Table I lists the comparison of some published broadband DPA designs and this work. Table I. Performance summary of broadband DPA Ref Frequency (GHz) DE@ saturation DE@ 6-dB back-off Pout(dBm) [4] % 41% 42 [5] % 50% 50 [6] % 48% This Work %-54% 41.5%-45% Conclusion A modified Doherty power amplifier (DPA) configuration for bandwidth and efficiency operations has been proposed. Principles regarding to the bandwidth and efficiency enhancement mechanism has been analyzed. Measured results show that over 41.5% drain efficiency is obtained at 6-dB back-off condition from 1.6GHz to 2.6GHz. 5 Acknoledgement This work is supported by New Talents in Zhejiang Province plan (No.2016R7065), Key Project of Zhejiang Provincial Natural Science Foundation of China (No.LZ16F010001), Zhejiang Provincial Public Technology Research Project (No.2016C31070), and Graduate student research and Innovation Fund of Hangzhou Dianzi University(No.KYJJ20129), National Natural Science Foundation of China (No ). 8