Inverse Class F Power Amplifier for WiMAX Applications with 74% Efficiency at 2.45 GHz

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1 Inverse Class F Power Amplifier for WiMAX Applications with 74% Efficiency at 2.45 GHz F. M. Ghannouchi, and M. M. Ebrahimi iradio Lab., Dept. of Electrical and Computer Eng. Schulich School of Engineering, University of Calgary Calgary, AB T2N1N4, Canada fghannou@ucalgary.ca; mm.ebrahimi@ucalgary.ca M. Helaoui Green Radio Technologies Inc. Calgary, AB T2M2L7, Canada mhelaoui@gradiotech.com Abstract This work proposes the steps to design a high efficiency inverse class F power amplifier (PA). In the first step, the optimal termination conditions for the inverse class F are extracted through load-pull measurement. Afterward, low loss and precisely tunable output matching network was chosen in order to obtain high efficiency of the PA. The fabrication of an inverse class F power amplifier for WiMAX applications at a carrier frequency equal to 2.45 GHz following the described design procedure is carried out and the obtained results demonstrate a measured power added efficiency equal to 71.5% and drain efficiency equal to 74%. Index Terms Inverse class F, load-pull measurement, matching network loss, switching mode power amplifier I. INTRODUCTION The continuous increase in high data rate requirements over the last years drives the development of new standards such as wireless local area network (WLAN) IEEE a, b and g [1], and worldwide interoperability for microwave access (WiMAX) IEEE [2]. These standards utilize complex modulation and multiple access techniques such as high order quadrature amplitude modulation (64-QAM) and orthogonal frequency division multiplex (OFDM). The improvement in data rate is accompanied with the generation of signals with high peak-to-average power ratio (PAR), which necessitates highly linear transmitter operating in large back-off in order to fulfill the linearity requirements. Such transmitters and operation conditions result in very low power efficiency of the power amplifier (PA) in the wireless transmitter. In order to amplify these signals in a more efficient way, many new designs using advanced transmitter architectures, such as linear amplification with non-linear components (LINC) [3] and delta-sigma (ΔΣ) transmitters [4], have been proposed recently. These architectures transform the envelope varying signal into one or more constant envelope signals. After amplification, the amplitude modulation is restored by combining or filtering the signals. Consequently, more nonlinear but efficient switching mode power amplifiers can be used in the transmitter without introducing linearity degradation. The switching mode power amplifier concept consists of shaping the voltage and current waveforms at the drain level of the transistor in order to reduce the power dissipation. As a result, the transistor works in two discrete states like a switch. In the ON state, the current circulates at the drain level of the transistor and the voltage is zero. In the OFF state, the voltage takes a nonzero value and the current is null. By avoiding the coexistence of the current and voltage, the power dissipation is minimized and higher power efficiency is obtained. The waveforms shaping can be achieved via proper harmonic termination [5]. Depending on the termination conditions, different classes of switching mode PAs have been proposed in the literature. The main classes are class E [6], class F [7], inverse class F [8], voltage mode class D [9] and current mode class D [10]. For high frequency applications, the frequency limitation and loss in the transformers limits the performances of class D PAs. The drain intrinsic capacitance and the loss in the lumped inductor needed to design class E power amplifiers limits the efficiency performances of class E. Class F and inverse class F PAs offer the simplest solution to achieve high efficiency switching mode PAs at gigahertz frequencies. Similarly to other switching mode classes, the design of inverse class F amplifier is very sensitive to a precise matching of the fundamental and harmonic frequencies. A flexible matching network for easy tuning is required to achieve high efficiency. In previous works [11][12] an output matching topology using a transmission line and a stub for each harmonic was proposed. While this topology offers good tuning flexibility, the losses in the stubs may be significant if the design was not optimized, which prevents from achieving high power efficiency performance. In this work, we propose to use a low loss precisely tunable matching network at the transistor output in order to achieve highly efficient switching mode power amplifier design. The paper is organized as follows. In the second section, the concept of inverse class F PA is presented. Section three describes the proposed topology that will be used to design a tunable matching network for the switching mode PA. The load-pull setup and the steps followed to design the inverse class F PA are described in section four. In section five, the optimized PA was designed and measured and its performance was reported /09/$ IEEE

2 II. INVERSE CLASS F SWITCHING MODE POWER AMPLIFIER Inverse class F consists of shaping the waveforms to a square wave for the current and to a half sine wave for the voltage at the drain of the transistor. Fig. 1 shows the ideal current and voltage waveforms of the inverse class F power amplifier. One can clearly observe that for half of the cycle, the current is high and the voltage is null and for the second half of the cycle, the voltage is high and the current is zero. Therefore, their product is zero at each instant, which corresponds to no heat dissipation or to 100% efficiency. To achieve the theoretical 100% efficiency an infinite number of harmonics should be considered in the PA design. Indeed, a square wave is the sum of an infinite number of odd harmonics including the fundamental frequency and the half sine wave is the sum of an infinite number of even harmonics and the fundamental. This is clearly demonstrated in the Fourier series representation of the ideal normalized current, i( fc, t ), and voltage, v( fc, t ), waveforms, where f c is the fundamental frequency: n 3,5,7,... ( nπ 4 4 sin 2 i( fc, t) = 1+ sin( 2π + π π = (1) n π v f, t = 1 sin 2 f t 2 ( c ) ( π c ) ( nπ cos 2 (2) 2 2 n= 2,4,6,... n 1 Consequently, obtaining the desired inverse class F waveform requires presenting open circuits to all odd harmonics and short circuits to all even harmonics, which is difficult to achieve without introducing significant loss at the output of the PA. Practically, it is preferred to limit the harmonic tuning to few of the first harmonics. It was shown that by tuning only the second and third harmonic it is possible to achieve a theoretical efficiency equal to 92% [13]. In this work, only the second and third harmonics are considered. III. OUTPUT MATCHING NETWORK TOPOLOGIES FOR INVERSE CLASS F POWER AMPLIFIER Due to the intrinsic and extrinsic parasitic elements of the transistor, the impedances presented at the harmonic frequencies that optimize the efficiency of the inverse class F PA are generally different from perfect open and short circuits. Complex impedances can be presented provided that they help shaping the waveforms to the inverse class F, which results in efficiency improvement. In the following purely reactive impedances are considered for optimizing the efficiency of the inverse class F PA. The reflection coefficient presented to each of the second and third harmonics is given by: Γ = e ϕ i 2 2 f c Γ = e ϕ i 3 3 f o Fig. 2-a shows the general case of the output matching network topology proposed to be used in the present work. The matching network is composed of a harmonic matching network and a fundamental matching network. Both networks are decorrelated. Indeed, changing the fundamental network should not affect the harmonic matching, which offers the possibility of achieving precise tuning and therefore high efficiency. Each harmonic termination is realized with a shunt stub and a series transmission line. The shunt stub can be openended or short-ended. Its length is chosen to present a short circuit for the frequency of the corresponding harmonic at the junction with the series transmission line in order to be unaffected with the fundamental matching network. The series transmission line tunes the phase of the reflection coefficient to the optimal phase that provides the best waveform shaping. Fig. 2-b shows the special case used in the design of the inverse class F PA in this work. In this case, the second harmonic stub is closer to the drain of the transistor than the third harmonic stub and both stubs are open-ended. In this case, the first stub has a length of λ c 8 and the second stub length is equal to λ c 12, where λ c is the wavelength at the fundamental frequency. S4 (λ/4) S3 Figure 1. Voltage (blue) and current (red) waveforms of an ideal inverse class F PA with infinite harmonic tuning (continuous) and two-harmonic tuning (dotted). (a)

3 from Agilent, which were also used for current consumption reading. A dual channel power meter connected at the input and output of the tuners is used to measure the input and output power of the transistor. The tuners and the instruments are connected to the PC through a general peripheral interface bus (GPIB) where the data are transferred and analyzed. (b) Figure 2. Output matching network architectures of the designed inverse class F PA. (a) general case. (b) The second harmonic is tuned first and two open-ended stubs are used in the harmonic matching. IV. DESIGN OF INVERSE CLASS F POWER AMPLIFIER A. Load-Pull Characterization Fig. 3 shows a block diagram of the load-pull setup used in order to determine the optimal operating conditions for the design of the inverse class F PA. The setup is composed of a test fixture used to connect the transistor to the load-pull setup. At the input, a tuner provides the appropriate input matching for maximum power transfer to the transistor. The output matching is realized with two tuners. The first tuner is used to match the harmonics to reactive impedances. The phases of the reflection coefficients for the second and third harmonics are tuned in order to optimize the overall efficiency of the transistor. The second tuner is used to match the fundamental frequency. The transistor was biased using two DC supplies A 10W transistor CGH010 from Cree Inc was used in the design of the inverse class F PA. The transistor was biased below the threshold voltage at V gs = -3.5 V and V ds = 34 V. The design was achieved for WiMAX applications with a carrier frequency around 2.45 GHz. The harmonic and the fundamental terminations at the output of the transistor were fixed simultaneously through several iterations. The optimization was achieved for an input power (P in ) equal to 25 dbm. The obtained results that optimize the efficiency of inverse class F are shown in Fig. 4. The measured gain (G) was 14.9 db and the output power (P out ) was equal to 39.6 dbm. At these conditions, the measured power efficiency of the transistor was 78.5% for the drain efficiency and 76% for the power added efficiency (P.A.Eff). These efficiencies were measured at the transistor level without including the loss of the output matching network. This loss, if significant, can deteriorate considerably the efficiency performance of the switching mode power amplifier. In the next section, the loss of the output matching network will be taken into account in the design of the PA in order to optimize the power efficiency. Figure 3. Block diagram of the load-pull setup used to extract the optimal terminations of the transistor for inverse class F operation.

4 2f c 3f c matching conditions for the highest efficiency. The output matching network topology was chosen in order to offer great tuning capabilities while maintain low loss at the output of the PA, which results in a state-of-the-art power added efficiency of 71.2% for a design using packaged transistor at 2.45 GHz. The optimized PA was fabricated and tested. Measurement results were in accordance with the simulation results. f c 2f c 3f c Figure 4. Screen capture of the measured results after load-pull optimization of the inverse class F power amplifier. B. Output Matching Network Design Using the characteristics of the substrate RT5870 from Rogers Inc and Ptolemy simulation in advanced design system (ADS) from Agilent Inc., the matching network that follows the topology of Fig. 2-b were designed. The loss of this matching network was simulated through momentum simulation in order to ensure low loss. A loss equal to 0.25 db was obtained for the entire circuit including the harmonic matching and the fundamental matching networks. From the load-pull measurement and the simulation results, the drain efficiency and the power added efficiency that can be obtained by the proposed design are estimated to be equal to 74% and 71.5%, respectively. V. MEASUREMENT RESULTS Using the matching network topology designed in the previous section, the inverse class F power amplifier was fabricated and tested. Fig. 5 shows a photograph of the fabricated PA. The measured power added efficiency and output power versus input power and frequency are plotted in Fig. 6 and Fig. 7 respectively. The PA delivers an output power equal to 39.4dBm with power added efficiency equal to 71.2%. These results are very close to the results predicted by simulation showed in the previous section. Figure 5. Photograph of the fabricated inverse class F PA. P.A.Eff (%) P.A.Eff Pout Pin(dBm) Pout(dBm) Figure 6. Measured output power and power added efficiency versus input power of the fabricated inverse class F PA. VI. CONCLUSION In the present work, an inverse class F PA was design for WiMAX applications at carrier frequency around 2.45 GHz. Load-pull measurements was carried out in order to extract the

5 P.A.Eff(%) P.A.Eff Pout Pout(dBm) [10] T.-P. Hung, A. G. Metzger, P. J. Zampardi, M. Iwamoto, and P. M. Asbeck, Design of high-efficiency Current-Mode Class-D amplifiers for wireless handsets, IEEE Transactions on Microwave Theory and Techniques, vol. 53, no. 1, pp , [11] P. Colantonio, F. Giannini, L. Scucchia, Method to Design Distributed Harmonic Matching Networks, The European Microwave Integrated Circuits Conference, pp , Sep [12] M. Helaoui, F. Ghannouchi, Optimizing Losses in Distributed Multi- Harmonic Matching Networks Applied to the Design of an RF GaN Power Amplifier with Higher than 80% Power Added Efficiency, IEEE Trans. on Microwave Theory and Techniques, to be published, Feb [13] J.D. Rhodes, Output universality in maximum efficiency amplifiers, Int. J. Cir. Theor. Appl., vol. 31, no. 4, pp , Frequency(GHz) Figure 7. Measured output power and power added efficiency versus frequency of the fabricated inverse class F PA ACKNOWLEDGMENT This work was supported by the Natural Sciences and Engineering Research Council of Canada (NSERC), by the Alberta s Informatics Circle Of Research Excellence (icore), by the Canadian Research Chair (CRC) and by TRLabs. The authors would like to thank Christopher Simon, Department of Electrical and Computer Engineering, Schulich School of Engineering, University of Calgary, for providing technical support during the measurements and Agilent Technologies for Advanced Design System (ADS) software donation. REFERENCES [1] Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) Specifications High-speed Physical Layer in the 5 GHz Band, IEEE Std a, [2] Part 16: Air Interface for Fixed Broadband Wireless Access Systems - Physical and Medium Access Control Layers for Combined Fixed and Mobile Operation in Licensed Bands, IEEE Std e [3] D. C. Cox, Linear amplification with nonlinear components, IEEE Trans. on Communications, Vol. 23, Dec. 1974, pp [4] M. Helaoui, S. Hatami, R. Negra, F. M. Ghannouchi, A Novel Architecture of Delta-Sigma Modulator Enabling All-Digital Multiband Multistandard RF Transmitters Design, IEEE TCAS-II Technical Briefs, to be published, Nov [5] A. Grebennikov, N.O. Sokal, Switchmode RF Power Amplifiers, Burlington MA, Elsiver, [6] N.O. Sokal, A.D. Sokal, Class E-A new class of high-efficiency tuned single-ended switching power amplifiers, IEEE Journal of Solid-State Circuits, vol. 10, iss. 3, pp , June [7] A.V. Grebennikov, Circuit design technique for high efficiency class F amplifiers, IEEE International Microwave Symposium, Jun. 2000, pp [8] Y.Y. Woo, Y. Yang, B. Kim, Analysis and experiments for highefficiency class-f and inverse class-f power amplifiers, IEEE Transactions on Microwave Theory and Techniques, vol. 54, iss. 5, pp , May [9] J.H. Jeong, H.H. Seong, J.H. Yi, G.H. Cho, A class D switching power amplifier with high efficiency and wide bandwidth by dual feedback loops, International Conference on Consumer Electronics, pp , June 1995