Systematic Approach for Design of Broadband, High Efficiency, High Power RF Amplifiers

Transcription

1 Systematic Approach for Design of Broadband, High Efficiency, High Power RF Amplifiers Seyed Alireza Mohadeskasaei, Jianwei An, Yueyun Chen, Zhi Li, Sani Umar Abdullahi, and Tie Sun This paper demonstrates a systematic approach for the design of broadband, high efficiency, high power, Class- AB RF amplifiers with high gain flatness. It is usually difficult to simultaneously achieve a high gain flatness and high efficiency in a broadband RF power amplifier, especially in a high power design. As a result, the use of a computer-aided simulation is most often the best way to achieve these goals; however, an appropriate initial value and a systematic approach are necessary for the simulation results to rapidly converge. These objectives can be accomplished with a minimum of trial and error through the following techniques. First, signal gain variations are reduced over a wide bandwidth using a proper pre-matching network. Then, the source and load impedances are satisfactorily obtained from small-signal and load-pull simulations, respectively. Finally, two highorder Chebyshev low-pass filters are employed to provide optimum input and output impedance matching networks over a bandwidth of 1 MHz 5 MHz. By using an EM simulation for the substrate, the simulation results were observed to be in close agreement with the measured results. Keywords: Broadband, Class-AB, Matching network, Power amplifier. Manuscript received June 28, 216; revised Oct. 7, 216; accepted Oct. 17, 216. Seyed Alireza Mohadeskasaei (corresponding author, alireza.kasaee@gmail.com), Jianwei An (ajw626@126.com), Yueyun Chen (chenyy@ustb.edu.cn), Zhi Li (lizhi87218@gmail. com), Sani Umar Abdullahi (umarsani@gmail.com), and Tie Sun (suntie165@163.com) are with the Department of Communication, School of Computer and Communication, University of Science and Technology Beijing, China. This is an Open Access article distributed under the term of Korea Open Government License (KOGL) Type 4: Source Indiction + Commercial Use Prohibition + Change Prohibition ( I. Introduction Power amplifiers (PAs) are one of the most significant ingredients of many communication systems. Four important requirements, namely, the efficiency, linearity, low noise, and broadband frequency response, must be considered when designing PAs [1] [3]. For broadband power amplifiers, one of the most difficult challenges lies in determining how to achieve a high signal gain and high power level while maintaining a low power dissipation. In other words, how to achieve high efficiency. At the same time, gain variation throughout the band causes more challenges for modern signal modulation techniques, such as quadrature amplitude modulation. In wideband applications, linear classes, such as Class-A, Class-B, and Class-AB, are widely employed because they provide appropriate bandwidths and acceptable signal gains [4] [5], but their efficiency is not as high as that of harmonictuned classes, such as Class-E and Class-F [6] [7]. Various aspects resulting from recent research on broadband PAs are summarized in Table 1. According to this table, a Class-F PA exhibits a high power-added efficiency (PAE); however, the bandwidth cannot be too wide or the next harmonics will fall inside the required bandwidth [6]. In Table 1, Reference [8], which has the best performance to date and uses a balun impedance transformer, shows 2 db gain variation, and covers a 199% bandwidth from 2 MHz 8 MHz. The other previous designs listed in the table are incapable of providing a better gain flatness. Two of the main challenges in realizing broadband highefficiency PAs with flat gain characteristics are in how to achieve proper load and source impedances, and how to realize proper input-output matching networks. Various approaches and structures can be employed to realize a broadband PA, including a balanced-unbalanced load [8], an equalizer [9] [1], an envelope modulator [11] [12], a push-pull structure ETRI Journal, Volume 39, Number 1, February Seyed Alireza Mohadeskasaei et al. 51

2 Table 1. Performance comparison of reported broadband PAs. Ref. Class BW (GHz) BW G Peak power (%) * (db) (W) PAE (%) Tech. 211[6] F GaN 212[4] AB GaN 213[5] AB GaN 214[19] AB > 46 LDMOS 215[8] A, AB LDMOS This work AB LDMOS 2( f f ) f f max min * BW (%) = 1 max min Start Choice of transistor & dc bias point Stability & PMN design Determine source impedance by small-signal simulation Determine load impedance by load pull simulation Meet requirements? No [13], a cascade [14] [15], or a Doherty structure [16] [17], but these are not able to simultaneously realize high-efficiency and high gain flatness at maximum output power. In this paper, we propose a systematic approach for realizing a high-efficiency high-power broadband RF amplifier with flat gain. The first stage in the process consists of choosing a proper transistor and determining the dc bias point, which depends on the particular PA application. The second stage involves the application of a pre-matching network (PMN) for the chosen transistor. Using a PMN, the load and source impedance variations caused by transistor roll-off effects can be substantially controlled, thereby simplifying the design of the input and output matching networks (IMN and OMN, respectively). After the PMN is designed, the source and load impedances can be appropriately estimated using small-signal and load-pull simulations, respectively. Finally, two high-order Chebyshev low-pass filters in the input and output matching networks are designed in order to provide an optimal match between the active device and the network. This design methodology is explained in greater detail in the next section. The systematic design procedure was validated using a 25 W Freescale MRFE6VS25L laterally diffused metal-oxide semiconductor (LDMOS) transistor as an active device, and the approach led to a less than.6 db gain variation over a bandwidth wider than one octave. To the best of our knowledge, this is the lowest gain variation reported so far over such a wide bandwidth. II. Design Methodology The design of an RF PA entails various critical steps that must be executed with due care and attention in order to achieve an optimal design. The major design requirements for this research include: 25 W output power over 1 MHz 5 MHz, gain variation less than 1 db, PAE greater than 5%, and inter-modulation distortion (IMD) better than 3 dbc. The design methodology that was applied in this research is Design & implement IMN & OMN Test & measurement End Yes Fig. 1. Design procedure of a broadband power amplifier. illustrated in the flowchart shown in Fig. 1. First, the choice of transistor technology and dc quiescent point (Q-point) are discussed. Second, the stability problem and PMN are explained, and the performance improvements in both stability and gain flatness due to the use of an appropriate PMN are shown. The third step discusses the process of obtaining the proper source and load impedances. Finally, the IMN and OMN are designed in step 4 in order to ensure a suitable match between the device and network. 1. Choice of Transistor and dc Bias Quiescent Point Due to certain unique features of GaN HEMTs, such as high electron mobility, wide band gap, and low thermal resistance, these transistors have recently become quite popular in PA designs [18]. Such attractive features usher in the possibility of high temperature and high power density operation when GaN HEMTs are utilized. On the other hand, LDMOS technology has recently undergone advanced modifications and enhancements that yield numerous advantages, and is a popular transistor choice for radio and broadcast applications [8], [14], [19], [2]. In this research, we employed a 25 W MRFE6VS25L LDMOS due to its low cost, high reliability, and acceptable gain flatness over 1 MHz 5 MHz. One of the most important steps in PA design is the selection of the dc bias Q-point for the RF transistor, which is dependent on the particular application. In determining a proper Q-point, some tradeoffs must be considered, such as the desired output power, gain, efficiency, IMD, and low noise, 52 Seyed Alireza Mohadeskasaei et al. ETRI Journal, Volume 39, Number 1, February 217

3 which have been well described in [21]. Theoretically, a deep Class-AB PA can provide high-power and high-efficiency in broadband applications. In such PAs, the maximum drain voltage can be almost two times the drain dc supply voltage (VDD). Therefore, in order to avoid the breakdown voltage region, less than half of the breakdown voltage is an appropriate choice for the drain dc bias point. Hence, 5 V was selected as the drain bias voltage of the mentioned transistor, since the breakdown voltage region starts at 11 V. For deep Class-AB operation, the gate voltage was determined to be 2.9 V, which corresponded to a 27 ma drain-source current. 2. Stability and Pre-Matching Network During the PA design process, one of the most important considerations is to avoid oscillation. The amplifier must be stable and not oscillate at any frequency under normal operating conditions. A relatively simple criterion for unconditional stability, which was proposed in [22] and has been widely accepted, is given as: and K 1 S S22 2 S S S S (1) S S, (2) where S ij denotes the scattering matrix elements. Thus, to obtain unconditional stability, the criteria K > 1 and < 1 must be satisfied. The values of S ij were extracted from a nonlinear model provided by the manufacturer of the selected LDMOS transistor and substituted into (1) and (2) to obtain values of K and. Figure 2 shows the small-signal simulation results for the K and factors of the selected LDMOS transistor across the band. In this case, the K factor was less than 1, which may lead to oscillation as a result. For the design procedure in this work, we first investigate whether the proposed transistor can be considered as unilateral (S 12 = ), since the PA design procedure for a unilateral transistor is much simpler. This investigation was carried out through the use of the unilateral figure of merit, which is sometimes called the U-factor as explained at length in [23]. The U-factor predicts the amount of error between the unilateral case and the actual design. In this work, a smallsignal simulation showed that the maximum unilateral figure of merit was up to 7 db throughout the band, as shown in Fig. 3. Such a large error is unacceptable and, hence, the proposed design in its current state was far from unilateral. The solution, therefore, is to use a PMN, as specified in Fig. 4. A simple series resistor-capacitor circuit in shunt configuration with the input of the transistor not only produced K Fig. 2. Simulated K and Δ factor for the selected LDMOS transistor, using manufacturer-provided model. U-factor (db) Fig. 3. U-factor simulation results for the selected LDMOS transistor with different values of R1. dc block Vg R1 = 2 Ω R1 = 16 Ω R1 = 12 Ω Vgg 2.9 V Pre-matching network RFC R1 C1 Gate lead Without PMN RFC Drain lead MRFE6V25L With PMN dc block Fig. 4. Simulated circuit with pre-matching network Vdd 5 V the necessary stability, but also effectively reduced the U-factor. Further reduction of the U-factor led to a sharp drop in the signal gain, and therefore a tradeoff was required, as shown in Fig. 5. The design requirements were 17 db small signal gain (16 db gain at the 1 db gain compression point), and less than 1 db gain variation throughout the band. Therefore, R1 = 12 Ω was found to be a good choice to achieve these design requirements, and it became prohibitive to reduce the U-factor beyond this point. The main advantage of using a PMN in the amplifier structure is that it is able to reduce the gain variation over a wide bandwidth, as shown in Fig. 5. Thus, the presence of the PMN makes it much easier to design the matching networks. Another advantage of using the PMN is that it effectively changes the K and factors required to satisfy the stability Z L Δ factor ETRI Journal, Volume 39, Number 1, February 217 Seyed Alireza Mohadeskasaei et al. 53

4 Small-signal gain (db) db 1.5 db Without PMN With PMN R1 = 2 Ω R1 = 16 Ω R1 = 12 Ω G IMN = MHz G IMN = MHz G IMN = MHz G IMN = MHz G IMN = MHz Z = Ω Fig. 5. Small-signal simulation results for different values of R1. Fig. 7. Constant-gain circles of G IMN, including the optimum source impedance. Table 2. Small-signal gains. K Δ factor Freq. G ut (db) G (db) G IMN + G OMN (db) Assumed G IMN (db) Assumed G OMN (db) Fig. 6. Simulation results for the K and Δ factor with PMN. criteria, as shown in Fig Load and Source Impedances At small-signal levels, most linear PAs exhibit linear behavior, and any non-linear effects are negligible. However, for large signal levels, the non-linear behavior must be considered. Up to now, a loadsource-pull analysis, which is based on harmonic balance simulation and non-linear analysis, has been the best approach for determining the proper load and source impedances. This type of simulation uses a contour on the Smith-chart on which a parameter, such as the PAE, output power, signal gain, noise, or IMD, versus different load or source impedances can be considered. Fortunately, the Advanced Design System (ADS) software package from Agilent includes an EDA tool that can be used to perform loadsource-pull simulations. These simulations should be performed at least twice when calculating the optimal impedances, due to the reliance of the results on the initial values of the load and source impedances [24]. A proper initial value for the source impedance is necessary in order for the simulation to converge to a proper point. This can be addressed by using the traditional constant-gain circles approach to rapidly determine the optimum source impedance.4 [21], since the proposed transistor has been translated to a unilateral component. Although this approach is more typically employed in small-signal simulations, it can also provide a proper initial value for broadband designs. In this approach, the unilateral transducer gain (G ut ) can be represented by three independent gains (or losses) given by [21]: G ut (db) = G IMN (db) + G (db) + G OMN (db), (3) where G is the transistor gain, and G IMN and G OMN are the gain or loss obtained by the IMN and OMN, respectively. Gain G is limited by transistor technology, while G IMN and G OMN are the desired values of the gains or losses and must be chosen in such a way that the source impedance becomes a real-valued impedance, since a real-valued impedance is simply matched by the network over a wide bandwidth. The value G ut = 17 db was selected because it provides at least 16 db signal gain at the 1 db gain compression point (P- 1dB). The assumed signal gains for the IMN and OMN are listed in Table 2 and plotted in Fig. 7. Thus, the input source impedance was determined to be Z s = 5 Ω. After obtaining an appropriate source impedance, the loadpull simulation was performed, and the results for the output power and PAE are shown in Figs. 8(a) and 8(b) for a source power level of 28 dbm, where the overlap between the contours is shaded. The overlapping shaded areas in Figs. 8(a) and 8(b) creates the new shaded area in Fig. 8(c). Two beneficial points can be seen in Fig. 8(c). First, using the PMN has led to the appearance of a shaded area in which the 54 Seyed Alireza Mohadeskasaei et al. ETRI Journal, Volume 39, Number 1, February 217

5 P out = 44 1 MHz P out = 44 2 MHz P out = 44 3 MHz P out = 44 4 MHz PAE = 1 MHz PAE = 2 MHz PAE = 3 MHz PAE = 4 MHz Z in L1 L2 Ln C1 C2 Cn Z out Fig. 9. Ladder topology of low-pass filter. (a) PAE > 55% & P out > 44 dbm over 1 MHz 4 MHz (c) 4 MHz 3 MHz 2 MHz 1 MHz Fig. 8. Load-pull simulation results: (a) P out contours, (b) PAE contours, (c) overlapping area of PAE and output power contours, and (d) frequency response of RL series circuit. (b) Series RL frequency response (R = 22.5 Ω, nh) gain variation is less than 1 db. Second, since the shaded area is bounded by 55% PAE and 44 dbm output power contours, it is possible to simultaneously reach a 55% PAE and 44 dbm output power with a proper matching network that covers this area throughout the band. Thus, a simple series RL circuit (R = 22.5 Ω, nh) can meet the requirement, as shown in Fig. 8(d). Although the frequency response of such a simple matching network is seen to be outside the shaded area, especially in the low-frequency (1 MHz) range, it is completely enclosed by the 1 MHz (green color) load-pull contours provided in Figs. 8(a) and 8(b), and therefore also meets the requirements. Finally, the OMN can be a combination of a 1 nh inductor with a real-to-real network for matching 22.5 Ω to 5 Ω. 4. Input and Output Matching Networks Several approaches have been proposed for realizing broadband matching networks, such as lumped or distributed impedance transformers [25] [26], multiple transmission line sections [27], magnetic coupling networks [28], and multistage ladder networks [29]. Here, a practical method for realizing a real-valued (5 Ω) to real-valued impedance is proposed, which is based on Chebyshev polynomial approximation and is detailed in the steps below. The first step is to use a traditional Chebyshev low-pass filter (d) (LPF) design, which is explained in [3]. The ladder topology for the LPF is depicted in Fig. 9. The maximum allowed passband ripple for the matching network is estimated to be less than.15 db throughout a fractional bandwidth of one octave. The impedance transformation ratio is given by [23]: r R 1, (4) R2 where R 1 is the characteristic impedance of the network, which in this case is 5 Ω, and R 2 is the input resistance value of the filter. Hence, the r-ratio of the input filter is 55 = 1, and that for the output filter is = 2.2. The required value of n, which is defined as the order of the Chebyshev low-pass prototype, can be easily determined with the aid of the tables provided in [3, Tables 1 5]. According to these Tables, the values n = 1 for the input filter and n = 4 for the output filter meet the required pass band ripple. The normalized element values can be extracted from reference [3, Tables 6 1]. The scaled element values of the low-pass filter can be calculated using: R C k k R r, (5) k c 1 Ck, (6) c r c Lk Lk r, (7) c where R,,, = 1,2,..., and k Ck Lk k c (fractional bandwidth) are the filter elements of the normalized design (low-pass prototype) and R k, C k, L k, and ω c (center radian frequency) are the filter elements of the scaled design. The normalized (g-elements) and scaled elements are shown in Fig. 1. The simulation results with c 1 for the IMN and OMN are shown in Fig. 11. In order to save space and have a symmetrical matching network, it is possible to divide the capacitor into two equal sections. The resulting IMN and OMN are depicted in Figs. 12(a) and 12(b). It is not possible to specify exact values for both the capacitors and inductors at the same time. For this reason, it was decided to use standard values for the capacitors, while the inductor values were optimized by the software. The next step is to replace inductors by short high- ETRI Journal, Volume 39, Number 1, February 217 Seyed Alireza Mohadeskasaei et al. 55

6 Z in = 5 Ω g = 1 g 1 =.9 L 1 = 2.1 nh g 2 =.8 C 1 = 74 pf g 3 = 2.1 L 2 = 5 nh g 5 = 3.53 L 3 = 8.4 nh g 4 =.584 g 6 =.353 C 2 = 55.8 pf C 3 = 33.7 pf g 7 = 5.84 L 4 = 14 nh g 8 =.21 C 4 = 2 pf g 9 = 7.77 L 5 = 18.5 nh g 1 =.9 C 5 = 8.4 pf 5 Ω g 11 = 1 C 2 = 37 pf C 4 = 27.9 pf C 1 = 16.8 pf C 8 = 1 pf C 1 = 4.2 pf L 1 = 2.1 nh L 2 = 5 nh L 3 = 8.4 nh L 4 = nh L 5 = 18.5 nh (a) Z in = 5 Ω C 1 = 37 pf C 3 = 27.9 pf C 5 = 16.8 pf C 7 = 1 pf C 9 = 4.2 pf 5 Ω Z in = 22.5 Ω g = 1 g 1 =.89 L 1 = 9.5 nh g 2 =.76 C 1 = 16 pf g 3 = 1.7 L 2 = 18 nh g 4 =.4 C 2 = 8.5 pf 5 Ω g 5 = 2.2 C 2 = 8 pf (a) C 4 = 4.25 pf (b) nh L 1 = 9.5 nh L 2 = 18 nh Fig. 1. Normalized and scaled element values: (a) input network and (b) output network. Z in = Z L C 1 = 8 pf C 3 = 4.25 pf 5 Ω Return loss (db) Return loss (db) (a) (b) Fig. 11. Insertion and return loss for matching networks: (a) IMN and (b) OMN impedance transmission line sections, as explained in [23]. An FR4 microstrip substrate was fabricated, with d = 2 mm, ε r = 4.2, tan δ =.2, and a.5-mil copper conductor thickness. The transmission line impedance must be as high as possible, implying that its capacitive effects can be ignored. Conservatively, the narrowest practical track width on the FR4 board was.45 mm, which was equivalent to 125 Ω at the center frequency. According to the approximate equivalent circuit theory in [23] for short transmission line sections, the electrical lengths of high-impedance transmission lines can be obtained as: Insertion loss (db) Insertion loss (db) (b) Fig. 12. Symmetrical arrangement for matching networks: (a) IMN and (b) OMN. Table 3. Transmission line dimensions of the IMN. Element Z h (Ω) βl (deg) Width (mm) Length (mm) L L L L L Table 4. Transmission line dimensions of the OMN. Element Z h (Ω) βl (deg) Width (mm) Length (mm) L L LR k l, (8) Zh where Z h is the highest practical line impedance of the substrate, L k is the normalized inductor element (g-elements), and R is the normalized filter impedance (5 Ω). The final physical dimensions of the short transmission lines are shown in Tables 3 and 4 for the IMN and OMN, respectively. The final input and output matching circuits after optimization are shown in Fig. 13. The microstrip board layer of the PA, including the capacitor values, is depicted in Fig. 14. Lastly, the optimization and EM simulation using Agilent ADS software were carried out on the amplifier substrate to characterize the microstrip junction and electromagnetic effects [31]. 56 Seyed Alireza Mohadeskasaei et al. ETRI Journal, Volume 39, Number 1, February 217

7 w = 3.9 L = 2 Z = 5 Ω C = 4.3 pf w = 3.9 L = 2 C = 4.3 pf C = 12 pf C = 18 pf L = C = 27 pf C = 39 pf 1.25 L = 6.15 C = 12 pf C = 18 pf C = 27 pf C = 39 pf w = 5.5 L = 5.3 Transistor input w 1 =.45 mm w = 1.6 L =.5.2 Transistor output C = 4.9 pf w = 1.6 L = w = 1.6 L = 8 C = 4.9 pf C = 2.2 pf w = 1.6 L = 8 L = 26.6 w = 1.6 L = 8 C = 2.2 pf w = 3.9 L = 2 w 1 =.45 L = 8 w = 3.9 L = 2 Z = 5 Ω (a) (b) Fig. 13. Optimized component values (all dimensions in mm): (a) IMN and (b) OMN. Microstrip dimensions: [lengthwidth] (mm) Gate bias circuit RFC RFC Drain bias circuit 4.3 pf [ ] 12 pf 18 pf [ ] 27 pf 39 pf [81.6] [ ] 4.9 pf 1.9 pf [81.6] [ ] Vs 4.3 pf 12 pf 18 pf 27 pf 39 pf [ ] [ ] [5.3.45] 12 Ω 4.9 pf 1.9 pf 5 Ω Fig. 14. Microstrip board layer of PA with capacitor values. III. Experimental Results dc bias network In this section, the fabrication and test set-up is introduced, and then the simulated and measured results are compared in order to validate the design procedure. Lastly, the IMD performance is evaluated to investigate the linearity performance of the implemented PA. Pre-driver Input matching network Output matching network 1. Fabrication and Test Setup The PA was fabricated on an FR4 substrate board, as specified in the previous section. The fabricated PA is shown in Fig. 15. The transistor, which was impregnated with thermal paste and fixed to a heat sink, was soldered to the PCB. The gate bias was 2.9 V during the simulation; therefore, the gate bias circuit had to be adjusted to 2.9 V before connecting to the gate circuit. Five large capacitors for dc blocking and bypassing were used to provide a proper RF short circuit throughout the band. Two 1 uh RF-chokes (low current for the gate bias and high current for the drain bias) were employed to isolate the gate and drain bias networks from the RF circuit. The dimensions of the circuit with pre-amplifier are 2 cm 5 cm. A block diagram of the PA test bench is depicted in Fig. 16. An Agilent E4433B signal generator provided an RF Signal generator Fig. 15. Fabricated power amplifier. -dbm RF cable dc power supply D.U.T 5 V 4-dB High power attenuator Spectrum analyzer 2-dB RF cable Low power attenuator Fig. 16. Block diagram of power amplifier test bench. continuous wave signal. It was amplified by a broadband preamplifier (Triquent-TQP7M915) to provide a sufficiently large driving power level of approximately P in = 28 dbm. The PA output was connected to a high power attenuator (attention ETRI Journal, Volume 39, Number 1, February 217 Seyed Alireza Mohadeskasaei et al. 57

8 = 4 db, maximum peak power = 1 W) and then a 2-dB low-power attenuator to not only provide a good 5 Ω dummy load, but also to protect the test equipment as well. An Agilent E4448 spectrum analyzer was used to measure the frequency response and IMD of the PA. 2. Results The PA was swept over 5 MHz 55 MHz in 2 MHz frequency steps using a single-tone continuous wave RF signal generator. The gate bias voltage was 2.9 V for the simulation, but was adjusted to 2.95 V when the fabricated circuit was being tested to provide a 27 ma drain-source current which matched the simulated circuit. There are two main limitations to increasing the input drive power: the maximum junction temperature and the drain breakdown voltage of the transistor. The junction temperature rise can be followed by a heat sink temperature rise if the input level is slowly increased. In this design, the heat sink chosen was not well suited for dissipating the heat quickly; therefore, an RF pulse signal was used instead for investigating the performance of the PA. The duty cycle of the RF pulse signal was 1% and its pulse repetition frequency (PRF) was 1 khz. The simulated and measured power gain, output power, and PAE are shown in Fig. 17. The minimum output power was 44.2 dbm at 1 MHz, while its maximum was 44.8 dbm at 5 MHz. Therefore, the slight gain variation was close to.6 db over this band. The maximum PAE was 63.6% at 1 MHz and the P-1dB point (P in = 28 dbm), while the minimum PAE was 52% at 35 MHz. The measured PAE was greater than 55% over 1 MHz 23 MHz and 43 MHz 5 MHz. Figure 18 shows the measured results for the fundamental harmonic output power, gain, and PAE versus the input power at 25 MHz. These results also show that a higher PAE and higher output power is possible, as long as a lower gain is acceptable. The PA was also characterized under different drain voltages. Figure 19 shows the measured gain, output power, and PAE at 25 MHz when the drain voltage was swept from 4 V 6 V at P in = 28 dbm (P-1dB point). This also shows the trade-off between gain and efficiency as well. The efficiency was greater than 52% at 25 MHz and the 6 V drain bias point. 3. IMD Performance The IMD performance of the PA was measured using a twotone signal with equal amplitude (P in1 = P in2 ) and a 1 MHz frequency-separation. The PA was fed by the signal obtained by combining the RF signals of two highly linear commercial pre-drivers. The original RF signals were generated by two Agilent E4433B RF-generators and the output signal was Gain (db), Pout (dbm) Meas. Sim Fig. 17. Measured (solid) and simulated (dashed) output power, gain, and PAE at P in = 28 dbm. Gain (db) + 2, Pout (dbm) P out PAE Gain PAE Gain Fig. 18. Measured output power, gain, and PAE versus input power at 25 MHz. Gain (db) + 2, Pout (dbm) P out Input power, P in (dbm) PAE P out Gain Drain voltage (V) Fig. 19. Measured output power, gain, and PAE versus drain voltage 25 MHz. measured using an Agilent E4448 spectrum analyzer. The onboard pre-driver was not used for the test in order to easily adjust the input power level, and the PA was derived from the direct input port. A block diagram of the IMD test setup is depicted in Fig. 2. The input powers, P in1 and P in2, were simultaneously swept from 18 dbm 28 dbm in steps of.2 dbm. The measured IMD included third-order and fifthorder versus fundamental output powers of the two tones (P out PAE (%) PAE (%) PAE (%) 58 Seyed Alireza Mohadeskasaei et al. ETRI Journal, Volume 39, Number 1, February 217

9 Signal generator dc power supply Spectrum analyzer 43 dbc and the IM5 was below 45 dbc throughout the band. IV. Conclusions IM3 (dbc) Signal generator Same RF cables Two same high-linear PAs Same RF cables P in1 P in2 RF power combiner D.U.T 5 V Fig. 2. Block diagram of IMD test setup. Upper side-band Lower side-band 4-dB 2-dB High power attenuator P out 1&2 (dbm) RF cable Low power attenuator Fig. 21. Measured IMD performance showing third-order and fifth-order IMD level versus the fundamental output power (P out1 and P out2 ), at 25 ±.5 MHz. IM3 (dbc) Upper side-band Lower side-band Fig. 22. Measured IMD level versus center frequency with 1-MHz frequency separation and P in1 = P in2 = 22 dbm. and P out2 ), as depicted in Fig. 21. The third-order (IM3) and fifth-order (IM5) were measured at P out1 = P out2 = 38 dbm and found to be 58 dbc and 61 dbc, respectively. The IM3 and IM5 were also below 3 dbc and 45 dbc, respectively, at a 43 dbm output power (worst case), which indicated satisfactory linearity performance. Figure 22 shows the IMD performance versus the center frequency of both two-tone signals under the above mentioned conditions at P in1 = P in2 = 22 dbm. The IM3 was below IM5 (dbc) IM5 (dbc) In this paper, a systematic approach was proposed for the design of a broadband, high efficiency, high power RF amplifier with high gain flatness that was based on the accurate design of the PMN, IMN, and OMN. To the best of our knowledge, this is the first time that a systematic approach has been proposed for realizing broadband Class-AB PAs based on a single transistor. The amplifier was simulated and fabricated using a 25 W Freescale LDMOS MRFE6VS25L as the active device. The results obtained demonstrate the feasibility of the approach by delivering at least 44.5 ±.3 dbm of output power and 16.5 ±.3 db of gain with greater than 52% PAE throughout the band. It would be possible to achieve an even better gain flatness by increasing the order of the filter; however, this would lead to lower gain. This amplifier can be employed in the driver stage of a broadband high-power amplifier (HPA) because of its particular gain flatness. Acknowledgement This work was supported by the National Science and Technology Key Projects No. 216ZX321-4, the National High-Tech R&D Program (863 Program) No. 215AA131, and the National Science and Technology Major Project No. 215ZX3141. References [1] C. Sánchez-Pérez et al., Optimization of the Efficiency and Linearity in RF Power Amplifiers Under Load Variations Using a Reconfigurable Matching Network, IEEE Veh. Technol. Conf. Fall, Ottawa, Canada, Sept. 6 9, 21, pp [2] P. Medrel et al., Time Domain Envelope Characterization of Power Amplifiers for Linear and High Efficiency Design Solutions, IEEE Annu. Wireless Microw. Technol. Conf., Orlando, FL, USA, Apr. 7 9, 213, pp [3] W. Ga et al., A Highly Linear Low Noise Amplifier with Wide Range Derivative Superposition Method, IEEE Microw. Wireless Compon. Lett., vol. 25, no. 12, Dec. 215, pp [4] J.J. Yan et al., Design of a 4-W Envelope Tracking Power Amplifier with More Than One Octave Carrier Bandwidth, IEEE J. Solid-State Circuits, vol. 47, no. 1, Oct. 212, pp [5] J.J. Ya et al., Broadband High PAE GaN Push-Pull Power Amplifier for 5 MHz to 2.5 GHz Operation, IEEE MTT-S Int. Microw. Symp. Dig., Seattle, WA, USA, June 2 7, 213, pp [6] N. Tuffy, A. Zhu, and T.J. Brazil, Novel Realisation of a ETRI Journal, Volume 39, Number 1, February 217 Seyed Alireza Mohadeskasaei et al. 59

10 Broadband High-Efficiency Continuous Class-F Power Amplifier, European Microw. Integr. Circuits Conf., Manchester, UK, Oct. 1 11, 211, pp [7] B. Kim et al., Broadband Operation of Saturated Amplifier with High Efficiency, IEEE Annu. Wireless Microw. Technol. Conf., Tampa, FL, USA, June 6, 214, pp [8] K. Li et al., A 4 W Ultra Broadband LDMOS Power Amplifier, IEEE MTT-S Int. Microw. Symp., Phoenix, AZ, USA, May 17 22, 215, pp [9] Z. Dai et al., A New Distributed Parameter Broadband Matching Method for Power Amplifier Via Real Frequency Technique, IEEE Trans. Microw. Theory Techn., vol. 63, no. 2, Feb. 215, pp [1] X. Ding and L. Zhang, A High-Efficiency GaAs MMIC Power Amplifier for Multi-standard System, IEEE Microw. Wireless Compon. Lett., vol. 26, no. 1, Jan. 216, pp [11] J. Kim et al., Highly Efficient Envelope-Tracking Modulator over Wide Output Power Range for Dual-Mode Power Amplifier, IDEC J. Integr. Circuits Syst., vol. 1, no. 1, 215, pp [12] Z. Wang, Demystifying Envelope Tracking: Use for High- Efficiency Power Amplifiers for 4G and Beyond, IEEE Microw. Mag., vol. 16, no. 3, Apr. 215, pp [13] A. Jundi, H. Sarbishaei, and S. Boumaiza, An 85-W Multioctave Push-Pull GaN HEMT Power Amplifier for High- Dfficiency Communication Applications at Microwave Frequencies, IEEE Trans. Microw. Theory Techn., vol. 63, no. 11, Nov. 215, pp [14] D.Y.T. Wu, L. Zhao, and M. Szymanowski, A 25 W, 2.3 to 2.7 GHz Wideband LDMOS Two-Stage RFIC Power Amplifier for Driver and Small-Cell Doherty Application, European Microw. Integr. Circuits Conf., Paris, France, Sept. 7 8, 215, pp [15] C.Q. Chen et al., A GHz Highly Linear Broadband Power Amplifier for LTE-A Application, Progress Electromagn. Res. C, vol. 66, Apr. 216, pp [16] V. Camarchia et al., The Doherty Power Amplifier: Review of Recent Solutions and Trends, IEEE Trans. Microw. Theory Techn., vol. 63, no. 2, Feb. 215, pp [17] J. Xia et al., A Broadband High-Efficiency Doherty Power Amplifier with Integrated Compensating Reactance, IEEE Trans. Microw. Theory Techn., vol. 64, no. 7, July 216, pp [18] R.S. Pengelly et al., A Review of GaN on SiC High Electron- Mobility Power Transistors and MMICs, IEEE Trans. Microw. Theory Techn., vol. 6, no. 6, June 212, pp [19] N. Giovannelli et al., A 25W LDMOS Doherty PA with 31% of Fractional Bandwidth for DVB-T Applications, IEEE MTT-S Int. Microw. Symp., Tampa Bay, FL, USA, June 1 6, 214, pp [2] N. Kumar and L. Anand, Broadband High Performance Laterally Diffused Metal-Oxide-Semiconductor Power Amplifier for Mobile Two-Way Radio Applications, IET Circuits, Devices Syst., vol. 9, no. 4, July 215, pp [21] G. Gonzalez, Microwave Transistor Amplifiers: Analysis and Design, vol. 61, Englewood Cliffs, NJ, USA: Prentice-Hall, [22] R. Gilmore and L. Besser, Practical RF Circuit Design for Modern Wireless Systems, vol. 2, Norwood, MA, USA: Artech House, 23. [23] D. M. Pozar, Microwave Engineering, Hoboken, NJ, USA: John Wiley & Sons, 29. [24] F.H. Raab et al., Power Amplifiers and Transmitters for RF and Microwave, IEEE Trans. Microw. Theory Techn., vol. 5, no. 3, Mar. 22, pp [25] I. Aoki et al., Distributed Active Transformer-a New Power- Combining and Impedance-Transformation Technique, IEEE Trans. Microw. Theory Techn., vol. 5, no. 1, Jan. 22, pp [26] D. Kuylenstierna and P. Linner, Design of Broad-Band Lumped- Element Baluns with Inherent Impedance Transformation, IEEE Trans. Microw. Theory Techn., vol. 52, no. 12, Dec. 24, pp [27] J. Sevick, A Simplified Analysis of the Broadband Transmission Line Transformer, High Frequency Electron., vol. 3, no. 2, 24, pp [28] T. Jensen et al., Coupled Transmission Lines as Impedance Transformer, IEEE Trans. Microw. Theory Techn., vol. 55, no. 12, Dec. 27, pp [29] R. Zhang et al., A MHz +3 dbm Class-E Power Amplifier in 65nm CMOS, IEEE Radio Frequency Integr. Circuits Symp., Boltimore, MD, USA, June 5 7, 211, pp [3] G.L. Matthaei, Tables of Chebyshev Impedance-Transforming Networks of Low-Pass Filter Form, Proc. IEEE, vol. 52, no. 8, Aug. 1964, pp [31] A. Bhargava, Designing circuits using an EMcircuit cosimulation technique, RF Des., 25, p Seyed Alireza Mohadeskasaei et al. ETRI Journal, Volume 39, Number 1, February 217

11 Seyed Alireza Mohadeskasaei received his BS and MS degrees in Electrical and Electronic Engineering from the Islamic Azad University, Najafabad, Iran, in 23 and 25, respectively. From 28 to 213, he worked for the Information and Communication Technology Institute at the Isfahan University of Technology in Isfahan, Iran. He was the recipient of the 28 first-place Khwarizmi young award with his group. Since 213, he has been with the Department of Communication Engineering, University of Science and Technology Beijing, China, where he is now a PhD candidate. His main research interests are RF power amplifiers, RF power combiners, RF power splitters, and duplexers. Jianwei An is a professor in the School of Computer and Communication Engineering, University of Science and Technology Beijing, China. She received a BS degree from the South China University of Technology, and MS and PhD degrees from Beijing Jiaotong University. Her current research interests include wireless and mobile communications, Massive MIMO, signal processing, radio resource management, cognitive radio, millimeter wave communications, and optimization theory on communications. Sani Umar Abdullahi received his BS degree in Electrical and Electronic Engineering from the Ahmadu Bello University, Zaria, Nigeria, in 23, and his MS degree in Mobile and Satellite Communications from the University of Surrey, Guildford, UK, in 29. Since 213, he has been with the Department of Communication Engineering, University of Science and Technology Beijing, China, where he is now a PhD candidate. His main research interests are interference management and resource allocation in heterogeneous networks. Tie Sun received his PhD degree in automation from the University of Science and Technology Beijing, China, in Since 1978, he has been with the Department of Automation and Electrical Engineering, University of Science and Technology Beijing, China, where he is now a professor. His main research interests are automatic control systems, microcomputers and programming, computer control systems, computer networks, the security of computer networks, digital image processing, image classification, pattern recognition, artificial intelligence, expert systems and application, and intelligent robot control systems. Yueyun Chen is a professor in the School of Computer and Communication Engineering, University of Science and Technology Beijing, China. She received a BS degree from the South China University of Technology, and MS and PhD degrees from Beijing Jiaotong University, china. Her current research interests include wireless and mobile communications, Massive MIMO, signal processing, radio resource management, cognitive radio, millimeter wave communications, and optimization theory on communications. Zhi Li received his BS degree in Computer Science and Technology from the Henan University, China, in 29, and his MS degree in Applied Mathematics from the Henan University and University of Chinese Academy of Sciences, Henan, China, in 213. Since 213, he has been with the Department of Communication Engineering, University of Science and Technology Beijing, Beijing, China, where he is now a PhD candidate. His main research interests are the security and privacy of cloud computing, resource allocation of cloud computing, and game theory. ETRI Journal, Volume 39, Number 1, February 217 Seyed Alireza Mohadeskasaei et al. 61