You CAN Do Digital Filtering with an MCU!

Transcription

1 You CAN Do Digital Filtering with an MCU! Kevin P King - Senior Staff Application Engineer Class ID: CC13B Renesas Electronics America Inc.

2 Kevin P King Senior Staff Application Engineer RX DSP Library Development Team Numerous Motor Control and Medical App notes 2010 Patent Award for Motor Control Education Electrical Engineering, University of Lowell (Edward B Van Dusen Award for Academic Achievement) Thirty years of Embedded Design Experience (x86, HC05, HC11, 8051, Philips XA, Atmel AVR, Hitachi, Mitsubishi, etc... Five years of Emulator design for MetaLink COP8, 68HC05, 68HC11, 8051 (multi-vendors), National CR16, Hitachi H8/500, etc... Multiple Quality Awards for Embedded Software & Hardware Development. Specialty is Embedded System Design - MCU firmware & hardware 2

3 Renesas Technology & Solution Portfolio 3

4 8/16-bit 32-bit Microcontroller and Microprocessor Line-up DMIPS, Superscalar Automotive & Industrial, 65nm 600µA/MHz, 1.5µA standby 500 DMIPS, Low Power Automotive & Industrial, 90nm 600µA/MHz, 1.5µA standby 165 DMIPS, FPU, DSC Industrial, 90nm 200µA/MHz, 1.6µA deep standby 25 DMIPS, Low Power Industrial & Automotive, 150nm 190µA/MHz, 0.3µA standby 10 DMIPS, Capacitive Touch Wide Industrial Format & LCDs Automotive, 130nm 350µA/MHz, 1µA standby 1200 DMIPS, Performance Automotive, 40nm 500µA/MHz, 35µA deep standby 165 DMIPS, FPU, DSC Industrial, 40nm 200µA/MHz, 0.3µA deep standby Embedded Security, ASSP Industrial, 90nm 1mA/MHz, 100µA standby 44 DMIPS, True Low Power Industrial & Automotive, 130nm 144µA/MHz, 0.2µA standby 4

5 Magnitude in db Enabling The Smart Society Challenge: More and More Sensors are required by our Smart devices and reliable filtering is required to separate the signal from the noise. 20 Inphase Filter Frequency Response Doctor, your patient is in distress Frequency in khz Wireless Module Solution: This lecture will introduce you to some of the basic concepts of Digital Filtering, low-cost Filter tools and help you avoid some of the more common pitfalls when implementing filters on the Renesas processor of their choice. 5

6 Agenda System Block Diagram analog filter FIR vs IIR Sampling theorem Anti-aliasing Oversampling Triggering skew ADC interrupt overhead Decimation Fixed point and floating point principles Fixed point vs. floating point benchmark Summary 6

7 Example Filter Applications Instrument Board MCU Sensor Cabling 60 Hz Filter ADC Microphone Voice Recorder 4 khz LowPass MCU ADC 7

8 Filter Applications The Boxcar Filter Very common to perform a running average Sum n samples, scale the output (usually divide by n) Recalculate each time one new sample comes in Very simple FIR called boxcar All coefficients equal to 1 Example of 8 khz sampling rate, 8 tap FIR 8

9 Filter Types - FIR Typically the gain = 1 Does not always have Decimation Decimation can be on front or back end X [n] Z -1 X [n-1] Z -1 X [n-2] Z -1 Z -1 X [n-n] b 0 b 1 b 2 b 3 b M Y [n] nd Y [n] X[n] Input samples nd Decimation Factor Y [n] Decimated Output B[n] Coefficients (multiplies) Z -1 Delay elements (storage array) 9

10 Filter Types - IIR In addition to a forward path there is a feedback path Z -1 Z -1 b k 1 b k 2 X [n] b k Y k [n] -a k 2 -a k 1 Z -1 Z -1 X[n] Input samples Y k [n] Output b k [n] Feed forward Coefficients (multiplies) -a k [n] Feedback Coefficients (multiplies) Z -1 Delay elements (storage array) 10

11 FIR versus IIR* FIR Phase-linear Simple instructions, single loop Suited for Multi-rate (decimation or interpolation allows some calculations to be omitted) Desirable Numeric properties (finite-precision can usually be implemented using lower number of bits) Possible to implement with coefficients less then 1.0 May require more memory and calculations than the IIR Some responses are just impractical to implement in FIR IIR Less memory and calculations for a given filtering characteristic Arithmetic errors compounded by feedback Harder to implement using fixed point Not as easy to do multi-rate (decimation and interpolation) Not phase-linear * and 11

12 Designing the Filter Programs like ScopeFIR, ScopeIIR or WinFilter simplify the task of designing a filter 12

13 Identifying the Noise Programs like ScopeDSP allows inputting ADC data and running FFT 13

14 Identifying the Noise The FFT clearly identifies a 1k,2K,4K and 8K component 14

15 Sampling Theorem Nyquist-Shannon Sampling Theorem If a function x(t) contains no frequencies higher than B hertz, it is completely determined by giving its ordinates at a series of points spaced 1/(2B) seconds apart. 1 Simply stated: A signal can only be properly sampled if it contains no frequencies greater than one-half the sampling frequency Sometimes this is incorrectly stated: To not lose information you must sample at twice the highest frequency you are concerned with in a signal 15

16 Aliasing Problem Record voice data and store Limit voice bandwidth to 4 khz Sample at 8 khz Problem - Audio contains energy above 4 khz Anti-aliasing filter Adjust corner for 4 khz 16

17 Anti-aliasing filter 0 7K 7K 4 nf - + Output (db) nf Frequency (khz) - 12 db is only an attenuation of 1/4 17

18 R1-P / db Anti-aliasing filter Actual Response of 2 nd Order 4 khz Filter Output (db) k 2k 3k 4k 5k 6k 7k 8k 9k 10k Frequency / Hertz Frequency (khz) 18

19 Frequency Response of 8 Tap 4 khz Filter -12dB line 20 db attenuation at 8 khz compared to 12 for analog filter 19

20 Improved 4 khz Filter By using 14 taps notice the improved attenuation at 6 khz 20

21 Oversampling and digital filtering Sample at 32 khz instead of 8 khz Only signals 16 khz or greater will alias Could use simple RC or no anti-aliasing filter 21

22 Oversampling and digital filtering Decimate results Store every 4 th sample Only calculate filter at 8 khz Sampling at 32 khz rate Signal to Sample S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 Data Point1 = X1*S1+X2*S2..+X8*S8 Data Point2 = X1*S5+X2*S6..+X*S12 X1,X2 are filter coefficients 22

23 Multi-rate and Decimation Temp cannot change more than 1 degree/ hour Required sampling rate for 1 degree logging Noise with 1 second period, averages out in 4 readings Sampling rate for noise x x x x x x x x x x x x x x x x x x x x Temperature 23

24 ADC Considerations - Skew Problems: Interrupt Skew 32 khz requires sampling every us Software start ADC possibility of sample skew Other interrupts in the system Long instructions required to complete Solutions: Possible - Make the start interrupt highest system priority Preferred - Use ADC system that can be triggered by timer Some devices may have to loop a timer to ADC trigger 24

25 ADC Considerations - Overhead Problem: Interrupt Overhead Storing ADC Data Assume ADC ISR takes 40 cycles context save + data save and pointer adjust + context restore Sampling at 32 khz BW to store data = 1.28 million cycles Solutions: Use a DMA controller 4-5 cycles or less per transfer CPU BW to store data <200 thousand cycles 25

26 ADC Considerations - Benchmark Example RX allows triggering ADC from GPT/MTU2/MTU3 (timer) DMAC transfers data to buffer MTU2 Channel 0 AD Trigger (160kHz) AD Complete AN7 ADC0 DMAC Channel Complete Intr (PING/PONG Rdy)* Memory PING/PONG Buffer Data to Filter Task HW assist to acquire/transfer data to buffer saves* ~3% at 200kHz rate / 5K samples ~13% at 400kHz rate / 5K samples ~26% at 500kHz rate / 5K samples * DevCon RX Performance lab 26

27 Calculating the Filter Design 4 khz, 8 tap, lowpass filter Sampling rate 32 khz Passband 4 khz Stopband 8 khz Stopband attenuation 12 db actual 20 db Passband ripple = 2 db - actual 0.76 Coefficients:

28 Implementing the Filter Could calculate the filter as: result=0; for (index = 0; index < taps; index++) { result += data[index] * coeff[index]; } The problem is the coefficients are all fractional values 28

29 Options to Calculate the Filter Use an MCU with an FPU RH Bit RISC High Performance RISC RX600 High Performance CISC SH2A like SH7269 High Performance RISC Use Floating Point Libraries Can be very slow Use Fixed Point Math A little more complicated than floating point 29

30 Floating Point Numbers S Exponent 8 bits Significand part 23 bits (implied 1) Radix point Floating point value = (-1) sb + (1+Fraction) x 2 (exponent bias) The exponent is expressed in biased form: e = E + bias Precision is function of fraction bits Floating supports a very large dynamic range Parameter Total bit Width Single Precision 32bits Double Precision 64bits Sign bit 1bit 1bit Exponent field 8bits 11bits Significand 23bits 52bits Precision 24bits 53bits Bias Emax Emin

31 Floating Point Hardware Single Precision Min Value = 5.88 x 10e-39, Max value = 3.4 x 10e S Exponent 8 bits Significand part 23 bits (implied 1) Radix point Double Precision Min Value = ~2.0 x 10e-308, Max value = ~2.0 x 10e S Exponent 11 bits Significand part 20/52 bits (implied 1) Radix point 31 0 Significand part 32/52 bits (implied 1)

32 Fixed Point Fraction value is shifted (multiplied) by a value to make an integer Example Represent using 16 bit fixed point 1 bit for the sign 19 requires 5 bits in binary 10 bits left to represent fraction Multiply the value by 1024 (shift left 10) Could allocate more bits for integer and less for fraction S Example : Calculate a 4 tap box filter using fixed point Assume ADC samples are 0x100 (256), 0x200 (512), 0x120(288), 0x150(336) Coefficients are all 0.25 Solution Scale coefficients to be integers by multiplying by 4 (shift left 2) Multiply coefficients time ADC values 1*0x *0x *0x *0x150 = 0x570 (1392) Restore proper scaling (shift right 2) = 0x15C (348) 32

33 Precision Requirements How many bits of coefficient are required? Do not want round-off error to cause an LSB error For 10 bit ADC need 10 bits coefficient Each tap could accumulate error Additional bits depends on number taps 8 taps add 3 LSB 16 taps add 4 LSB Etc 33

34 Pop Quiz: Assuming: 12 bit ADC, 7 tap FIR filter QUESTION: Is 16 bit Fixed Point enough resolution? 8 taps add 3 LSB, for a total of 15 bits Don t forget the sign bit! 16 bit total 34

35 Some Benchmark Results Using RL78/G14 (16 bit, 32 MHz MCU ) 8 Tap Filter 216 cycles (27 cycles per tap) 22 Tap Filer 594 cycles (27 cycles per tap) 8 taps at 8 khz = ~1.73 million cycles (approximately 5.4% 32 MHz) Each tap calculation requires Multiply Sum Two Pointer Increments 35

36 A MAC Really Helps Really need a MAC RX has RMPA (software MAC), RL78 has MACH Unit RL samples/64 Tap Filter 354,000 cycles RX 200 samples/64 Tap Filter 33,000 cycles RX average 2.6 cycles per tap* RL78 average 27.6 cycles per tap* *From DSP and DSCL library test results 36

37 Circular Buffer Bottleneck Most DSPs can handle circular buffers, MCUs typically do not Inefficient to put pointer check in loop Classical Implementation Circular Buffer Implementation X0 X4 X1 X2 X3 C0 C1 C2 C3 X1 X2 X3 X4 New Data C0 C1 C2 C3 37

38 Double Coefficient Loops Loop1 X0 X1 X2 X3 C0 C1 C2 C3 C0 C1 C2 C3 Loop2 X4 X1 X2 X3 C0 C1 C2 C3 C0 C1 C2 C3 Loop3 X4 X5 X2 X3 C0 C1 C2 C3 C0 C1 C2 C3 38

39 IIR Filters 39

40 IIR Z -1 Z -1 b k 1 b k 2 X [n] b k Y k [n] -a k 2 -a k 1 Z -1 Z -1 X k [n] Input Samples, Y k [n] Output Samples, b k [n]/a k [n] Filter Coefficients, Z -1 Delay Line Since round-off error in output feeds back IIR requires greater precision 16 bit precision typically sufficient for FIR IIR requires 32 bit precision 1 Floating point simplifies math 40

41 Magnitude in db Why use IIR 20 Inphase Filter Frequency Response Design 5 khz bandpass Sampling rate 44 khz Center Frequency - 5 khz Passband - 1 khz Stopband attenuation 40 db Passband ripple = 2 db FIR filter requires 59 taps: IIR filter only requires 17 taps (13 non-zero) Forward coefficients 1,0,-4,0,6,0,-4,0,1 Feedback coefficients , , , , Frequency in khz 41

42 Some Benchmark Results Calculating the previous filter Using RX 59 tap FIR 645 Cycles ( MHz) 28% BW if 44 khz RX 17 tap IIR 353 cycles ( MHz) 15% BW if 44 khz Tools like the RX DSP Library and RL78 DSC Library help simplify the calculations / implementation. 42

43 Summary System Block Diagram analog filter FIR vs IIR Sampling theorem Anti-aliasing Oversampling Triggering skew ADC interrupt overhead Decimation Fixed point and floating point principles Fixed point vs. floating point benchmark 43

44 Questions? 44

45 Enabling The Smart Society in Review Challenge: More and More Sensors are required by our Smart devices and reliable filtering is required to separate the signal from the noise. This lecture will introduce them to some of the basic concepts of Digital Filtering, low-cost Filter tools and help you avoid some of the more common pitfalls when implementing on the Renesas processor of their choice. Do you agree that we accomplished the above statement? 45

46 Please Provide Your Feedback Please utilize the Guidebook application to leave feedback or Ask me for the paper feedback form for you to use 46

47 Appendix: Additional Information 47

48 Resources ScopeFir and ScopeDSP The Scientist and Engineer's Guide to Digital Signal Processing, copyright by Steven W. Smith. For more information visit the book's website at: C. E. Shannon, "Communication in the presence of noise", Proc. Institute of Radio Engineers, vol. 37, no. 1, pp , Jan Reprint as classic paper in: Proc. IEEE, vol. 86, no. 2, (Feb. 1998) Signal Processing tfor Communications ( ) 48

49 A visual look at Aliasing x(t) = cos(2π * 8400t) solid line Fs = 8000Hz 400 Hz (dots) not distinguishable from 8000Hz 49

50 Renesas Electronics America Inc.