SILICON DESIGNS, INC.

Transcription

1 SILICON DESIGNS, INC. Advanced Accelerometer Solutions Model Digital Accelerometer Capacitive Micromachined Nitrogen Damped Hermetically Sealed Digital Pulse Density Output ully Calibrated Responds to DC & AC Acceleration -55 to +25 C Operation +5 VDC, 2 ma Power (typical) Non-Standard g Ranges Available Integrated Sensor & Amplifier LCC or J-Lead Surface Mount Package Serialized for Traceability TTL/CMOS Compatible No External Reference Voltage Easy Interface to Microprocessors Good EMI Resistance RoHS Compliant DESCRIPTION Available G-Ranges ull Scale Acceleration 20 pin LCC 20 pin JLCC ± 2 g ± 5 g ± g ± 25 g ± 50 g ±0 g ±200 g * L-002 L-005 L-0 L-025 L-050 L-0 L-200 J-002 J-005 J-0 J-025 J-050 J-0 J-200 * Recommended for Down Hole Drilling The Model is a low-cost, integrated accelerometer for use in zero to medium frequency instrumentation applications. Each miniature, hermetically sealed package combines a micro-machined capacitive sense element and a custom integrated circuit that includes a sense amplifier and sigma-delta A/D converter. It is relatively insensitive to temperature changes and gradients. Each device is marked with a serial number on its bottom surface for traceability. An optional calibration test sheet (-TST) is also available which lists the measured bias, scale factor, linearity, operating current and frequency response. OPERATION The Model produces a digital pulse train in which the density of pulses (number of pulses per second) is proportional to applied acceleration. It requires a single +5 volt power supply and a TTL/CMOS level clock of 0kHz-MHz. The output is ratiometric to the clock frequency and independent of the power supply voltage. Two forms of digital signals are provided for direct interfacing to a microprocessor or counter. The sensitive axis is perpendicular to the bottom of the package, with positive acceleration defined as a force pushing on the bottom of the package. External digital line drivers can be used to drive long cables or when used in an electrically noisy environment. APPLICATIONS Automotive Vibration Monitoring Air Bags Vibration Analysis Active Suspension Machine Control Adaptive Brakes Modal Analysis Security Systems Robotics Shipping Recorders Crash Testing Appliances Instrumentation NEGATIVE ACCELERATION NEGATIVE ACCELERATION-full scale -full scale Output Pulse Density Output Pulse Density /2 /2 0 0 POSITIVE ACCELERATION POSITIVE +full ACCELERATION scale+full scale 0.50 "L" SUIX PACKAGE Positive Acceleration 0.50 "J" SUIX PACKAGE Positive Acceleration [page ] April 20

2 PERORMANCE - By Model: V DD=V R=5.0 VDC, =250kHz, T C =25 C MODEL NUMBER UNITS Input Range g ±2 ±5 ± ±25 ±50 ±0 ±200 requency Response (Nominal, db) Hz Sensitivity, Differential 2 khz/g Max. Mechanical Shock (0. ms) g PERORMANCE - All Models: Unless otherwise specified V DD=V R=5.0 VDC, =250kHz, T C =25 C PARAMETER MIN TYP MAX UNITS Cross Axis Sensitivity 2 % Bias Calibration Error ¹ thru % of (span) Bias Temperature Shift (T C= -55 to +25 C) ¹ thru (ppm of )/ C Scale actor Calibration Error,2 2 % Scale actor Temperature Shift (T C= -55 to +25 C) ¹ +00 ppm/ C Non-Linearity (-90 to +90% of ull Scale), % of span Power Supply Rejection Ratio (V DD=V R) 0 db Operating Voltage (V DD vs. ) Volts Operating Current (I DD + I VR) 2 ma Clock Input Voltage Range (with respect to ) -0.5 V DD+0.5 Volts Mass L Package (add 0.06 grams for J package) 0.62 Grams Note : Tighter tolerances may be available on special order. Note 2: 0g and greater versions are tested from -65 to +65. SIGNAL DESCRIPTIONS VDD and (power): Pin (VDD) & pin 9 (). Additionally tie pins & to VDD & pins 2, 5, 6 & to. (input): Pin. Reference clock input. This hysteresis threshold input must be driven by a 50% duty cycle square wave signal. actory Calibration is performed at 250 khz, which is the recommended clock frequency for best results. Operation at frequencies as low as 0 khz or as high as MHz are possible, however a slight bias shift may result. (output): Pin. Count output. A return-to-zero type digital pulse stream whose pulse width is equal to the input logic high time. The pulse rate increases with positive acceleration. The device experiences positive (+g) acceleration with its lid facing up in the earth s gravitational field. This signal is meant to drive an up-counter directly. and (output): Pins 2 & respectively. Direction output. This output is updated at the fall of each clock cycle. It is high during clock cycles when a high going pulse is present and low during cycles when no pulse is present. A non- return-tozero signal meant to control the count direction (i.e. up or down) of a counter. can be low pass filtered to produce an analog measure of the acceleration. is the complement of and is provided for use in driving differential transmission lines. (input): Pin. Deflection Voltage. Normally left open. A test input that applies an electrostatic force to the sense element, simulating a positive acceleration. The nominal voltage at this pin is ⅓V DD. voltages higher than required to bring the output to positive full scale may cause device damage. VR (input): Pin. Voltage Reference. Tie directly to V DD (+5V). A 0.μ bypass capacitor is recommended at this pin. /2 (output): Pin. Clock divided by 2. A buffered clock output whose frequency equals divided by [page 2] April 20

3 ABSOLUTE MAXIMUM RATINGS * Case Operating Temperature -55 to +25 C Storage Temperature -55 to +25 C Acceleration Over-range 2000g for 0. ms Voltage on V DD to -0.5V to 6.5V Voltage on Any Pin (except ) to -0.5V to V DD +0.5V Voltage on to ±V Power Dissipation 50 mw Note : Voltages on pins other than, or V DD may exceed 0.5 volt above or below the supply voltages provided the current is limited to ma. Note : The application of voltages higher than required to bring the output to positive full scale may cause device damage. * NOTICE: Stresses greater than those listed above may cause permanent damage to the device. These are stress ratings only. unctional operation of the device at or above these conditions is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. D.C. CHARACTERISTICS: V DD =V R =5.0 VDC, T C = 55 to +25 C SYMBOL PARAMETER MIN TYP MAX UNITS TEST CONDITIONS V T- Negative Going Threshold Voltage () V V T+ Positive Going Threshold Voltage ().0.7 V V H Hysteresis Voltage () 0.5. V V OL Output Low Voltage (,, /2) 0. V I OL = 2.0 ma V OH Output High Voltage (,, /2) V DD - 0. V I OH = 2.0 ma I I Input Leakage Current () μa V I = 0 to V DD C IO Pin Capacitance p MHz, T A = 25 C I DD +I VR Operating Current 2 ma = 250kHz A.C. CHARACTERISTICS: V DD =V R =5.0 VDC, T C = -55 to +25 C, Load Capacitance=50p. PARAMETER MIN TYP MAX UNITS input frequency khz input rise/fall time 50 ns duty cycle % fall to fall ns fall to rise ns rise to valid out ns fall to fall ns fall to /2 rise/fall ns [page ] April 20

4 VR (gnd) 0 khz to MHz TEST INPUT VDD VR / u COMPLEMENT O TO UP/DOWN COUNTER TO PULSE COUNTER CLOCK 2 (gnd) (gnd) TOP VIEW (gnd) /2 VDD RECOMMENDED CONNECTIONS (vdd) PINOUT (LCC & JLCC) USING THE COUNT () OUTPUT: Pulses from the output are meant to be accumulated in a hardware counter. Each pulse accumulation or sample, reflects the average acceleration (change in velocity) over that interval. The sample period or gate time over which these pulses are accumulated determines both the bandwidth and quantization of the measurement. Quantization (g s) = f = f ( g ORCE = g SPAN ( g SPAN f SR f g + ORCE 2 g SPAN f f - 2 ) ) Where: g SPAN = 2* (full scale acceleration in g s) f SR = sample rate in Hertz f = accelerometer clock rate in Hertz f = pulse rate in pulses/sec g ORCE = acceleration in gravity units g* = 9.07 m/s 2 or 2. ft/s 2 *Value reflects location of Silicon Designs facility. S 2S 0 g 7S 2S S S 0 Hz C 2 C 5 7 C C 7 C C The first equation above shows that as the sample rate is reduced (i.e. a longer sample period), the quantization becomes finer but bandwidth is reduced. Conversely, as the sample rate is increased, quantization becomes coarser but the bandwidth of the measurement is increased. The second and third equations show how the pulse frequency equates to the applied g-force. When using a frequency counter to monitor the output pulse rate, a counter with a DC coupled input must be used. The output is a return-tozero signal whose duty cycle varies from zero to fifty percent, from minus full scale to positive full-scale acceleration. A frequency counter with an AC coupled input will provide an erroneous reading as the duty cycle varies appreciably from fifty percent. The figure to the left illustrates how the and outputs vary as the accelerometer is subjected to accelerations from minus full scale (-S) to plus full scale (+S). DELECTION VOLTAGE () TEST INPUT: This test input applies an electrostatic force to the sense element, simulating a positive acceleration. It has a nominal input impedance of 2 kω and a nominal open circuit voltage of ⅓V DD. or best accuracy during normal operation, this input should be left unconnected or Δf k ( V - V DD ) 2 connected to a voltage source equal to ⅓ of the V DD supply. The change in output pulse rate (Δf) is proportional to the square of the difference between the voltage applied to the input (V ) and ⅓V DD. Only positive shifts in the output pulse rate may be generated by applying voltage to the input. When voltage is applied to the input, it should be applied gradually. The application of voltages greater than required to bring the output to positive full scale may cause device damage. The proportionality constant (k) varies for each device and is not characterized. ESD and LATCH-UP CONSIDERATIONS: The model accelerometer is a CMOS device subject to damage from large electrostatic discharges. Diode protection is provided on the inputs and outputs but care should be exercised during handling to assure that the device is placed only on a grounded conductive surface. Individuals and tools should be grounded before coming in contact with the device. Do not insert the model into (or remove it from) a powered socket. [page ] April 20

5 PACKAGE DIMENSIONS Model Notes:. * Dimensions 'M', T & 'U' locate acceleration sensing element's center of mass. 2. Lid is electrically tied to terminal 9 ().. Controlling dimension: inch.. Terminals are plated with 60 micro-inches min gold over 0 micro-inches min nickel. (This plating specification does not apply to the metallized pin- identifier mark on the bottom of the j-lead version of the package). 5. Package: 90% minimum alumina (black), lid: solder sealed kovar. Inches Millimeters Dim Min Max Min Max A B C TYP.0 TYP D E 0.05 TYP 2. TYP BSC.27 BSC G TYP 0.6 TYP H TYP.27 TYP J 0.00 x 5 0. x 5 K 0.0 R TYP 0.25 R TYP L 0.0 TYP 0. TYP * M 0.0 TYP.2 TYP N P 0.07 TYP 0. TYP R 0.02 R TYP 0.5 R TYP * T 0.05 TYP 2. TYP * U 0.75 TYP.5 TYP A *U *T "L" SUIX PACKAGE (20 PIN LEADLESS CERAMIC CHIP CARRIER) C A Positive Acceleration *M D N L "J" SUIX PACKAGE (20 PIN LEADED CERAMIC CHIP CARRIER) R S P B E G K TERMINAL 20 TERMINAL J H BIAS STABILITY CONSIDERATIONS Bias temperature hysteresis can be minimized by temperature cycling your model accelerometer after it has been soldered to your circuit board. If possible, the assembled device should be exposed to ten cycles from -0 to +5 C minimum (-55 to +25 C recommended). The orientation to the Earth's gravitational field during temperature cycling should preferably be in the same orientation as it will be in the final application. The accelerometer does not need to have power applied during this temperature cycling. SOLDERING RECOMMENDATIONS RoHS Compliance: The model does not contain elemental lead and is RoHS compliant. WARNING: If no-lead solder is to be used to attach the device, we do not recommend the use of reflow soldering methods such as vapor phase, solder wave or hot plate. These methods impart too much heat for too long of a period of time and may cause excessive bias shifts. or no-lead soldering, we only recommend the manual "Solder Iron Attach" method (listed on the next page of this data sheet). We also do not recommend the use of ultrasonic bath cleaners because these models contain internal gold wires that are thermo sonically bonded. Reflow of Sn62 or Sn6 type solder using a hotplate is the preferred method for assembling the model surface mount accelerometer to your Printed circuit board. Hand soldering using a fine tipped soldering iron is possible but difficult without a steady hand and some form of visual magnification due to the small size of the connections. When using the hand solder iron method, it s best to purchase the J-Leaded version (J) for easier visual inspection of the finished solder joints. Pre-Tinning of Accelerometer Leads is Recommended: To prevent gold migration embrittlement of the solder joints, it is best to pre-tin the accelerometer leads. We recommend tinning one lead at a time, to prevent excessive heating of the accelerometer, using a fine-tipped solder iron and solder wire. The solder bath method of pre-tinning is not recommended due to the high degree of heat the interior of the device gets subjected to which may cause permanent shifts in the bias and/or scale factor. [page 5] April 20

6 Hotplate Attach Method using Solder Paste or Solder Wire: Apply solder to the circuit board s pads using Sn62 or Sn6 solder paste or pre-tin the pads using solder and a fine tipped soldering iron. If pre-tinning with an iron, apply flux to the tinned pads prior to placing the components. Place the accelerometer in its proper position onto the pasted or tinned pads then place the entire assembly onto a hotplate that has been pre-heated to 250 C. Leave on hotplate only long enough for the solder to flow on all pads (DO NOT OVERHEAT!) Solder Iron Attach Method using Solder Paste: Apply solder paste to the circuit board s pads where the accelerometer will be attached. Place the accelerometer in its proper position onto the pasted pads. Press gently on the top of the accelerometer with an appropriate tool to keep it from moving and heat one of the corner pads, then an opposite corner pad with the soldering iron. Make sure the accelerometer is positioned so all 20 of its connections are centered on the board s pads. Once the two opposite corner pads are soldered, the part is secure to the board and you can work your way around soldering the remaining connections. Allow the accelerometer to cool in between soldering each pin to prevent overheating. Solder Iron Attach Method using Solder Wire: Solder pre-tin two opposite corner pads on the circuit board where the accelerometer will be attached. Place the accelerometer in its proper position onto the board. Press gently on the top of the accelerometer and heat one of the corner pads that were tinned and the part will drop down through the solder and seat on the board. Do the same at the opposite corner pad that was tinned. Make sure the accelerometer is positioned so all 20 of its connections are centered on the board s pads. Once the two opposite corner pads are soldered, the part is secure to the board and you can work your way around soldering the remaining connections. Allow the accelerometer to cool in between soldering each pin to prevent overheating. LCC & JLCC Solder Contact Plating Information: The plating composition and thickness for the solder pads and castellations on the L suffix (LCC) package are 60 to 225 micro-inches thick of gold (Au) over 0 to 50 micro-inches thick of nickel (Ni) over a minimum of 5 micro-inches thick of moly-manganese or tungsten refractory material. The leads for the J suffix (JLCC) package are made of an Iron-Nickel sealing alloy and have the same gold over nickel plating thicknesses as for the LCC pads. Recommended Solder Pad Pattern: The recommended solder pad size and shape for both the LCC and J LCC packages is shown in the diagram and table below. These dimensions are recommendations only and may or may not be optimum for your particular soldering process. APPLICATION NOTE: ACCELERATION MEASUREMENT WITH A MICROCONTROLLER The (count) pulse density modulation output of the model accelerometer was designed to drive the type of hardware pulse counter that is sometimes present in microcontrollers. The schematic (below) shows a model accelerometer driving the T0 counter of an Intel 0C5 microcontroller. The accelerometer clock is provided by the Address Latch Enable (ALE) output of the 0C5 after being divided by a factor of four by the two 7HC7 "D-Type" flip/flops. The divide by is needed because the maximum count rate of the 0C5 s T0 counter is /2th of the 05's S D Q Q R 7HC7 D S Q Q R DIM Inch mm A B.0.92 C D.0 0. E G [page 6] April khz VDD VR /2 6 2 E D 0. u PSEN MHz 6 MHz P.7 P.6 P.5 P./T0 P. P.2 P. P.0 EA RST ALE XTAL XTAL2 G A B 0C5 P2.7 P2.6 P2.5 P2. P2. P2.2 P2. P2.0 P.7 P.6 P.5 P. P. P.2 P. P.0 P0.7 P0.6 P0.5 P0. P0. P0.2 P0. P0.0 C

7 clock oscillator frequency ( OSC ) and the frequency of ALE is /6th of OSC. Divisors of greater than four should be used if OSC is greater than 2 MHz to keep the accelerometer's clock frequency at or below the recommended MHz maximum. Use of ALE for the accelerometer clock is only recommended for applications where no external memory is connected to the 0C5. ALE is missing an output pulse for each MOVX instruction, which is used to access external memory. Alternatively, any available clock source asynchronous with the 05's clock may be used to drive the accelerometer so long as its frequency is between 0 khz and MHz and is no greater than /th of OSC. To obtain each interval's average acceleration, the software needs to poll counter T0's value at fixed intervals then subtract each new counter value from its previous value to obtain a delta (difference) count for each interval. Of course the software must also account for wraparound of the counter, which requires that the counter contain enough bits to prevent more than one counter overflow during each sample period. The delta count relates to the average applied acceleration according to the following equation. A f ( g Where: 2 + g SPAN ) ΔC = the change in the counter s value over each sample interval ΔC = = the accelerometer's input clock frequency f SR f A g = the average acceleration force in g's during the sample interval g SPAN = 2 *(full scale acceleration rating of accelerometer) f SR = the software sample rate of the counter in samples/sec At minus full-scale acceleration, the difference count (ΔC) is zero. Zero acceleration results in a difference count of one-half of the maximum difference count value; plus full scale acceleration results in the maximum value (f / f SR ). The actual difference value achieved at zero acceleration [which will be near ½(f / f SR )], may be subtracted from each interval's difference count to obtain the acceleration count in sign-magnitude format. CONVERTING TO AN ANALOG VOLTAGE It is best to use a model 2 or 22 for analog applications but if a proportional analog voltage is desired from a model, one can be easily generated by the connection of a low-pass filter to the output as shown in the schematic (below). The table (at right) lists values for R and C2 for various cutoff frequencies (- db frequency). R is chosen to be at least 0 times the maximum output impedance of, which is 200Ω. The circuit or instrument that the 0 to +5V analog output is connected to, must have an input impedance at least 0 times the value of R. This simple passive RC filter can be used as long as it provides sufficient rejection of the switching noise present on the output for the specific application. CUTO REQUENCY (Hz) R (kω) C2 (µ) khz to MHz TEST INPUT VDD VR /2 0. u R 2 C2 0 TO ANALOG OUTPUT If greater rejection of switching noise is needed, a two pole active filter can be used as shown in the schematic (below). This circuit has the added advantage of providing very low output impedance compared with the single pole circuit. Its disadvantages include greater complexity and the need for or 2 additional supply voltages for the op-amp. or both filter types, tight tolerance, temperature stable resistors and capacitors should be used. To reject common mode noise over long signal transmission line lengths, and its complement can be used to drive a pair of wires with a differential filter placed at the far end of the wires. [page 7] April 20

8 0 khz to MHz TEST INPUT VDD VR 2 / u R R 2 C 7 R R C 6 R 5 0 TO ANALOG OUTPUT Cutoff requency (Hz) R & R2 (kω) R (kω) R & R5 (kω) C6 (µ) C7 (µ) ACCELERATION THRESHOLD DETECTION: or applications where it is desired to know when acceleration has exceeded a threshold value, the simple circuit shown in the schematic (below) can be used. This circuit uses a 7HC synchronous binary counter to detect when the logic output goes high for a minimum of clock cycles in a row. The 7HC7 D-type flip/flop is connected in a "ones-catch" configuration so that once the threshold is exceeded, the flip/flop stores the event. The clear input sets the counter value to zero and clears the flip/flop, making the circuit ready to detect the next ones in a row sequence. When driven by the (true) output, this circuit provides a threshold of approximately ⅞ths of full scale (+.75g for a ±50g device). Nega ve accelera on pulses can be detected by connecting the counter to instead of. 7HC0 TEST INPUT 0 khz to MHz 0. u VDD VR / D0 D D2 D CEP CET LOAD RES 7HC Q0 Q Q2 Q TC 7HC7 S D Q Q R OVER THRESHOLD CLEAR [page ] April 20