Applied Energy 82 (2005) Photovoltaic power interface circuit incorporated with a buck-boost converter and a full-bridge inverter

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1 Applied Energy 82 (2005) APPLIED ENERGY Photovoltaic power interface circuit incorporated with a buck-boost converter and a full-bridge inverter Feel-soon Kang a, *, Sung-Jun Park b, Su Eog Cho c, Jang-Mok Kim c a Department of Control and Instrumentation Engineering, Hanbat National University, San 16-1, Duckmyung, Yuseong, Daejeon , Republic of Korea b Department of Electrical Engineering, Chonnam National University, 300 Yongbong-dong, Puk-gu, Gwangju , Republic of Korea c Department of Electrical Engineering, Pusan National University, Changjurn, Kumjung, Busan , Republic of Korea Available online 24 December 2004 Abstract This paper presents an efficient photovoltaic power interface circuit incorporated with a buck-boost converter and a full-bridge inverter. It connects up a solar array to power a utility line. The proposed interface circuit consists of five switches, an input inductor, and LC filters. The buck-boost converter operates at high switching frequency to make the output current a sine wave, whereas the full-bridge inverter operates at low switching frequency of Hz, which is determined by the ac utility line frequency; thus, it can reduce the switching losses incurred by the full-bride inverter. In the output stage, a high power-factor is achieved without an additional current controller owing to the input inductor current operatly in a discontinuous conduction mode. Consequently, it has a simple and robust circuit configuration. Operational modes are analysed, and then the validity of the proposed interface circuit is verified through computer-aided simulations and experiments based on a laboratory prototype of 150 W. Ó 2004 Elsevier Ltd. All rights reserved. * Corresponding author. Tel.: ; fax: address: feelsoon@ieee.org (F. Kang) /$ - see front matter Ó 2004 Elsevier Ltd. All rights reserved. doi: /j.apenergy

2 F.-s. Kang et al. / Applied Energy 82 (2005) Keywords: Buck-boost converter; Digital signal processor; Full-bridge inverter; Photovoltaic system; Pulse-width modulation 1. Introduction In recent years, the utilization of natural energy has become an attractive alternative to fossil fuels because of the latterõs negative impact on the environment. Solar energy is especially attractive because it is inexhaustible and because its conversion is not accompanied by the emission of air or water pollutants, or the generation of solid waste. In photovoltaic power-generation systems, the cost reduction of solar cells and interface circuit between a solar array and a utility line is still a major issue. To alleviate the cost problem, several inverter topologies have been presented [1 4]. Among them, a single-phase utility interactive photovoltaic-system including a currentsource pulse width modulation (PWM) inverter was presented [1]. It can transfer arbitrary power generated by a solar array to loads or utility lines regardless of Nomenclature C DC C F dc-link capacitor output filter capacitor E stored energy in the input inductor i DC diode current i L input inductor current i Lpeak the peak of the input inductor current i out output current i P input solar-array current L input inductor L F output filter inductor L line line inductance P out output power Q A buck-boost switch Q 1, Q 2, Q 3, Q 4 full-bridge switches R o minimum output resistance T on on-time of switches T s switching period V DC voltage across dc-link capacitor V P input solar-array voltage V s ac utility line-voltage h the angle by which i out lags v S the fundamental output frequency x 1

3 268 F.-s. Kang et al. / Applied Energy 82 (2005) the magnitude of the generated array voltage. There is no need for a current feedback control to achieve a high power-factor because the system operates in discontinuous conduction modes (DCMs); nevertheless, it still has a cost problem. Avoiding the use of a transformer has the additional benefits of reducing cost, size, weight and complexity of the photovoltaic inverter system. Five new inverter topologies using two converters with buck and boost voltage characteristics, in parallelseries-connection, were proposed to avoid the drawbacks of commonly-used voltage-source-inverters [2]. One of the presentable achievements of these five topologies is an enormous reduction in volume; however it has a low efficiency due to the switching loss of the power-switching devices. In this paper, we present a photovoltaic-power interface circuit based on a buckboost and a full-bridge configuration. The proposed inverter supplies currents obtained by solar arrays to an ac utility line with high power-factor. The input inductor current is designed to operate in a DCM; thus, it does not require an additional current controller. Consequently, it has a simple structure compared with commonly-used inverters for photovoltaic power-generation. Operational modes are described, and then the validity is verified through computer-aided simulations and experiments using a 150 W laboratory prototype. 2. Proposed photovoltaic power generator Fig. 1(a) shows a basic configuration of the proposed interface circuit. It consists of five switches, an inductor, and LC filters. Among the five switches, only Q A operates at a high switching-frequency to make the output current a sinusoidal wave, and the others determine the polarity of the ac output voltage with a low switching frequency Hz. This switching scheme is useful to reduce the switching loss and switching interference problem. The proposed photovoltaic interface circuit is based on the principle of buck-boost power conversion. It has an advantage compared with a boost or a buck power converter with respect to output-voltage generation. In the case of a buck topology, the output voltage never becomes higher than the input voltage; therefore, in order to feed such low voltage into the high ac utility line, it requires an additional boost converter or a step-up transformer. On the other hand, a boost topology can generate a higher output-voltage than the input; however, a lower voltage under the input level would not be obtained. But the proposed interface circuit, i.e., a buck-boost topology can generate either a higher or lower than input voltage according to duty ratio [5,6]. Fig. 1(b) shows the operational waveforms for each gate signal (Q A, Q 1 Q 4 ), inductor current (i L ), diode current (i DC ), ac utility voltage (v S ) and superimposed output-current (i OUT ). The proposed circuit can provide a sinusoidal output current without sensing the input inductor current because the inductor is designed to operate in a DCM; thus, the input inductor current peak automatically follows the ac utility voltage, but, it requires a feedback signal to control the phase difference between the ac utility line voltage and the transferred current via the interface circuit. As shown in Fig. 1(b), during a positive half cycle of the ac utility voltage (v S ), the polarity selection switches, Q 1 and Q 2, are conducting, and a pulse width modulated

4 F.-s. Kang et al. / Applied Energy 82 (2005) Fig. 1. Configuration of the proposed inverter and operational waveforms: (a) configuration of the proposed interface circuit; (b) each gate signal, input inductor current (i L ), diode current (i DC ), and ac utility line voltage (v S ) and output current (i OUT ). switching signal to synthesize a sinusoidal current wave is applied to Q A. In contrast, a case where Q 3 and Q 4 are conducting, the current obtained by the buck-boost converter is transferred to the negative direction of the utility line voltage. For the sake of convenience, the proposed interface circuit is divided into three operational modes as depicted in Fig. 2. It shows the magnified waveforms of the

5 270 F.-s. Kang et al. / Applied Energy 82 (2005) Fig. 2. Magnified inductor current with Q A gate signal. input inductor current (i L ) and diode current (i DC ) according to the gate signal Q A. To simplify the mode analyses, we only consider a positive cycle. All switching devices and components are ideal; thus, the effect of stray capacitance and inductance is ignored. The ripple component of the input solar-array voltage (v P ) is assumed to be very small and equivalent to a constant dc voltage source (V P ), and the load is a pure resistance. Before Mode 1, there is no current flowing through the input inductor. To supply a positive output current, Q 1 and Q 2 are conducting. Mode 1. (t 0 t 1 ). At t 0, Q A is turned on, and D is reverse-biased. The input array voltage (V P ) is imposed across the input inductor (L); thus, the inductor current (i L ) linearly ramps up at the rate di L dt ¼ V P L : During on-time (T on ), the inductor current reaches ð1þ i Lpeak ðtþ ¼ V P T on : ð2þ L Hence, during this mode, the stored energy (E) in the input inductor become E ¼ 1 2 Li2 Lpeak ðt 1 t 0 Þ: ð3þ Mode 2. (t 1 t 2 ). At t 1, Q A is turned off while voltage across the inductor reverses; thus i Lpeak flows to the output. The inductor current does not flow through the input solar-array. All of the energy stored in the inductor is delivered to output loads before Q A becomes conducting. Hence, the power transferred from the solar array to the output load is given as

6 F.-s. Kang et al. / Applied Energy 82 (2005) P ¼ Li2 Lpeak ðtþ 2T S : ð4þ Assuming that the proposed interface circuit is lossless, and a minimum output resistance R o, the output power P out ¼ V 2 out R o ¼ LI 2 Lpeak 2T S : ð5þ Mode 3. (t 2 t 3 ). Q A is in the off state, and there is no power transfer to the load from the input source because the inductor current is designed to operate discontinuously. In practice, to make the output current (i OUT ) a continuous wave, a low-pass filter, composed of the inductor L F and the capacitors C F, is required between the utility line and the inverter terminal. An analysis of the dc-side array current i P is informative with respect to understanding the proposed interface circuit. In this analysis, LC high frequency filters are included at the dc-side solar-array as well as at the ac-side utility line, as shown in Fig. 3. Assuming that the switching frequency is very high, i.e. approaching infinity, the values of the filter components (L and C) required in both the dc-side and ac-side filters will approach zero to filter out the high switching frequency components in v OUT and i OUT. This means that the energy stored in the filters is negligible. The instantaneous solar-power input must equal the instantaneous power output because the interface circuit itself has no energy-storage elements. By these assumptions, v S is a pure sinusoidal wave at the fundamental output frequency x 1 :it is expressed as p m S1 ¼ m S ¼ ffiffi 2 V S sin x 1 t: ð6þ If the output is a utility line including a line inductance (L line ) as shown in Fig. 3, where the ac utility voltage is a sinusoidal wave of frequency x 1, then the output current transferred by the interface circuit would also be a sine wave and would lag v S for an line inductance, i.e. p i OUT ¼ ffiffi 2 I OUT sinðx 1 t hþ; ð7þ where h is the angle by which i OUT lags v S. On the dc-side, the LC filter will filter the high switching-frequency components in i P, and i P would only consist of the lowfrequency and dc components. Assuming that no energy is stored in the filters, then Fig. 3. Interface circuit with filters.

7 272 F.-s. Kang et al. / Applied Energy 82 (2005) m P i P ðtþ ¼m p SðtÞi OUT ðtþ ¼ ffiffiffi jpffiffi k 2 V S sin x 1 t 2 I OUT sin ðx 1 t hþ : ð8þ Rearranging (8), yields i P ðtþ ¼V SI OUT V P cos h V SI OUT V P cosð2x 1 t hþ: ð9þ In (9), we know that i P consists of a dc component i P, which is responsible for the power transfer from V P on the dc side of the interface circuit to the ac side. At the same time, i P contains a sinusoidal component of twice the fundamental frequency of the utility line. The solar-array current i P consists of i P and the highfrequency components due to switching. In practical photovoltaic systems, the previous assumption of a constant dc voltage as the input to the interface circuit is not absolutely valid. In general, the dc voltage source is obtained by the solar-array, and a large capacitor or battery is used across the array terminals to filter the dc solar array voltage. The ripple in the capacitor voltage, which becomes the dc input voltage to the interface circuit, is due to two causes: (a) the output voltage obtained by the solar-array is not a pure dc because of non-linear characteristics of the solar array it largely depends on solar radiation, temperature, load conditions, and other non-linear factors; and (b) as derived in (9), the current drawn by the interface circuit from the dc-side is not a constant dc but has a second harmonic component of the fundamental frequency at the interface circuit output in addition to the high switching frequency components. The second-order harmonic current component results in a ripple in the capacitor voltage, even though the voltage ripple due to the high switching frequencies is essentially negligible. 3. Simulation and experimental results To assess the performance of the proposed interface circuit for the photovoltaic power-generation, computer-aided simulation by PSpice (Professional Simulation Program with Integrated Circuit Emphasis; MicroSim, ver. 8.0) is implemented first, and then a 150 W laboratory prototype was manufactured and experimented Simulation results Table 1 shows the information for simulation. Power MOSFETs are employed as switching devices. The switching frequency of Q A is set to 10 khz. To reduce the current stress of Q A when it turns off, a fast-recovery diode (MUR1520) is used. Initial values of all passive components are set to zero. In this simulation, we used a constant dc voltage as an input source instead of a solar cell. Therefore, simulation results maybe little different from those of experiments. The VSIN component of the PSpice library is used for the utility line. Its internal value was set to 100 V rms, 60 Hz, and a single-phase.

8 F.-s. Kang et al. / Applied Energy 82 (2005) Table 1 Parameters for PSpice simulation Symbol Part name Description Q A IRFP460 Power MOSFET 500 V/20 A; switching frequency = 10 khz Q 1 Q 4 IRF830 Power MOSFET 500 V/5 A D MUR1520 Fast recovery 200 V/1 5 A C DC C lonf, IC = 0 L L 300 lh, 1C = 0 L F L 3 mh, 1C = 0 C F C 300 nf, IC = 0 V P VDC DC = 51 V S VSIN VOFF = 0, VAMPL = 141, FREQ = 60 TD = 0, DF = 0, PHASE = 0 Fig. 4 shows simulation results of the input inductor current (i L ) and output diode current (i DC ): they operate in the discontinuous current conduction mode. So it does not need to feed back the input current to the controller. The peak of the input current will automatically follow well the shape of the output-voltage waveform. But, the higher current-peak increases the current rating of the switching devices. Therefore, it is not recommended for high-power applications. In addition, the input inductor and diode current does not flow at each zero-cross point because of a dead time, which is given to prohibit series-connected switches from short circuiting. Thus, it becomes a reason for the current distortion. However, the final output current turns into a sinusoidal current owing to output LC filter showing good THD (total harmonic distortion) characteristics. Fig. 5 shows the variation of output current and voltage across C DC according to the increase of load power. In the simulation, we changed the value of the output load to estimate the circuit operation. In Fig. 5, we find that voltage across C DC is changed with load power conditions. With the increase of transferred current, the bandwidth of V DC becomes larger because the peak of the input inductor current will Fig. 4. Simulation results of input inductor current (i L ) and diode current (i DC ).

9 274 F.-s. Kang et al. / Applied Energy 82 (2005) Fig. 5. Simulation results of output current (i OUT ), grid voltage (v S ), and voltage across C DC according to the load power: (a) 30 W; (b) 60 W; (c) 140 W.

10 be higher. In practical photovoltaic applications, the solar-array current will be increased or decreased by the intensity of sunlight. As shown in Fig. 5(a) (c), the proposed interface circuit shows a high power-factor regardless of the load power conditions. The transferred current (i OUT ) is always in phase with the grid voltage (V S ). Supplying energy to the grid with a high power-factor is one of the important issues in order to increase reliability, stability, and power utility Experimental results F.-s. Kang et al. / Applied Energy 82 (2005) Based on the simulation results, we manufactured a laboratory prototype, and it was applied to a practical solar-array. A photograph of the prototype is given in Fig. 6. The circuit components used are listed in Table 2. Power MOSFETs are used Fig. 6. Photograph of the 150 W laboratory prototype. Table 2 Component list of the laboratory prototype Symbol Value and type Features Q A 2SK2198 Power MOSFET 500 V/30 A: Shindengen electric; switching frequency = 10 khz Q 1 Q 4 IRF830A Power MOSFET 500 V/5 A: International rectifier D FR605 Fast recovery 600 V/6 A: RECTRON C DC 10 nf Mylar condenser: Samwha L 300 lh Ferrite Core PC40/Litz-wired: TDK L F 3 mh Ferrite Core PC40/Litz-wired: TDK C F 300 nf Mylar condenser: Samwha V P DC 51 V Solar array/si/54.14 W/3 paralleled: LG V S AC 100 V/760 Hz Grid-connected type

11 276 F.-s. Kang et al. / Applied Energy 82 (2005) for the main switching devices. A fast-recovery diode is employed to minimize the current stress of Q A when it turns off. For the input inductor, we used ferrite core, and Litz wire (woven wire) was used to reduce the losses in the inductor. An Si-type solar array was employed for the input power-source. Three panels are connected in parallel. The maximum power rating of the used solar-array is about 162 W under sufficient sunlight. The proposed photovoltaic interface circuit was installed between the solar array and a single-phase utility line. As a controller, a digital signal processor (DSP) TMS320F241 is used. Fig. 7 shows a control block diagram for the proposed interface circuit. The general perturbation and observation control scheme is applied to track the maximum power point (MPP). On the whole, it is based on a proportional integration (PI) control method. Q A is applied to the buck-boost switch via a PWM0 port with anti-windup function, and it has a limit of duty ratio because it should be operated in the DCM. The operating frequency of Q A was set to 10 khz. Two ports (PWM2 and PWM3) are allotted to control the switches of the full-bridge inverter. An internal capture function of the TMS320F241 is used to operate the output current in phase with ac utility line voltage. An over-current detection faculty is added to protect the system under fault situations. Fig. 8(a) shows gate signals of Q A, Q 1 (and Q 2 ), and reference signal (Cap0). By using this reference signal and a zero-cross detecting function (null voltage detecting function), it can determine the switching sequence of the full-bridge switches. Dead time between the positive and negative selection switches is set to 5 ls by using an internal dead-band programming function of TMS320F241 (DBCON). Fig. 8(b) shows the ac utility line voltage (v S ) and the output current (i OUT ) transferred via the interface circuit: both waveforms are in phase showing a high power-factor; therefore, the DPF (displacement power factor) is exactly unity as shown in Fig. 7. Control block diagram of the proposed interface circuit.

12 F.-s. Kang et al. / Applied Energy 82 (2005) Fig. 8. Experimental waveforms: (a) gate signals of Q A, and (Q 1, Q 2 ) with a reference signal (Cap0); (b) ac utility line voltage (v S ) and the supplied current transferred from the proposed inverter system (i OUT ); and (c) input inductor current (i L ) and its magnified waveform.

13 278 F.-s. Kang et al. / Applied Energy 82 (2005) Fig. 8(b). The measured power factor was over The output current is closer to the sine wave compared to the utility voltage. In view of power-factor correction, it is important that the proposed interface circuit can produce a sinusoidal current wave- Fig. 9. Dynamic response of the output current (i OUT ) in the proposed interface circuit: (a) when sunlight is being increased; (b) when sunlight is being decreased; (c) magnified waveform of (a); and (d) magnified waveform of (b).

14 F.-s. Kang et al. / Applied Energy 82 (2005) form because the sinusoidal current can minimize the harmonic power-generation. That is to say, there is no harmonic power generation although the output grid voltage has some harmonics because the current is sinusoidal. Fig. 8(c) shows the input inductor current operated in a DCM. In Fig. 8(c), the lower current waveform is the Fig. 10. Variation of voltage across C DC according to the transferred power: (a) 50 W; (b) 80 W; and (c) 150 W.

15 280 F.-s. Kang et al. / Applied Energy 82 (2005) Fig. 11. Characteristics of the output filter according to the transferred power: (a) 50 W; (b) 80 W; and (c) 150 W.

16 F.-s. Kang et al. / Applied Energy 82 (2005) same as the upper one, but on an expanded time scale. As shown in the upper waveform, the peak of the inductor current follows the shape of the output voltage waveform well. Thus, it is not necessary to sense the input inductor current. Fig. 9 shows the dynamic responses of the proposed interface circuit in the case where sunlight is increased or decreased, respectively. Fig. 9(a) shows the output current when sunlight is increased. Fig. 9(b) is a case where the sunlight is decreased. Fig. 9(c) and (d) are the magnified waveforms of Fig. 9(a) and (b), respectively. In the experiment, we used a 500 W plasma lamp instead of the Sun for the sake of convenience. Generally, the output power of a solar array largely depends on the weather conditions, solar radiation, temperature, load conditions, and other non-linear 2.2 Switching losses [W] Full-bridge (Q 1 +Q 2 +Q 3 +Q 4 ) Buck-boost (Q A ) Full-bridge + Buck-boost Output Power [W] Fig. 12. Power consumption by switching losses. Amplitude [p.u] W 80 W 150 W 200 W Harmonic numbers [N] Fig. 13. FFT results according to energy flow.

17 282 F.-s. Kang et al. / Applied Energy 82 (2005) factors. The output current transferred by the proposed interface circuit maintains a high power factor whether sunlight increases or decreases. This means that the proposed circuit ensures high power factor regardless of the variation of input solar array power. Fig. 10 shows the voltage (V DC ) across C DC with the superimposed grid-voltage (V S ). The outlines of the capacitor voltage maintain almost a constant wave shape, but its bandwidth is increased with the increase of the transferred current. Since the peak of the input inductor current is being increased, it influences the voltage across the C DC. These experimental results are similar to those of the simulation results depicted in Fig. 5. The proposed interface circuit can obtain a sinusoidal output current wave without sensing an input inductor current, because the inductor current operates in the discontinuous-current conduction mode. However, due to this reason, it requires a high-performance output filter to make the output current (i OUT ) a continuous wave. In the experiments, a low-pass filter is inserted between the ac utility line and the inverter terminal. Fig. 11(a) (c) show the characteristics of the employed low pass filter. Regardless of the quantity of the transferred current, it shows good characteristics in filtering out high-order harmonics. Fig. 12 shows experimental results for switching losses. The switching loss of Q A employed for chopping purpose is higher than that of the sum of the other switches because Q A is operated at a higher switching frequency of 10 khz whereas other full-bridge switches are working at low switching-frequencies. In addition, the switching loss by Q A is not severe owing to the applied soft-switching method. Because the input inductor current is operated in DCM (discontinuous current conduction mode), Q A is always turned to a zero-current state without a turn-on loss. Regardless of the quantity of the transferred energy, the switching losses by Q A and others (Q 1 + Q 2 + Q 3 + Q 4 ) are measured as 1.22 and 0.96 W, respectively. FFT results for the output current (i OUT ) are shown in Fig. 11, i.e. good harmonic characteristics. Supplying current to the grid with a promising THD is one of the important issues to increase the reliability, stability and power utility (see Fig. 13). 4. Conclusion In this paper, we proposed a photovoltaic power interface circuit based on the buck-boost and full-bridge configurations. The proposed circuit consists of five switches, an input inductor and LC filters. The buck-boost converter operates at a high switching-frequency to make the output current a sinusoidal wave, whereas the full-bridge inverter operates at a low switching-frequency of Hz; thus, it can reduce the switching losses occuring in the inverter. Because the input inductor is operated in the discontinuous-current conduction-mode, a near unity power-factor can be achieved without an additional input inductor current controller. Consequently, the overall system shows a simple structure. Operational modes were ana-

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