ECED3204: Microprocessor Part IV--Timer Function

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1 ECED3204: Microprocessor Part IV--Timer Function Jason J. Gu Department of 1 Outline i. Introduction to the Microcontroller Timer System ii. Overview of the Mega AVR Timer System iii. Timer Clock Source Selection iv. Timer/Counter Operation Modes v. Applications of Each Timer/Counter Operation Mode 2 1

2 Introduction to the Microcontroller Timer System Clock input Supplied from I/O pin: counter Generated from MCU clock circuit: timer mode Using a timer to create time delays Counts up: n-bit timer: counts up from 0 and reaches 2 n 1; overflows and rolls back to 0 Counts down 3 Introduction to the Microcontroller Timer System: Input capture Input capture: involves external signal applied to an input-capture pin (ICP), involve TCNT, ICR. To measure period, width, duty cycle. 4 2

3 Introduction to the Microcontroller Timer System: Output compare Module includes output compare register (OCR), one or more control registers, one or more status registers, and a base timer/counter (TCNT) register. A output compare pin is also provided To use output compare function, we need to take the following action: make a copy of the TCNT register add an appropriate delay count to this copy store the sum in the OCR register. Output compare function is used to generate periodic interrupts, create time delays, trigger events, generate waveforms, etc. 5 Introduction to the Microcontroller Timer System: Pulse-Width Modulation Pulse-Width Modulation (PWM): waveform continues by itself until the duty cycle or period must be changed Implemented through special circuitry added to the timer system so that the CPU only has to set up the duty cycle and period once PWM module consists of an output pin, a timer/counter, a period register, a duty register. There are single slope and dual slope PWM 6 3

4 Introduction to the Microcontroller Timer System (cont d.) 7 Introduction to the Microcontroller Timer System (cont d.) 8 4

5 Overview of the Mega AVR Timer System ATMega640/1280/2560 devices have six timers Timer 0 and 2 are 8-bit timers Timer 1, 3, 4, and 5 are 16-bit timers All timers except Timer2 derive their clock input by dividing the internal CLKI/O by prescaler or from external pin Timer2 derived its clock by dividing one of following three source: CLKI/O, external KHz, external clock to TOSC1 9 Overview of the Mega AVR Timer System Timer 0 and 2 are 8-bit timers Timer 0 has two output-compare units (OC0A and OC0B). Each output compare unit generate PWM output. Timer 0 has three interrupt sources TOV0, OC0A,OC0B Timer 2 is identical to timer 0 except it may also select clock source. Timer 1, 3, 4, and 5 are 16-bit timers Each 16 bit timer has one input capture unit. (ICn,n=1,3,4,5) Three independent output-compare units (OCnA,OCnB,OCnC, n=1,3,4,5) Five interrupt sources TOVn,ICFn,OCFnA,OCFnB,OCFnC (n=1,3,4,5) 10 5

6 Overview of the Mega AVR Timer System Timers pin assignment Timers share the use of signals with other peripheral signals and general I/O pins 11 Overview of the Mega AVR Timer System 12 6

7 Overview of the Mega AVR Timer System (cont d.) 8-bit timer building blocks Major components: count unit, output-compare unit, and compare match output unit 13 Overview of the Mega AVR Timer System (cont d.) 16-bit timer building blocks Major components: count unit, input-capture unit, output-compare unit, and compare match output unit 14 7

8 Timer Clock Source Selection Timer/counter: requires a clock input to count Clock source: selected by programming the Timer/Counter control register B (TCCRnB, n = 0,, 5) 15 Timer Clock Source Selection 16 8

9 Timer Clock Source Selection 17 Timer Clock Source Selection 18 9

Timer Clock Source Selection 19 Timer/Counter Operation Modes Timer/counter (8- or 16-bit) operation modes: normal, CTC, fast PWM, phase-correct PWM, and phaseand-frequency-correct PWM 8-bit

10 Timer Clock Source Selection 19 Timer/Counter Operation Modes Timer/counter (8- or 16-bit) operation modes: normal, CTC, fast PWM, phase-correct PWM, and phaseand-frequency-correct PWM 8-bit timer/counter operation modes Timer operation mode: selected by the Timer/Counter control register A ( TCCRnA, n = 0,, 5) and one or two bits in the Timer/Counter control register B (TCCRnB, n = 0,, 5) 20 10

11 Timer/Counter Operation Modes 21 Timer/Counter Operation Modes 22 11

12 Timer/Counter Operation Modes 23 Timer/Counter Operation Modes 24 12

13 Timer/Counter Operation Modes 25 Timer/Counter Operation Modes 26 13

14 Timer/Counter Operation Modes 27 Timer/Counter Operation Modes (cont d.) 16-bit timer/counter operation modes Refer to Table 11.6 Selected by programming the GMn3:WGMn2 bits of the Timer/Counter control register B (TCCRnB, n = 1, 3, 4, or 5) together with the WGMn1:WGMn0 bits of the Timer/Counter control register A (TCCRnA, n = 1, 3, 4, 5) 16 bit timer and output compare register are divided into high byte (TCNTnH, OCRnxH) and low byte (TCNTnL, OCRnxL). read access start from low byte, write access start from the high byte

15 Timer/Counter Operation Modes (cont d.) 29 Timer/Counter Operation Modes (cont d.) 30 15

16 Timer/Counter Operation Modes (cont d.) 31 Timer/Counter Operation Modes (cont d.) 32 16

17 Timer/Counter Operation Modes (cont d.) 33 Timer/Counter Operation Modes (cont d.) 34 17

18 Timer/Counter Operation Modes (cont d.) 35 Applications of Each Timer/Counter Operation Mode Timer/counter uses: create time delay, generate waveforms, and measure signal parameters Five operation mode Normal CTC Fast PWM Phase-correct PWM Phase and-frequency-correct PWM 36 18

19 Using the Timer Normal Mode Timer counts up from 0 to the TOP value, rolls over to 0, and then counts up again. TOVn is set to 1 when the timer rolls over to 0. Using the normal mode in creating time delays 8-bit timer not used in this mode why? too short. Time-delay methods: timer overflow and outputcompare match 37 Using the Timer Normal Mode Timer overflow: let the timer count up from certain value until it overflows. Calculate the timer count (TC) to create the delay TD. place the value 2 n -TC in the timer, let it count up and wait until it overflows. Output-compare match: calculate TC, add this to current time value, place sum in OCRnx, let the timer to count up until its value matches OCRnx

20 Using the Timer Normal Mode: example example: write a function to create a delay of 25ms using the timer/ counter 1. assuming fclk_i/o 10MHz choosing clk_i/o as the input and setting prescaler to 8, the timer count require to create a 25ms delay is (25*10-3 *10 7 /8) 39 Using the Timer Normal Mode: example //timer overflow method, using TCCR1B,TCCR1A, TCNT1H,TCNT1L, TIFR1, TOV1.include <M644Adef.inc>.def tmp1 = r20 Delay25: ldi tmp1, 0 ; normal mode sts TCCR1A,tmp1 ldi tmp1, 0x02 ; clk_i/o/8 sts TCCR1B,tmp1 Wp25: ldi tmp1, high(344286) ; timer 1 count is sts TCNT1H,tmp1 ldi tmp1,low(344286) sts TCNT1L,tmp1 ldi tmp1, 1<<TOV1 sts TIFR1,tmp1 ;write 1 to TOV1 to clear it Wt25: lds tmp1,tifr1 ; wait until TOV1 flag is set to 1 sbrs tmp1, TOV1 rjmp wt25 dec r16 brne wp25 ;if r16 not zero, delay again. ret 40 20

21 Using the Timer Normal Mode: example //output compare match in C, using TCCR1A,TCCR1B, TCNT1, OCR1A, TIFR1 void dly25msoc(unsigned char cx) { TCC1A = 0; // configure timer 1 in normal mode TCC1B = 0x02; // clk/8 while(cx){ OCR1A = TCNT ; //start compare function TIFR1 = 1 << OCF1A; // clear OCF1A flag while(!(tifr1 & (1<<OCF1A))); // wait until OCF1A flag set cx - -; } } 41 Using the Timer Normal Mode (cont d.) Using the timer normal mode in waveform generation Pin action of compare match toggle (COMnx1:COMnx0 = 01) of normal mode: used to generate periodic square wave with any duty cycle Reliant upon frequent CPU involvement 42 21

22 Using the Timer Normal Mode (cont d.) example: write a sequence of AVR instructions and C statements to be executed by ATMega644 MCU to generate a 2KHz waveform with 80% duty cycle from the OC1B pin using timer 1, assuming fclk_i/o=16mhz selecting clk_i/o/8 as source, high and low of the 2KHz wave form consist of 800 and 200 timer clock cycles. 43 Using the Timer Normal Mode (cont d.) #include <avr\io.h>; #include <avr\interrupt.h> #define hicnt 800 #define locnt 200 #define HI 1 #define LO 0 char HIoLO; void main(void) { DDRD =0x20; // OC1A output TCCR1B =1<<CS11; // normal, clk/8 TCCR1C = 1<<FOC1A; // force OC1A high TCCR1A =1<<COM1A0; //select toggle OCR1A =TCNT1+hiCnt; // first compare HIoLO =LO; TIMSK1 = 1<<OCE1A //enable OC1A interrupt TIFR1 = 1<<OCF1A //clear OCF1A sei(); //; enable interrupt globally while(1); } // using TCCR1A, TCCR1B, TCCR1C,OCR1A, TIMSK1, TIFR1, Using interrupt, compiled ISR(TIMER1_COMPA_VECT) { if(hiolo) { OCR1A = OCR1A+hiCnt; HIoLO = LO; } else { OCR1A = OCR1A+loCnt; HIoLO = HI; } } 44 22

23 Using the Timer Normal Mode (cont d.) Using the normal mode to make sound Figure Circuit connection for a speaker 45 Using the Timer Normal Mode (cont d.) Use OC1A pin of timer 1 to generate two tone siren 440HZ and 880Hz, assuming clk_i/o is 16MHZ ( asm and C) step1: connect speaker to OC1A step2: configure timer1 normal mode, compare match output step3: Enable OC1A interrupt, start OC1A operation with 2273 (440HZ)as delay step4: write the service routine for OC1A interrupt, restarts OC1A operation with 2273 as delay step 5: wait half second step 6: change the delay count for the OC1A operation to 1136 (880HZ), and use it for OC1A interrupt service routine step 7: wait for half second step 8: change the delay to 2273 and go to step

24 Using the Timer Normal Mode (cont d.) Using the normal mode to play a song Created by modifying the siren program Song played using a speaker Table with frequencies and durations of all the notes in a music score Program uses output-compare function to generate the digital waveform with the specified frequency and duration of each note Song played in Assembling Song played in C 47 Using the Timer Normal Mode (cont d.) Using the normal mode to measure signal frequency Signal used as the clock source of the timer/counter ldi tmp 7; //CSn2-CSn0: 111 sts TCCRnB, tmp; //external clock on pin, rising edge, Frequency of the unknown signal Frequency = tovcnt final Timer count where tovcnt represents the number of times that timer n overflows during the 1-sec period Example in ASM. Example in C 48 24

25 Using the Timer Normal Mode (cont d.) Measuring signal period using the normal mode Step 1: Configure the timer/counter properly Step 2: Wait for the first rising edge to arrive Step 3: Enable timer overflow interrupt and cleared ICF and TOV flags; initialize timer overflow count to 0; force timer/counter to count up from 0 Step 4: Wait for the arrival of the second rising edge 49 Using the Timer Normal Mode (cont d.) Example : Write a ASM program to measure the period width of a signal connected to the ICP1 pin of the MEGA2560 MCU

26 Using the Timer Normal Mode (cont d.) Example : Write a C program to measure the pulse width of a signal connected to the ICP1 pin of the MEGA2560 MCU. 51 Using the Timer Normal Mode (cont d.) #include <avr/io.h> #include <avr/interrupt.h> unsigned char tovcnt; unsigned long int pulsewidth; int main(void) { tovcnt = 0; TCCR1A = 0; // configure timer1 to normal mode DDRD &=0xEF; // configure PD4/ICP1 pin for input TIFR1 = 0x2F; // clear all timer1 flags TCCR1B = (1<<ICES1) (1<<CS11)// capture the rising edge while(!(tifr1 & (1 << ICF1))); // wait for the arrival of the rising edge TCNT1 = 0; // force timer1 to count up from 0 TIFR1 = (1<<TOV1) (1<<ICF1) // clear TOV1 and ICF1 flags TIMSK1 = 1<<TOV1// enable TOV1 interrupt TCCR1B = 0x02; // prepare to capture the falling edge sei(); // enable interrupt globally while(!(tifr1 & (1 << ICF1))); // wait for the arrival of the falling edge TCCR1B = 0; // stop timer 1 pulsewidth = (unsigned long)tovcnt * (unsigned long)tcnt1; return 0; } ISR(TIMER1_OVF_vect) { tovcnt++; } 52 26

27 Using the CTC Mode Clear timer on compare match (CTC) mode Using the CTC mode to create time delay OCRnA or ICRn register used to hold the TOP value of the timer Using the CTC mode to generate waveform {{ TOP = (f CLK_I/O Timer prescaler) (2 f W ) 1 53 Using the CTC Mode Write an AVR assembly program to generate a periodic square wave with 2-kHz frequency and 50% duty cycle using the Timer 1 CTC mode of the ATmega640/1280/2560 device. Solution: By setting the prescaler to 1, the TOP value to be loaded into the ICR1 register is TOP = ( ) ( ) = 4,000 The assembly program that generates this waveform is as follows: 54 27

28 Using the CTC Mode.include <m2560def.inc>.def tmp = r16.cseg.org 0x00 rjmp start.org 0xF6 start: ldi r16,low(ramend) out SPL,r16 ldi r16,high(ramend) out SPH,r16 ldi r16,0x20 ; configure PD5/OC1A pin for output sts DDRB,r16 ; ldi tmp,1<<com1a0 ; configure Timer1 to CTC mode (WGM13:0: 1100) sts TCCR1A,tmp ; and make OC1A pin toggle clr tmp ; force timer1 to count up from 0 sts TCNT1L,tmp ; " sts TCNT1H,tmp ; " ldi tmp,high(4000) ; place 4000 as the TOP value sts ICR1H,tmp ; " ldi tmp,low(4000) ; sts ICR1L,tmp ; " ldi tmp,1<<wgm13 1<<WGM12 1<<CS10; sts TCCR1B,tmp ; to generate the 2 khz square wave with 50% duty cycle again: jmp again 55 Using the Fast PWM Mode Compare match pin action in fast PWM mode Figure Fast PWM mode waveforms 56 28

29 Using the Fast PWM Mode (cont d.) Using OCRnA to hold the TOP value Advantage: generated PWM waveform is always symmetric Using ICRn to hold the TOP value Works well when the TOP value is fixed Extreme cases for the fast PWM OCRnx register is set equal to the BOTTOM Setting the OCRnx equal to TOP 57 Using the Fast PWM Mode (cont d.) Example: Write a sequence of C statements to be run on a ATmega640/1280/2560 demo board to generate a 200-Hz frequency waveform with a 70% duty cycle in fast PWM mode from the OC1A pin and use ICR1 to hold the TOP value assuming that f clk_i/o = 16 MHz. Solution: DDRB = 1<<5; // configure PB5/OC1A pin for output TCNT1 = 0; // force timer1 to count up from 0 ICR1 = 10000; // set counter TOP value to 10,000 OCR1A = 7000; // set duty cycle to 70% TCCR1A = 1<<COM1A1 1<< WGM11 // select non inverting, fast PWM mode TCCR1B = 1<<WGM13 1<<WGM12 1<< CS11; // select clk_io/8 as clock source and ICR1A as TOP 58 29

30 Using the Fast PWM Mode (cont d.) example: write a sequence of AVR instructions and C statements to be executed by ATMega640 MCU to generate a 2KHz waveform with 80% duty cycle from the OC1B pin using timer 1, assuming fclk_i/o=16mhz selecting clk_i/o/64 as source, high and low of the 2KHz wave form consist of 100 and 25 timer clock cycles. 59 Using the Fast PWM Mode (cont d.) solution: We will use the fast-pwm non-inverting mode to generate this waveform. We will set the clock source to clk_i/o 64. The TOP value is calculated to be ( ) = 125. The value to set the duty cycle is % = 100. Assembly program to generate a 2-kHz waveform with 80% duty cycle that uses fast-pwm noninverting mode is as follows:.def tmp = r16 ldi tmp,0x20 ; configure OC0B/PG5 pin for output sts DDRG,tmp ; ldi tmp,1<<com0b1 1<<WGM01 1<<WGM00; non inverting fast PWM out TCCR0A,tmp ; use OCR0A as TOP value ldi tmp,125 ; set period to 0.5 ms out OCR0A,tmp ; ldi tmp,100 ; set duty cycle to 80% out OCR0B,tmp ; ldi tmp,1<<wgm02 1<<CS01 1<<CS00; select clk_i/o / 64 input out TCCR0B,tmp ; C program to generate a 2 khz waveform with 80% duty cycle is as follows: DDRG = 0x20; // configure OC0B/PG5 pin for output TCCR0A = 1<<COM0B1 1<<WGM01 1<<WGM00 // non inverting PWM OCR0A = 125; // set up signal period to 0.5 ms OCR0B = 100; // set up waveform duty cycle to 80% TCCR0B = 1<<WGM02 1<<CS01 1<<CS00; // clk_i/o / 64 as timer 0 clock input 60 30

31 Using the Phase-Correct PWM Mode 61 Using the Phase-Correct PWM Mode The choice of the TOP value 8-bit timer: 0 FF or the OCRnA register (n= 0 or 2) 16-bit timer: 0 00FF, 0 01FF, 0 03FF, the value in the OCRnA register, or the value in the ICRn register 62 31

32 Using the Phase-Correct PWM Mode (cont d.) Pin action on compare match in the phasecorrect PWM mode Refer to Tables 11.4 and 11.9 Only the pin action choice 2 (non-inverting mode) and 3 (inverting mode) should be selected 63 Using the Phase-Correct PWM Mode (cont d.) Example: Use the OC0A pin to generate a 40% duty cycle PWM waveform using the phase correct PWM non inverting mode. Assuming clk_i/o is 16MHZ and the prescaler is set to

33 Using the Phase-Correct PWM Mode (cont d.) ;TOP value is set to OXFF.include <m2560def.inc>.cseg.org 0x00 Rjmp start.org 0xF6 start: ldi r20,low(ramend) out SPL,r20 Ldi r20,high(ramend) out SPH,r20 DDRB =0x80; TCCR0A =1<<COM0A1 WGM00; TCCR0B =1<<CS01; OCR0A =102 TCNT0 =0;.def tmp = R16 ldi tmp,0x80; configure the PB7/OC0A pin for output out DDRB,tmp; " ldi tmp,1<<com0a1 1<<WGM00;OC0A to phase correct PWM;non inverting mode out TCCR0A,tmp; ldi tmp,1<<cs01; select clk_i/o / 8 as the clock out TCCR0B,tmp; to TCNT0 ldi tmp,102; set duty cycle to 40% out OCR0A,tmp; " ldi tmp,0; force TCNT0 to count up from 0 out TCNT0,tmp; " 65 Using the Phase and Frequency Correct PWM Mode Based on a dual-slope operation Available only in a 16-bit timer Counter counts repeatedly from BOTTOM to TOP and then from TOP to BOTTOM f PFCPWM = (f CLK_I/O timer prescaler) (2 TOP) The procedure of generating the PWM waveform using PFCPWM is identical to the PCPWM mode 66 33

34 Using the Phase and Frequency Correct PWM Mode Example: Write a sequence of AVR instructions to be run on a ATmega640/1280/2560 demo board to generate a 50-Hz PWM waveform with 5% duty cycle using the phase and frequency correct PWM from the OC1A pin and use ICR1 to hold the TOP value assuming that f clk_i/o = 16 MHz. Solution: We will select clk_io/8 as the clock source to Timer1 and the TOP value is calculated to be TOP = /(2 8 50) = 20,000 The value to set duty cycle to 5% is 20,000 * 5% = Using the Phase and Frequency Correct PWM Mode ldi r16,0x20 ; configure PB5/OC1A pin for output sts DDRB,r16 ; " ldi r16,0x2f ; clear all Timer1 flags sts TIFR1,r16 ; " clr r16 ; force Timer1 to count up from 0 sts TCNT1H,r16 ; " sts TCNT1L,r16 ; " ldi r16,high(20000) ; set up TOP value sts ICR1H,r16 ; " ldi r16,low(20000) ; " sts ICR1L,r16 ; " ldi r16,high(1000) ; set up duty cycle value to 5% sts OCR1AH,r16 ; " ldi r16,low(1000) ; " sts OCR1AL,r16 ; " ldi r16,1<<com1a1 ; select phase and frequency correct PWM mode and sts TCCR1A,r16 ; use ICR1 to hold TOP count ldi r16,1<<wgm13 1<<CS11 ; select clk_io/8 as clock input to Timer1 sts TCCR1B,r16 ; and enable Timer

35 Driving the DC Motor DC motor: analog motor Figure Simplified DC motor control circuit 69 Driving the DC Motor DC Motor Driver ICs Available in many current and voltage ratings Example: SN from TI Driving a DC Motor Using the SN Illustrated in Figure The output waveform of the Hall-effect transistor 70 35

36 Driving the DC Motor 71 Driving the DC Motor Normal Operation: OC1A output WPM, OC1B output 0v Reverse operation OC1A output 0V, OC1B output WPM Brake the motor OC1A 0V, OC1B 5V

L13: (25%), (20%), (5%) ECTE333

L13: (25%), (20%), (5%) ECTE333 ECTE333 s schedule ECTE333 Lecture 1 - Pulse Width Modulator School of Electrical, Computer and Telecommunications Engineering University of Wollongong Australia Week Lecture (2h) Tutorial (1h) Lab (2h)