Passive and Active DC Breakers in the Three GorgesChangzhou HVDC Project


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1 Pssive nd Active DC Brekers in the Three GorgesChngzhou HVDC Project Dg Andersson, Dr, nd Anders Henriksson, B.Sc.E.E, ABB, Sweden explined below) re AbstrctA new type of DC breker, bsed on stndrd SF 6 AC circuit brekers with uxiliry circuits will now be used in the Three GorgesChngzhou HVDC Project insted of the old type bsed on oilminimum brekers. To crete the current zero necessry for rc extinction, pssive uxiliry circuit is used for lower currents, nd n ctive circuit t higher currents. The pssive circuit comprises cpcitor in series with rector, nd prllel nonliner resistor, cross the breker; in the ctive circuit the cpcitor is prechrged nd inserted t suitble time. The pper describes theoreticl models nd testing of the new brekers, nd how they re implemented in relity. Index TermsBipolr trnsmission, DC Breker, GRTS, HVDC, Metllic return, MRTB, Multiterminl schemes, NBGS,, SF6 breker, Trnsient nlysis. I. INTRODUCTION DC switches re used in bipolr HVDC schemes for different purposes: To reroute the DC current during reconfigurtion of the min circuit, nd to help extinguish fult currents. An importnt exmple is the Metllic Return Trnsfer Breker (MRTB), which is used for commutting the current from the ground pth to metl conductor, when there re restrictions on how long time DC current through the ground cn be llowed. Other exmples re Ground Return Trnsfer Switch (GRTS), Neutrl Bus Switch () nd Neutrl Bus Grounding Switch (NBGS), Fig. 1. Future pplictions my include DC switches on the high potentil side in multiterminl schemes. The purpose of this pper is to show how the old type of DC switches bsed on oilminimum brekers is now replced by new type bsed on stndrd SF 6 brekers. II. COMMUTATION PRINCIPLE The principle is shown in Fig. 1. Before t =, the circuit breker CB is closed nd the totl current I is ssumed to be distributed by R 1 nd R s i 1 () nd i () = I i 1 () in stedy stte. To commutte the current i 1 () in brnch R1L1 (e. g. ground return ) to brnch RL (e. g. metllic return), CB is opened nd countervoltge U is estblished (detils below). With the simplified ssumption tht I, U, L 1, L, R 1 nd R re constnt, n exponentil solution is obtined for i 1 (t) with time constnt τ = (L 1 + L )/(R 1 + R ), nd the commuttion time t k nd energy W to be bsorbed (in nonliner resistor, ( 1 i1 () ( R1 + R ) U) ( t + ) t U /( R ) t k = τ ln / (1) W = U i 1( ) k τ k 1 + R () In relity, inductnce nd resistnce re frequency dependent (especilly when the ground is involved), but if vlues for chrcteristic frequency re used, (1) nd () cn be useful for pproximte clcultions. CB + U  i1 i I R1 R Fig. 1. Commuttion of current from brnch R1L1 to RL by mens of countervoltge U, principle. To minimise the commuttion time nd energy to be bsorbed, U must be high, but the rc voltge of circuit breker is not sufficient. Insted, the rc must be extinguished nd the voltge U determined by prllel nonliner resistor. The min difficulty with DC brekers is tht there re no nturl current zeros where n rc cn be extinguished s in conventionl AC breker. Insted, current zero must be creted. For long time, oilminimum brekers with prllel circuit comprising sprk gp in series with cpcitor hve been used (Fig. ). Since oilminimum brekers hve severl disdvntges, this type of breker is now being replced by stndrd SF 6 brekers. However, SF 6 brekers need different uxiliry circuit due to their lower rc voltge. Two types of uxiliry circuits re presently used, pssive nd ctive. III. PASSIVE DC CIRCUIT BREAKERS In the pssive circuit, cpcitor in series with n inductor is connected in prllel with the SF 6 circuit breker, Fig.. This circuit is under certin conditions unstble, nd n oscilltion strts to grow until current zeros re creted where the rc cn be extinguished. When the rc is extinguished, the cpcitor is rpidly chrged until the nonliner resistor tkes over the current nd limits the voltge to suitble vlue. The energy W () is deposited in the resistor. L1 L
2 Putting the rel nd imginry prts of Z(jω) equl to zero gives nturl frequency nd n instbility limit. As n exmple, if the rc chrcteristic is given by UI α = β ( resonble pproximtion t lower currents), the instbility limit is given by the wellknown expression [1], [] U Fig.. Left: Oilminimum breker with uxiliry circuit including sprk gp. Right: SF 6 breker with pssive uxiliry circuit, explined in text. A. Theoreticl Models nd Simultions It is well known tht the current through n electric rc with prllel cpcitnce (Fig. ) cn strt to oscillte if the rc chrcteristic hs negtive derivtive du/di (Fig. 3). This cn led to unintended current chopping in AC pplictions [1], [], but it cn lso be used to interrupt DC currents. Smll devitions from sttic point P1 (Fig. 3) cn be described by n equivlent circuit [1], Fig. 3, where lso the externl cpcitor nd inductor from Fig. re included. At high frequency the rc behves like resistor, which mens tht R = U/I. At low frequency, the sttic chrcteristic is pplicble, which mens tht R i must be selected so tht R i in prllel with R gives vlue corresponding to du/di (negtive in Fig. 3). Finlly, L is chosen to give time constnt θ corresponding to the time constnt of the rc. Fig. 3. Sttic rc chrcteristic (left), nd equivlent circuit for rc, together with n uxiliry circuit (right). For generl chrcteristic with n operting point where R = U/I nd du/di = U' it is concluded tht R = U ' R L i =θr /( R /( R U ') U ') Intuitively, the complete circuit in figure 3 should hve nturl frequency defined by its inductnce nd cpcitnce, nd if the totl resistnce is negtive t this frequency, the circuit should be unstble. If the circuit is opened t "/" nd Z(jω) clculted, it is found tht Z( jω ) = Z rc + j( ωl 1/( ωc)), where Z rc P1 U/I du/di Current I P = R R + jω L ) /( R + R + jωl ) (3) ( i i Z Circuit breker rc C Ri R L L I inst = ( αβθc /( θ αlc)) 1/( α + 1) which mens tht the circuit is unstble below this limit, nd stble bove. In the more generl cse, where the chrcteristic loclly is given by R nd U', numericl methods re needed to find the limit. In generl, the rc prmeters R, U' nd θ must be inferred from tests, nd θ is perhps the most difficult one to determine. However, if it is obvious tht circuit s in Fig. under test is close to the instbility limit, the rel prt of Z(jω) is close to zero, nd this simplifies the clcultion of θ. With such methods, the rc prmeters cn be determined for different rc lengths nd blst pressures in circuit breker. With model clibrted in this wy, further testing cn be mde more efficient. In the model, s in relity, the instbility limit will be timedependent s the rc prmeters chnge with the rc length nd the blst pressure. This mens tht for constnt current, the circuit my first be stble, nd then become unstble t certin time when the breker opens. However, n instbility in the circuit in Fig. is of course not enough for successful interruption; the mplitude of the oscillting current must lso grow until current zero is creted in the circuit breker within n cceptble time. This growth cn be simulted (below), but it cn lso be clculted pproximtely by considering simple series resonnt circuit comprising n inductnce, cpcitnce nd resistnce. If this circuit hs the sme nturl frequency nd dmping (positive or negtive) versus time s the more complicted circuit in Fig. 3, n initil disturbnce i t time t when the circuit becomes unstble, will grow s i = t i exp( ( R ( τ ) / L ( τ)) dτ) (4) t where L nd R cn be determined from (3). Interruption will tke plce when i hs grown to the DC current through the breker. The model shows tht there is n optimum vlue for the inductnce in the circuit which gives the shortest interruption time from contct seprtion (provided tht the circuit becomes unstble t ll). Low inductnce gives lte instbility, nd thus long totl interruption time. When the inductnce is incresed, instbility sets in erlier until the circuit is unstble lredy t contct seprtion, which gives the shortest interruption time. However, when the inductnce is incresed further, the growth rte decreses (4), nd the interruption time becomes longer gin. Simultions hve lso been mde with blckbox model, [3]: dg / dt = ( G G)/θ () s where G s is the sttionry rc conductnce (Fig. 3), G the
3 ctul, momentry vlue of I/U, nd θ the time constnt of the rc. As is seen, under stedy stte conditions G = G s, but if G differs from G s, G will pproch G s t rte determined by the rc constnt. G s nd the time "constnt" θ re functions of rc length nd blst pressure (nd thus of time) nd hve been clibrted ginst tests. If () is coupled with the differentil eqution for the uxiliry circuit, Fig., the interruption process cn be simulted. An exmple is shown in Fig. 4, where successful interruption of 1.1 ka is simulted with n uxiliry circuit where C = 9 µf nd L = 3 µh. The mximum current tht could be interrupted with this breker ws. ka, indicting tht point P, where du/di =, Fig. 3, hd been reched, nd rc chrcteristics plotted from current nd voltge dt from ll tests supported this view. Interruption of higher currents with pssive circuit requires specilly modified breker chmber to move P in Fig. 3 to higher current. However, ABB Power System prefers to use stndrd, wellproven components, nd insted n ctive uxiliry circuit, described below, will be used for higher currents. 8 kvolt U_ARC 8 k/div Current (ka), Voltge (kv) 3. ka I_TB 1 k/div mm TRAVEL /div Voltge (kv) Time (ms) MP PRESS 4 k /div ms/div ms Fig.. Exmple of test oscillogrm showing interruption of. ka. Arc (nd recovery) voltge U_ARC, rc current I_TB (with unintended lowfrequency ripple from the feeding circuit), contct seprtion TRAVEL nd puffer pressure PRESS versus time. The recovery voltge is limited fter interruption to 34 kv by nonliner resistor. C. Comprison between clcultions nd tests Current (ka) Fig. 4. Exmple of simultion of n rc, using (), together with pssive uxiliry circuit. Voltge (thin) nd current (thick) versus time (top), nd the corresponding excursions from the sttic rc chrcteristic (bottom). B. Tests In prllel with the theoreticl investigtions, tests hve been done. The purpose hs been both to clibrte the models, nd to test the performnce limits of the different circuits. A stndrd, onechmber, AC SF 6 puffer breker of type HPL 4 B1 ws tested with pssive circuit with different vlues of cpcitnce nd inductnce, nd the current ws vried to find the instbility nd interruption limit. The cpcitnce ws chosen to give high instbility limit nd n cceptble derivtive of the recovery voltge t n cceptble cost. When the inductnce ws vried, n optimum ws found which gve the shortest interruption time s in the model described bove. In these tests the totl inductnce in the uxiliry circuit ws mesured seprtely. The minimum inductnce without ny rector in the uxiliry circuit, i. e. the stry inductnce, ws determined to 3 µh in the test setup. An exmple of test oscillogrm is shown in Fig.. Current (A) 1 1.E+.E6 1.E 1.E.E.E Cpcitnce (F) Unstble (test) Stble (test) 1 microh (clc.) microh (clc.) Fig. 6. Comprison between theoreticlly clculted instbility limit versus prllel cpcitnce with stry inductnce of 1 µh nd µh, nd test results. Theoreticl models nd simultions hve been compred with, nd supported the tests in severl wys. As check of selfconsistency, the predicted instbility limit versus prllel cpcitnce hs been compred with test results, Fig. 6. The rc prmeters in the model hve first been determined from mesurements of current nd voltge before interruption in test series without rector in the uxiliry circuit. Then the
4 model hs been used to predict the instbility limit, ssuming smll (stry) inductnce. As is seen in Fig. 6, 1 µh gives limit tht is too low, wheres µh gives resonble greement with the tests (lter mesurements in similr test circuit gve stry inductnce of 3 µh). The simultions hve lso showed good greement with test results nd mde it possible to find limits with fewer tests thn otherwise would hve been possible. IV. ACTIVE DC CIRCUIT BREAKERS When the DC current is bove the instbility limit, n ctive circuit is needed to crete current zeros. Severl methods re possible, but the simplest one is to insert prechrged cpcitor into the uxiliry circuit, Fig. 7, when rc length nd blst pressure in the SF 6 breker re sufficient [4]. A stndrd, onechmber, AC SF 6 puffer breker of type HPL 4 B1 ws tested with n ctive uxiliry circuit where the chrging voltge nd polrity were vried. Successful interruptions were chieved with both polrities up to ka; higher currents were not tested. An exmple is shown in Fig. 9. In generl, good greement ws found between the simultions nd the tests, s Fig. 8 nd Fig. 9 illustrte. V. DIELECTRIC TESTS In the tests with pssive nd ctive circuits (Fig. nd Fig. 9), the recovery voltge ws limited to 34 kv, which ws enough to successfully demonstrte the therml prt of the interruption nd prt of the dielectric recovery. However, in rel ppliction much higher voltge is needed (of the order of 1 kv for n MRTB). In the lbortory, such high recovery voltge cn only be obtined in synthetic circuit, where the relevnt DC current through the breker is interrupted, followed by relistic recovery voltge injected from seprte circuit. Such tests hve shown tht the breker cn withstnd t lest 16 kv fter hving interrupted 4 ka. Fig. 7. An SF 6 breker with n ctive uxiliry circuit with chrging device nd nonliner resistor. A. Simultions The sme clibrted blckbox model s for the pssive circuit, but with "switch" for insertion of the chrged cpcitor hs been used. An exmple is shown in Fig. 8, where interruption fils in the first two current zeros, but is successful in the third. Simultions with different chrging voltges nd different polrities hve been done. If the voltge is too low, interruption will s expected fil, but opposite polrity is no problem. Current (ka) 1 1 VI. COMMUTATION IN A REAL NETWORK Although simple equtions s (1) nd () cn give vluble informtion, the finl rting of the DC breker components in rel ppliction requires trnsient nlysis. The frequency dependence of the inductnce nd resistnce must be tken into ccount, especilly for the ground. The frequency rnge of interest here is from below.1hz up to tens of Hz. Since this rnge is below wht stndrd line models in commercil simultion progrms cn hndle, specil models hd to be developed. Dt for overhed lines nd erth resistivity gives, together with the Crson eqution for the equivlent current depth, series impednce nd shunt dmittnce mtrices for different frequencies. From these mtrices, pole nd ground mode impednces needed in the model cn be clculted. For the ground pth, model comprising series connected links, Time (ms) MRTB Fig. 8. Exmple of simultion of successful interruption of ka with n ctive circuit with C = 18 µf chrged to 1 kv nd L = 1 µh. 1) Tests 1 kvolt U_ARC 1 k/div GRTS NBGS NBGS I_TB 4 k/div 34 ka ms/div ms Fig. 9. Exmple of test oscillogrm showing successful interruption of 4.9 ka with n ctive circuit with C = 17.7 µf chrged to kv nd L = 8 µh. Fig. 1. The commuttion circuit for the MRTB (before opening). ech contining number of prllel brnches of n inductnce nd resistnce in series, is used. Using specil softwre, the component vlues re selected so tht the frequency dependence of the impednces in the model
5 correspond to the impednces clculted bove. As n exmple, Fig. 1 shows cse where the current is to be commutted from ground to metllic return by the MRTB, nd Fig. 11 shows the corresponding EMTDC simultion model. DC breker Sttion 1 electrode line Link 1 of n Ground Link n of n Sttion electrode line X. REFERENCES [1] Rizk, F.A.M.: "Interruption of smll inductive currents with irblst circuitbrekers". Thesis, Chlmers Institute of Technology, Gothenburg 1963 [] Andersson, Dg: "Current instbility nd chopping with rcs in series". IEEE Proceedings, Vol. 13, Pt. C, No. 4, July 198 [3] Kopplin, H.: Mthemtische Modelle des Schltlichtbogens". etz Archiv Bd. (198) H. 7 [4] EPRI EL4138, Project 171, Finl Report July 198. "Highvoltge DC Circuit Breker Experiment" (prepred by Westinghouse Electric Corportion, Pittsburgh, Pennsylvni) Id Metllic return Overhed line Fig. 11. EMTDC model used for simultion of the MRTB commuttion in the circuit shown in Fig. 1. VII. DESIGN OF DC SWITCHES In prcticl design, there re mny dditionl considertions of importnce. The uxiliry circuit must be plced on n insulted pltform, nd the ctive circuit lso needs chrging device, Fig. 1. Furthermore, for the MRTB nd the GRTS, the nonliner resistors must be rted for more thn one commuttion, nd the sequence control must be ble to reclose in time if the commuttion fils. VIII. DISCUSSION Since the present design ws developed nd tested with the Three GorgesChngzhou Project in mind, higher currents nd voltges were not tested; however, ll tests were successful, nd thus there is potentil for still higher performnce. Inspection fter mny tests lso showed very little wer of the breker chmber. Future pplictions my lso include the highpotentil side, possibly with multichmber brekers. Alterntive designs were of course considered, e. g. modified breker chmber for use with pssive circuit t higher currents, but such development is very costly nd it is questionble if ka cn be reched t ll, cf. [4]. Therefore, ABB prefers to use stndrd SF 6 brekers. Semiconductor lterntives were lso discussed, but t the present they re not competitive, lthough the sitution my chnge in the future. IX. CONCLUSION In the Three GorgesChngzhou HVDC Project, DC brekers re being constructed ccording to the principles described bove. The new DC brekers hve mny dvntges over the previous oilminimum type, nd there is still potentil for further development. Fig. 1. Insulted pltform with ctive uxiliry circuit. Cpcitors nd nonliner resistors re clerly visible; smll rector cn be seen on the right corner. Chrging unit in the foreground on the floor. XI. BIOGRAPIHIES Dg Andersson ws born in 194, nd grduted from the Royl Institute of Technology in Stockholm, where he lter got doctor's degree in electron physics. His reserch experience includes plsm nd rc physics, nd he hs been visiting scientist t the Europen Spce Agency. His present field of ctivity t ABB Power Systems includes electromgnetic comptibility nd relted problems in connection with HVDC. Anders Henriksson ws born in 19, nd grduted from the Mälrdlen University in 1998 (B.Sc.E.E.). His employment experience includes UDDCOMB SWEDEN AB, nondestructive testing of min pressure vessels for nucler power plnts ( ) nd ABB Power Systems, Project Qulity Mnger for severl HVDC projects ( ), engineer t the Min Circuit Design Deprtment HVDC Project Technicl Mnger 1 .
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