Intra-system EMI hardening for increased machine reliability. Ray Brett.

Transcription

1 Intra-system EMI hardening for increased machine reliability Ray Brett

2 Assembleon Pick & Place SMT equipment Assembleon SIEMENS VDO AUTOMOTIVE 2

3 Contents Trends in Product Creation Process System reliability Basic principles of reliability and HALT Intra EMC Generic immunity standards (e.g. IEC ) Shortcomings EMC standards Real-life electromagnetic disturbances Energy comparison of different transient phenomena New developed test equipment for ESD (MM) coupling onto cables Transient immunity stress levels (HALT principle) Case overview using HALT method for transients Rule of thumb target immunity levels 3

4 Trends in Product Creation Processes Time: Shorter time to market (profitability) Costs: Cost competitiveness Development: Function: Higher level of integration COTS (Commercial Off-The-Shelf) modules Black-box module developments Quality: Increasing customer demands Customer expects: Maximum up-time Maximum performance Not according to expectations Warranty Present Future EOL 4

5 System reliability A chain is only as strong as its weakest link" applies to any process that will fail if some step in it goes wrong. Problem: How to ensure that the system will perform as intended and will work reliably throughout it s (intended) lifecycle - after various modules have been integrated? 5

6 Basic principles of Reliability: Reliability of a product is determined by: strength (product related) stress (user/environment related) 6

7 Reliability (Load & Strength interferences) Excluding wear-out 1 Defect! Load Ref. Patrick T.D. O Connor British Areospace Strength 7

8 Reliability (HALT principle).. 1 Induce failure Find weak-spots Improve design Load Ref. Patrick T.D. O Connor British Aerospace Strength 8

9 Reliability (HALT principle).. Increase Design Margin Load Ref. Patrick T.D. O Connor British Aerospace Strength 9

10 EMC: Compatibility gap concept Victim Source 10

11 What is HALT? HALT: (High Accelerated Life Testing) HALT is an engineering step-stress-to-fail process which can reveal design flaws quickly (within hours of testing). HALT is not a Pass/Fail test and not limited by component or product specifications. Failure Evaluate the relevance of the failure. Determine if stress-level is acceptible and implement corrective action if necessary. Failure Specification (max.) Increase stress Evaluate the relevance of the failure. Determine if stress-level is acceptible and implement corrective action if necessary. Apply stress 11

12 Electronics HALT tests may include: Temperature (-40 o C to 140 o C) under max. loading conditions In combination with power cycling (ON/OFF) Temperature cycling Voltage (in combination with temp.) Shock & vibration RH% Electromagnetic Interference (e.g. transients on cables) 12

13 Intra-EMC Intra-EMC involves reduction of interfering sources within equipment and ensuring a certain amount of immunity for all sub-systems. Signal port Intra EMC AC power port Signal port earth port Apparatus (Sub-system) AC power port DC power port Enclosure port Functional earth port DC power port Apparatus Enclosure port 13

14 Generic immunity standard IEC IEC : Generic Immunity standard for industrial equipment Performance criterion A: Permissible loss of performance within expectations for the equipment Performance criterion B: Degradation of performance is allowed during the test Performance criterion C: Temporary loss of function is allowed (self-recoverable or can be restored by operation of controls) E.g. Fast transients: spec. = +/- 1kV for Signal ports > 3m (Performance criterion B) Immunity Testing Compatibility Levels are too relaxed 14

15 Shortcomings EMC standards EMC standards and regulations have grown up around issues of spectrum control. The immunity test methods do not (in general) address intra-system EMI situations within the equipment itself. Many subcontractors designing electronic devices for machines aim for the minimum regulatory requirements. Intra-EMI phenomenon are directly related to the reliability of a product, in which case the manufacturer has full responsibility. So, where it is desired to create reliable products, EMC immunity work should go beyond complying with harmonized standards. 15

16 Real-Life electromagnetic transient disturbances (1) In real-life applications, ESD events can originate from a wide variety of sources other than people s fingers, as sketched in the figure. These sources can have much higher values of capacitance than 150pF, and/or much higher voltages. Fast, short duration electrical transients can also be caused by: Lightning strikes Power outages Inrush current phenomena Tripped circuit breakers Short circuits Relays Solenoids, Eelectric motors 16

17 Real-Life electromagnetic disturbances (2) Non-predicted Electromagnetic disturbances are usually a cause of machine failures and can cause malfunction or breakdown of internal electronic devices. Typical electromagnetic disturbances are often in the form of Electromagnetic Pulse (EMP) or often called Transient disturbances. Such disturbances arise where the source emits a short-duration pulse of energy. The energy is usually broadband by nature, but it can excite a relatively narrow-band (damped sine wave) response in the victim. Cables can behave as very efficient antenna s and can easily pick-up such transient noise and cause malfunction or breakdown of electronic devices. 17

18 Energy comparison of different transient phenomena The energy of ESD events is very low compared to other transient phenomena but the frequency spectrum generated is very broad. ESD events can generate frequencies as high as 2GHz or more. Dut to it s low energy, ESD-like transients are an ideal source for testing & hardening electronics without overstressing. Electronic circuits are usually sensitive to the high dv/dt-rate. The graph is for comparative purposes only the real energy delivered to a particular EUT can only be calculated if the load impedance, characteristics, and the actual waveshape applied to the load are known accurately. The energy in Joules (watt seconds) is shown in the graph and is given by: where V(t) and I(t) are the open circuit voltage and short circuit current waveforms, respectively. 18

19 New developed test equipment for ESD (Machine Model) coupling onto cables CableZap (patented) Faster rise time than IEC Higher test levels which fits with HALT philosophy Cost effective & portable ESD generator Air discharge mode Static charge EUT C Cable Vacuum Relay control Static discharge unit 19

20 New developed test equipment for ESD (Machine Model) coupling onto cables Example of testing with the IEC coupling clamp (bench testing) 20

21 New developed test equipment for ESD (Machine Model) coupling onto cables Example of testing with a flexible clamp (machine testing) 21

22 Transient immunity stress (HALT principle) The HALT philosophy involves testing to failure (step-stress-to-fail) High dv/dt test level is needed Failure Evaluate the relevance of a failure. Determine if stress-level is acceptible and implement corrective action if necessary. IEC (EFT) Most EFT generators have a max. output voltage of approx. 4 to 5kV Increase stress Apply stress 22

23 HALT case overview Transients Modified Add 10nF cap. Cost: negligible 10kV 9kV 10kV Modified Gnd. connection Cost: negligible 10kV Modified Add 2x10nF caps. Cost: negligible 10kV Modified Shield repeater Cost: 5 euro Modified Gnd. connection Cost: 10ct Design integration EMC Cost: negligible Case 8 (TPR) 8kV 7kV 6kV 5kV 4kV At approx. 8kV, Cable isolation can break-down Case 3 (Tape cutter) mp reset Case 4 Fire-Wire Repeater problem 8kV defect 6kV Case 6 (BA- Camera) 4kV Design integration EMC Cost: negligible Case 7 (LED pcb) 8kV 3kV 2kV 1kV 3kV Case 1 3kV FET defect 3kV Case 2 2kV (ITBF) mp reset 2kV 0.5kV 2.5kV 1.5kV defect Case 5 (Sprocket detector) 1kV 0.6kV 2.8kV Re-active (learning correlation with FP s) Pro-active 23

24 Transient Rule of thumb targets 10kV 9kV 8kV 7kV 6kV Soft errors Catastrophic failure Either S/W or HW 5kV 4kV 3kV 2kV 1kV 24

25 Transient Rule of thumb HALT targets Hard failure (>4kV) A Hard failure can be either a H/W defect or a catastrophic S/W error. A catastrophic S/W error could involve restarting an application after a freeze-up. A H/W defect could involve a defect component. Soft error: (>2kV) A soft error usually involves a software failure but may not affect the system in any serious manner. E.g. a sub-system/system hiccup which is self recoverable. A certain amount of immunity is needed because too many hiccups may affect machine throughput. 25

26 Questions? 26