Islanding Detection and Control of Islanded Single and Two-Parallel Distributed Generation Units

Transcription

1 Islanding Detection and Control of Islanded Single and Two-Parallel Distributed Generation Units by Behrooz Bahrani A thesis submitted in conformity with the requirements for the degree of Master of Applied Science Department of Electrical and Computer Engineering University of Toronto c Copyright by Behrooz Bahrani 28

2 Islanding Detection and Control of Islanded Single and Two-Parallel Distributed Generation Units Behrooz Bahrani Master of Applied Science Graduate Department of Electrical and Computer Engineering University of Toronto 28 Abstract This thesis experimentally validates the performance of an active islanding detection method under various scenarios. The method actively injects a negative-sequence current through the interface voltage-sourced converter (VSC) of a distributed generation (DG) unit, as a disturbance signal for islanding detection. The estimated magnitude of the corresponding negative-sequence voltage at the PCC is used as the islanding detection signal. It is also analytically shown that the islanding detection method has a non-detection zone (NDZ), and a method to eliminate the NDZ is proposed. Moreover, the effectiveness of the modified method in eliminating the NDZ is verified based on simulation results in PSCAD/EMTDC software environment and experimental tests. Moreover, the performance of an autonomous mode controller for islanded DG units is experimentally evaluated. Based on a robustness analysis, it is shown that the controller which is basically designed for the nominal plant, can maintain the stability of the system despite of significant load uncertainties. Then adopting the islanding detection method and the proposed controller, the viability of uninterruptible operation of a single-dg system subsequent to an islanding event is experimentally validated. The feasibility of the islanding detection method for islanding detection in two-dg systems is also experimentally investigated. Moreover, based on the analyzed controller, a control strategy for autonomous operation of two-dg systems is proposed, and its performance is experimentally evaluated. Then, adopting the islanding detection method and the proposed control strategy, the viability of smooth transitions from grid-connected modes to autonomous (islanded) modes in two-parallel DG systems is experimentally validated. ii

3 Dedication study. To my family and Fateme, for their patience, unconditional love, and support during my iii

4 Acknowledgements I would like to express my deep and sincere gratitude to my supervisor, Prof. M. R. Iravani. His wide knowledge and logical way of thinking have been great assets for me. Without his invaluable guidance, support, patience, and financial support, this work would not be possible. The financial support of the University of Toronto is also gratefully acknowledged. Many thanks go in particular to Prof. A. Prodic. I am greatly indebted to him for his invaluable advice and guidance all throughout my study in the University of Toronto and especially, during the courses he taught me. I wish also to thank my entire committee: Prof. P. Lehn, Prof. A. Prodic, and Prof. Kschischang for their effort, discussions and constructive comments. It is a pleasure to pay tribute also to Dr. H. Karimi for his helpful collaboration in the experimental tests. Moreover, I am appreciative of my colleagues in the energy systems group as well as my friends in the University of Toronto, and especially, Dr. Maryam Saeedifard and Mr. Amir Parayandeh for their invaluable helps, supports, and advices. I cannot end without thanking my lovely family, on whose constant encouragement, support, and love, I have relied throughout my studies. iv

5 Table of Contents Introduction. Statement of the Problem and Thesis Objectives Literature Review Islanding Detection Methods Passive Resident Methods Active Resident Methods Communication-Based Methods Control Strategies for Autonomous Operation of Islanded Systems Thesis Outline Experimental Validation of an Islanding Detection Method Based on Current Injection 9 2. Introduction Islanding Detection Based on Negative-Sequence Currents Injection Test System Performance Evaluation Performance Under UL74 Test Conditions Sensitivity to the Level of Injected Negative-Sequence Currents Sensitivity to the Variation in Load Resistance Sensitivity to Variation in Load Inductance Effect of Grid Imbalance Effect of Load Imbalance Conclusions v

6 3 Non-Detection Zone Analysis of the Negative-Sequence Current Injection Method Introduction Formulation of the Non-Detection Zone Simulation Results Experimental Results Eliminating the NDZ Simulation Results Experimental Results Effect of SCR on the Enhanced Method Conclusions Assessment of an Autonomous Mode Controller for Islanded Single-DG Systems Introduction System Description Control Strategy Robust Stability Analysis Performance Evaluation Voltage Tracking Active Load Change of Load Parameters: Capacitance Change Change of Load Parameters: Resistance Change Nonlinear Load Motor Startup Uninterruptible Operation of a DG Unit During and Subsequent to Islanding Events Transition from a Grid-Connected mode to an Islanded Mode in a Matched Power Condition vi

7 4.6.2 Transition from a Grid-Connected mode to an Islanded Mode in a Mismatched Power Condition Conclusion Islanding Detection and Control of a Two-Parallel DG System Introduction Test System Control Strategy Islanding Detection in a Microgrid under UL74 Test Conditions Islanding Detection in a Two-Parallel DG System Islanding Detection in a Double-DG System Performance Evaluation of the SISO Controller in a Two-Parallel DG System Load Change Disturbance Rejection Transition form a Grid-connected mode to an Islanded mode in a Two-Parallel DG system Transition in a Matched Power Condition Transition in a Mismatched Power Condition Conclusions Conclusions Summary and Conclusions Islanding Detection Method Autonomous Mode Controllers for Single- and multi-dg Systems Contributions Future Work Appendices A SISO Controller 98 A. Introduction A.2 System Description vii

8 A.3 SISO System A.3. Mathematical Model of Islanded System A.3.2 Control Strategy B Robustness Analysis Tools 6 B. Introduction B.2 Definitions B.3 Theorems References viii

9 List of Tables 2. Parameters of the system of Figure Load Parameters The parameters of the system of Figure The parameters of the systems of Figure 5. and Figure A. Parameters of the system of Figure A ix

10 List of Figures 2. Block diagrams of (a) the positive-sequence currents controller and the corresponding subsystem (outlined), and (b) the positive-sequence voltages/currents resolver with embedded PLL [29] Block diagrams of (a) the negative-sequence currents controller and the corresponding subsystem (outlined), and (b) the negative-sequence voltages/currents resolver [29] Schematic diagram of the test system illustrating positive- and negativesequence current injection [3] Schematic diagram of the experimental setup Schematic diagram of the experimental setup based on the UL74 anti islanding test conditions Test system waveforms Under UL74 test conditions: (a) PCC voltages, (b) converter currents, and (c,d) estimated instantaneous positive- and negativesequence components of the PCC voltages Test system waveforms Under UL74 test conditions: (a,b) estimated magnitudes of positive- and negative-sequence PCC voltages and (c) estimated frequency The estimated magnitude of the negative-sequence component of the PCC voltages for three different levels of injected negative-sequence currents Test system waveforms corresponding to different levels of injected current (R=9.6% of rated value): (a) estimated frequency and (b,c) the estimated magnitudes of positive- and negative-sequence components of the PCC voltages 2 x

11 2. Test system waveforms corresponding to different levels of injected current (R=8.3% of rated value): (a) estimated frequency and (b,c) estimated magnitudes of positive- and negative-sequence components of the PCC voltages Test system waveforms when L is changed from its rated value to 2% of the rated value: (a,b) the estimated magnitudes of positive-, and negativesequence PCC voltages and (c) estimated frequency Test system waveforms under unbalanced grid conditions: (a,b) estimated magnitudes of positive- and negative-sequence components of PCC voltages and (c) estimated frequency at the PCC Test system waveforms under load (R) imbalance conditions: (a,b) the estimated magnitudes of positive- and negative-sequence components of PCC voltages and (c) estimated frequency Simulation results of the system in the NDZ: (a) instantaneous voltages at the PCC, (b) positive-sequence component of the PCC voltages, and (c) negativesequence component of the PCC voltages Simulation results of the system of Figure 2.4 for which the system is not within the NDZ: (a) instantaneous voltages at the PCC, (b) positive-sequence component of the PCC voltages, and (c) negative-sequence component of the PCC voltages Experimental results of the system of Figure 2.4 for which the system is in the NDZ: (a) instantaneous voltages at the PCC, (b) positive-sequence component of the PCC voltages, and (c) negative-sequence component of the PCC voltages The negative-sequence current reference signal and its controller Simulation results of the system that uses the enhanced current injection method: (a) instantaneous voltages at the PCC, (b) positive-sequence component of the PCC voltages, and (c) negative-sequence component of the PCC voltages Experimental results of the enhanced current injection method: (a) instantaneous voltages at the PCC, (b) positive-sequence component of the PCC voltages, and (c) negative-sequence component of the PCC voltages xi

12 3.7 The magnitude of the negative-sequence component of the PCC voltages for different values of grid short circuit ratio Schematic diagram of the test system Convex hulls related to the mapping theorem Dynamic response of the islanded system to two step voltage commands: (a) instantaneous voltages of the PCC, (b) converter (load) currents, and (c) control signal Dynamic response of the islanded system to two reference signal changes in the presence of an active load: (a) instantaneous voltages of the PCC, (b) DG unit currents, (c) active load currents, and (d) control signal Dynamic response of the islanded system to a load capacitance change: (a) instantaneous voltages of the PCC, (b) converter (load) currents, and (c) control signal Dynamic response of the islanded system to the load resistance change: (a) instantaneous voltages of the PCC, (b) converter (load) currents, and (c) control signal Dynamic response of the islanded system to the nonlinear load: (a) instantaneous voltages of the PCC, (b) converter (load) currents, and (c) control signal Dynamic response of the islanded system to the motor startup issue: (a) instantaneous voltages of the PCC, (b) motor currents (per unit values based on the motor current rating), and (c) control signal Dynamic response of the SISO-controlled system of Figure 4. to a preplanned islanding event: (a) instantaneous voltages of the PCC and (b) phase-a of the converter currents Dynamic response of the SISO-controlled system of Figure 4. to an accidental islanding event (a) instantaneous voltages of the PCC and (b) phase-a of the converter currents The schematic diagram of the experimental setup xii

13 5.2 The simulation results of the system of Figure 5. under UL74 test conditions during a preplanned islanding event: (a) the PCC instantaneous voltages, (b) the magnitude of the positive-sequence voltages at the PCC, and (c) the magnitude of the negative-sequence voltages at the PCC The simulation results of the system of Figure 5. under UL74 test conditions during a preplanned islanding event: (a) the first DG unit currents and (b) the second DG unit currents The experimental results of the system of Figure 5. under UL74 test conditions during a preplanned islanding event: (a) the PCC instantaneous voltages, (b) the magnitude of the positive-sequence voltages at the PCC, and (c) the magnitude of the negative-sequence voltages at the PCC The experimental results of the system of Figure 5. under UL74 test conditions during a preplanned islanding event: (a) the first DG unit currents and (b) the second DG unit currents The schematic diagram of a microgrid with two PCCs The simulation results of the islanded system of Figure 5.6 under UL74 test conditions during a preplanned islanding event: (a) the PCC instantaneous voltages, (b) the magnitude of the positive-sequence voltages at the PCC, and (c) the magnitude of the negative-sequence voltages at the PCC The simulation results of the islanded system of Figure 5.6 under UL74 test conditions during a preplanned islanding event: (a) the first DG unit currents and (b) the second DG unit currents The simulation results of the islanded system of Figure 5. during load resistance changes: (a) the PCC instantaneous voltages, (b) the magnitude of the positive-sequence voltages at the PCC, (c) the slave DG unit currents, and (d) the master DG unit currents The experimental results of the islanded system of Figure 5. during load resistance changes: (a) the PCC instantaneous voltages, (b) the magnitude of the positive-sequence voltages at the PCC, (c) the slave DG unit currents, and (d) the master DG unit currents xiii

14 5. The simulation results of the islanded system of Figure 5. during disturbances made by the salve DG unit: (a) the PCC instantaneous voltages, (b) the magnitude of the positive-sequence voltages at the PCC, (c) the slave DG unit currents, and (d) the master DG unit currents The experimental results of the islanded system of Figure 5. during disturbances made by the salve DG unit: (a) the PCC instantaneous voltages, (b) the magnitude of the positive-sequence voltages at the PCC, (c) the slave DG unit currents, and (d) the master DG unit currents The simulation results of the system of Figure 5. during a transition from a grid-connected mode to an islanded mode in a matched power condition: (a) the PCC instantaneous voltages, (b) the magnitude of the positive-sequence voltages at the PCC, and (c) the magnitude of the negative-sequence voltages at the PCC The simulation results of the system of Figure 5. during a transition from a grid-connected mode to an islanded mode in a matched power condition: (a) the slave DG unit currents and (b) the master DG unit currents The experimental results of the system of Figure 5. during a transition from a grid-connected mode to an islanded mode in a matched power condition: (a) the PCC instantaneous voltages, (b) the magnitude of the positive-sequence voltages at the PCC, and (c) the magnitude of the negative-sequence voltages at the PCC The experimental results of the system of Figure 5. during a transition from a grid-connected mode to an islanded mode in a matched power condition: (a) the slave DG unit currents and (b) the master DG unit currents The simulation results of the system of Figure 5. during a transition from a grid-connected mode to an islanded mode in a mismatched power condition: (a) PCC instantaneous voltages, (b) the magnitude of the positive-sequence voltages at the PCC, and (c) the magnitude of the negative-sequence voltages at the PCC xiv

15 5.8 The simulation results of the system of Figure 5. during a transition from a grid-connected mode to an islanded mode in a mismatched power condition: (a) the slave DG unit currents and (b) the master DG unit currents The experimental results of the system of Figure 5. during a transition from a grid-connected mode to an islanded mode in a mismatched power condition: (a) PCC instantaneous voltages, (b) the magnitude of the positive-sequence voltages at the PCC, and (c) the magnitude of the negative-sequence voltages at the PCC The experimental results of the system of Figure 5. during a transition from a grid-connected mode to an islanded mode in a mismatched power condition: (a) the slave DG unit currents and (b) the master DG unit currents A. Schematic diagram of a grid-interfaced DG unit and its controller [3].... A.2 Structure of SISO controller for the islanded system [3] B. Geometry associated with the Mapping Theorem [3] xv

16 List of Abbreviations DER: DG: dq: PCC: NDZ: UL: OFP/UFP: OVP/UVP: PJD: SFS: SVS: AFD: SMS: PLC: SCADA: UPS: SISO: MIMO: MISO: LTI: VSC: PLL: PWM: UTSP: SCR: FFT: KVL: Distributed Energy Resource Distributed Generation direct-quadrature Point of Common Coupling Non-Detection Zone Underwriters Laboratories, Inc. Over/Under Frequency Protection Over/Under Voltage Protection Phase Jump Detection Sandia Frequency Shift Sandia Voltage Shift Active Frequency Drift Slip Mode frequency Shift Power Line Carrier Supervisory Control And Data Acquisition Uninterruptible Power Supply Single-Input Single-Output Multiple-Input Multiple-Output Multiple-Input Single-Output Linear Time Invariant Voltage-Sourced Converter Phase-Locked Loop Pulse Width Modulated Unified Three-phase Signal Processor Short-Circuit-Ratio Fast Fourier Transform Kirchhoff Voltage Law xvi

17 List of Symbols e: error signal f sw : switching frequency f res : load resonant frequency i: AC current s: Laplace transform variable t: continuous time u: input signal v: voltage x: state variable y: output signal θ: phase angle ω o : center frequency xvii

18 Chapter Introduction. Statement of the Problem and Thesis Objectives In the context of distributed energy resource (DER) units, an island is formed when one or more DER units are disconnected from the rest of the power system and remain operational. This process is called an islanding phenomenon and can occur due to preplanned or accidental events. The accidental islanding events, which can take place due to faults, may result in a host of steady-state operational issues, control problems, and protection shortcomings including safety issues and inadequate grounding []. Therefore, the current utility practice and standards [,2] require that the islanding event be detected as fast as possible, and the island be de-energized upon detection of the islanding phenomenon. However, the trends in the utilization of DER units indicate that the islanded operation will be accepted in the future. If the islanded operation of a DER unit is permitted [3,4], the islanding event should be detected as fast as possible to allow smooth transition from a grid-connected mode to the islanded mode of operation. Thus, whether the autonomous operation is permitted or not, fast islanding detection is required. In grid-connected modes, the existing electronically-coupled distributed generation (DG) units adopt conventional dq current control schemes [5,6] to control power flow. Prior to an DER units are described as small-scale electric power generators located next to and connected to the load being fed either with or without the utility grid. The DER units are also referred to as distributed generation (DG) units.

19 islanding event, the frequency and the voltages at the point of common coupling (PCC) of a DG unit is mainly imposed by the grid. However, subsequent to the islanding event, lack of control over the voltages and the frequency, based on the dq current control strategy, can result in instability of the island. Therefore, subsequent to an islanding phenomenon and upon its detection, if the islanded mode of operation is permitted, the control strategy has to be changed or modified to retain control over the voltage and the frequency of the island. Therefore, two major challenges of the islanded mode of operation are (i) providing DG units with fast islanding detection capability and (ii) adopting controllers that are capable of controlling DG units in both grid-connected and islanded modes. An islanding detection method may have a non-detection zone (NDZ). The NDZ is mainly associated with a range of local loads, i.e., loads inside the potential island, for which the islanding detection method fails to detect islanding events [7]. All passive islanding detection methods suffer from NDZs [8]. However, active islanding methods, which are commonly based on intentional injection of a disturbance signal to the system, exhibit smaller NDZs. In order to fully eliminate any NDZ, islanding detection methods that are not resident in the inverter, i.e., communication-based islanding detection methods, are required. Any islanding detection method is usually evaluated by its NDZ and islanding detection time (run-on time 2 ). Therefore, a desirable islanding detection method must have a short run-on time and a small NDZ. Note that there are usually several small DG units operating in an island rather than a large one. Thus, to specify the NDZ of an islanding detection method, both single and multiple DG unit systems should be analyzed. A relatively fast and accurate islanding detection method for a single-dg unit, based on injection of a negative-sequence current component has been introduced in [3]. Reference [3] also introduces several control strategies for a DG unit subsequent to an islanding event. The NDZ of the proposed islanding detection method is neither identified nor discussed. The main objectives of this thesis are: To experimentally validate the performance of the islanding detection method of [3] for a single DG unit under various conditions, including: UL74 test conditions, 2 Run-on time is the time interval between the instant at which the islanding event occurs and the instant that the islanding event is detected. 2

20 various levels of injected negative-sequence current component, grid imbalance, and load imbalance. To analytically investigate and formulate the NDZ of the islanding detection method of [3]. To propose a method to prevent/minimize the NDZ of the proposed islanding detection method. To experimentally demonstrate that the NDZ can occur and verify that it can be prevented based on the proposed countermeasure. To analytically determine the robustness margin of an autonomous mode controller originally proposed in [3] and to experimentally evaluate its performance. To experimentally evaluate the impact of the proposed islanding detection method of [3] on the control and transients of a DG unit, subsequent to an islanding event. To evaluate this effect, transition from a grid-connected mode of operation to an islanded mode of operation, in both matched and mismatched power conditions are carried out by adopting the islanded mode controller proposed in [3]. To evaluate the performance of the islanding detection method in a two-parallel DG system, based on digital time-domain simulation and experimentation. To propose a control strategy for an islanded two-parallel DG system and to experimentally evaluate its performance. To evaluate the effect of the islanding detection method on the control and transients of a two-parallel DG system, based on digital time-domain simulation and experimentation. 3

21 .2 Literature Review.2. Islanding Detection Methods This section provides an overview of various islanding detection methods. There are three major categories for islanding detection methods: passive resident methods, active resident methods, and communication-based methods. Principles of operation, merits, and drawbacks of these islanding detection methods are detailed in [9]..2.. Passive Resident Methods Passive resident methods are based on the detection of abnormalities in electrical signals at the PCC of a DG unit. The three main passive methods, resident in the coupling-converter of a DG unit, are based on [9-]: over/under voltage and over/under frequency protection (OVP/UVP and OFP/UFP), phase jump detection (PJD) or power factor detection, detection of voltage harmonics. Subsequent to an islanding event, deviations in the magnitude and rates of the change of electrical signals at the PCC, e.g., voltages and frequency, can violate permitted thresholds and be exploited for islanding detection. However, in a matched power condition between the PCC and the grid, these deviations are not noticeable and do not violate the permitted thresholds within acceptable time intervals. In such cases, the islanding detection method is within its NDZ. The NDZ can be reduced by decreasing the thresholds values, however, this can result in nuisance/unwanted trips. Therefore, any passive resident method suffers from a considerable size NDZ Active Resident Methods An active resident method artificially creates abnormalities in the PCC signals that can be detected subsequent to an islanding event. The proposed/applied active resident islanding detection methods include: 4

22 Sandia Frequency Shift (SFS) and Sandia Voltage Shift (SVS) [2], frequency bias or active frequency drift (AFD) [3], slip mode frequency shift (SMS) or phase-locked loop slip [4], frequency jump or Zebra method [9], negative-sequence currents injection [3]. Due to the artificial creation of abnormalities in the PCC signals, an active resident method usually has a smaller NDZ compared to that of a passive method. The reason is that in a matched power condition between the PCC and the grid, the creation of abnormalities often result in a mismatched power condition. Therefore, the monitored electrical signals violate their thresholds and the islanding event can be detected. However, in a mismatched power condition, the injected signal by the interface converter may coincidentally create a matched-power condition. Therefore, an island can be formed while the islanding detection method fails to detect it. Although active methods provide more reliable islanding detection methods than passive methods, they can adversely affect the power quality of the system in the grid-connected mode. Under specific conditions, the injected signal for islanding detection may even result in instability of the system in a grid-connected mode [5]. In this thesis, an active method, based on negative-sequence currents injection [3], is used to detect islanding events. This method, which is detailed in Section 2.2, can be in its NDZ when the load parameters are not balanced. In such a case, the load imbalance can produce a small negative-sequence voltages component at the PCC. This negative-sequence voltages component can either add to or cancel out the negative-sequence voltages produced by the negative-sequence currents injection. When the two negative-sequence voltages components cancel out, the method is within its NDZ. To overcome this shortcoming, a modified approach for negative-sequence currents injection is proposed in this thesis. 5

23 .2..3 Communication-Based Methods Communication-based methods are based on transmission of data between a DG unit and the host utility system. The data is analyzed by the DG unit to determine if the operation of the DG should be halted. The three major methods of this classification are based on using: power line carrier (PLC) communications [6,7], signal produced by disconnect switches [9], supervisory control and data acquisition (SCADA) [9]. All communication-based methods are fast and practically have no NDZ. However, a PLC-based method fails to detect an islanding event if the system external to the DG replicates the carrier signal. The main drawbacks of these islanding detection methods are their high cost and complexity. The infrastructure required to transmit the data to all DG units in the potential island is relatively expensive. Moreover, the signal, which is supposed to be transmitted as an indication of islanding event can be polluted by other communication signals, e.g., automatic meter reading [9] schemes. Currently, the communication-based methods are not considered as economically viable islanding detection methods for relatively small-size DG units..2.2 Control Strategies for Autonomous Operation of Islanded Systems In this section, some of the existing control strategies for the autonomous operation of multiple DG units are briefly explained. Note that since prior to an islanding event, the voltages and the frequency of the PCC are mainly dictated by the grid, subsequent to an islanding event and due to the disconnection of the grid, the islanded mode control strategies should be capable of maintaining both voltages and frequency. The augmented dq-current control strategy, which is based on frequency/power and voltage/reactive-power droop characteristics, is usually adopted for multiple DG units in 6

24 an islanded system. This method is based on frequency/power and voltage/reactive-power droop characteristics of each DG unit and has been extensively investigated [4,8-22]. In this strategy, every DG unit is equipped with two droop characteristics: (i) voltage magnitude as a linear function of reactive power and (ii) frequency as a linear function of real power. Using the droop characteristics, the voltage profile is dominantly maintained by the reactive power flow of the DG units, and the frequency is regulated by the real power flow. Since this approach does not directly incorporate the load dynamics in the control loop, large and/or fast load changes may result in either poor dynamic response or even voltage/frequency instability. Another approach that is utilized to control DG units in an islanded mode of operation is reported in [23]. This method, which also regulates the magnitude of the PCC voltages and the frequency of the island, can fail if the load dynamics are fairly fast and/or dynamic reactive power sources, e.g., synchronous machine-based DG units and/or static compensators, exist in the island. In addition to the above control strategies, several robust control strategies have been reported for uninterruptible power supply (UPS) systems [24-28] that can be tailored for islanded systems including DG units. Reference [3] provide an overview of each method and the potential merits and limitations. Reference [3] also presents three control strategies for the autonomous operation of an islanded DG unit. One of them, i.e., the single-input single-output (SISO) controller, is widely utilized in this thesis to regulate the voltages and frequency of islanded systems under balanced conditions. The SISO controller utilizes an internal oscillator to regulate the frequency of the island and uses a feedback loop to control the magnitude of the PCC voltages. The second controller proposed in [3] is a MIMO controller, which also uses an internal oscillator to maintain the frequency. However, in the MIMO control strategy both d- and q-component of the voltage are maintained at their reference values. The third controller proposed in [3] is an abc-frame controller that is designed to control the islanded systems under unbalanced conditions. The abc-frame controller also adopts an internal oscillator to control the frequency in an open loop manner and utilizes sinusoidal references to regulate the voltages of the island in a closed loop manner. 7

25 .3 Thesis Outline This thesis consists of six chapters: Chapter 2 experimentally validates the performance of the islanding detection method of [3]. The islanding detection method is evaluated under UL74 test conditions. Moreover, several experiments are carried out to investigate the sensitivity of the method with respect to (i) the variations in the load resistance and inductance, (ii) the level of injected negative-sequence currents, and (iii) the grid and load imbalance. In Chapter 3, the non-detection zone (NDZ) of the islanding detection method of Chapter 2 is analytically determined, and it is shown that the method has a non-zero NDZ. The analytical results are validated based on simulation results in PSCAD/EMTDC software environment, and test results. Moreover, to eliminate the NDZ of the method, the negative-sequence current injection approach is modified. The new approach in also validated based on both simulation and experimental results. In Chapter 4, the robustness margin of the SISO controller of [3] is analytically determined, and moreover, its performance is experimentally evaluated. Then, adopting the islanding detection method of Chapter 2, the viability of transition phenomenon in a single-dg system from a grid connected mode to an islanded mode is experimentally validated. Chapter 5 investigates the performance of the islanding detection method of Chapter 2 in systems including two DG units and moreover, proposes a new control strategy for islanded multi-dg systems. It also shows that adopting the proposed control strategy, the islanding detection method can be adopted for a smooth transition from a grid-connected mode to an islanded mode of operation in two-parallel DG systems. The studies are conducted based on time-domain simulations in the PSCAD/EMTDC environment and validated based on test results. Chapter 6 presents the thesis conclusions. 8

26 Chapter 2 Experimental Validation of an Islanding Detection Method Based on Current Injection 2. Introduction In the context of Distributed Energy Resource (DER) units, an island is formed by the disconnection of one or more distributed generation (DG) units from the utility grid due to accidental or preplanned events, while they are still operational. Although existing standards [,2] prohibit the autonomous operation of DG units due to potential safety issues and inadequate grounding, the high depth of penetration of DG units and economical aspects indicate that the islanded mode of operation of DG units will be a viable operational mode [3]. The most significant challenges of the islanded mode of operation are providing DG units with (i) fast islanding detection methods and (ii) controllers that are capable of controlling DG units in both grid-connected and islanded mode of operations. For a smooth transition from a grid-connected mode to an islanded mode of operation of a DG unit, fast islanding detection is essential. The reason is that subsequent to the islanding event, based on the existing and prevalent dq current control strategies adopted in the grid-connected mode, there is no control over the frequency and the voltages of the Point of Common Coupling (PCC). In an accidental islanding event, the grid and the PCC 9

27 may be in a mismatched power condition, and therefore, subsequent to the islanding event, the voltages and the frequency of the island rapidly deviate from their rated values. Such deviations may violate permissible limits [2], and therefore, the island shuts down shortly after the islanding event. Moreover, such deviations may result in long transients and/or even instability of the island. Therefore, for a smooth transition to an autonomous mode of operation, the islanding event has to be rapidly detected, and upon its detection, a new control strategy has to be activated to regulate the voltages and the frequency of the island. This chapter presents the experimental validation of an active islanding detection method for a DG unit, which is coupled to a utility grid through a three-phase Voltage-Sourced Converter (VSC) [3]. The method is based on injecting a negative-sequence currents component through the VSC and detecting and quantifying the corresponding negative-sequence voltages at the PCC of the DG unit. The negative-sequence currents component is injected by a negative-sequence currents controller, which is adopted as a complementary part of the conventional VSC current control scheme [5,6]. To evaluate the performance of the islanding detection method, an experimental test system is adopted, which initially works in a grid-connected mode of operation and adopts the conventional dq current control scheme [5,6] to regulate power flow. Subsequent to an islanding event, which can be preplanned or accidental, the islanding detection method detects the event, while the system is still utilizing the dq current control strategy. Adopting the UL74 anti-islanding standard test, the performance of the method is experimentally validated and reported in this chapter. In addition, the impacts of grid voltage imbalance, load imbalance, and deviations in the UL74 test conditions are experimentally investigated. The experimental results show that based on the injection of a pre-specified amount of negative-sequence currents, islanding events can be detected within the maximum of 6 ms. This chapter is organized as follows. Section 2.2 briefly explains the principles of operation of the islanding detection method. The test system is described in Section 2.3. The performance of the method is experimentally evaluated and reported in Section 2.4, and Section 2.5 concludes the chapter.

28 2.2 Islanding Detection Based on Negative-Sequence Currents Injection This active islanding detection method is originally proposed and detailed in [3]. The method is based on the injection of negative-sequence, fundamental-frequency currents component through the interface VSC, and detecting and quantifying the corresponding negative-sequence voltages at the PCC of the DG unit. To inject the negative-sequence currents, the conventional positive-sequence currents controller of the VSC is augmented with a negative-sequence currents controller [29]. Figure 2. (a) shows a block diagram of the VSC d- and q-axis current controllers, the decoupling stage, and a model of the VSC system for positive-sequence voltages/currents components [5]. Figure 2. (b) shows the abc to dq transformation block and its related PLL, which provides the required transformation angle, i.e., θ. Figure 2.2 (a) is a negative-sequence version of Figure 2. (a) and shows the control strategy adopted for the negative-sequence currents injection. Figure 2.2 (b) shows the abc to dq transformation block for the negative-sequence voltages and currents. Note that in contrast to the positive-sequence control scheme, the transformation angle is θ, while θ is provided by the PLL of the positive-sequence currents controller. Figure 2.3 shows a simplified schematic representation of the test system. In the gridconnected mode, adopting the conventional and the complementary dq current control schemes, the VSC operates as a current source and injects both negative- and positivesequence currents. When switch S is closed, the voltages and frequency at the PCC are dominantly dictated by the grid. Therefore, balanced positive-sequence voltages form at the PCC, which contain no negative-sequence component. Setting a matched power condition between the PCC and the grid, the RLC load draws all of the positive-sequence currents injected by the VSC, and the injected negative-sequence currents are absorbed by the grid, as shown in Figure 2.3. Subsequent to an islanding event, due to the opening of switch S, the negative-sequence currents also flow into the load, and consequently, the PCC voltages become unbalanced. If the per-unit value of the negative-sequence voltages at the PCC is greater than a pre-specified level, e.g., three percent, the system is considered to be in the islanded mode.

29 + V sd + I dref + I d F n (s) F n (s) + Î d + e d K i (s) + u d + Vˆsd ωˆ L f + V sd + V td ω L f L f s + R f + I d + I q + I qref + V sq F n (s) F n (s) + Î q + e q K i (s) + u q ωˆ L f + Vˆsq + V tq ω L f + V sq L f s + R f + I q v sa v sb v sc i ta i tb i tc T (θˆ) θˆ ωˆ H(s) + V sd + V sq ˆ ω ω ˆ θ θ + T (θˆ) I d + I q Figure 2.. Block diagrams of (a) the positive-sequence currents controller and the corresponding subsystem (outlined), and (b) the positive-sequence voltages/currents resolver with embedded PLL [29] Note that if the matched power condition between the grid and the PCC is not satisfied, the islanding detection method is still applicable. The only difference is that in a mismatched power condition, prior to the islanding event, not only the negative-sequence currents are absorbed by the grid, but also either a portion of the injected positive-sequence currents flows into the grid or an amount of positive-sequence currents flows from the grid into the load. However, subsequent to the islanding event, the converter injected negative- and positive-sequence currents are absorbed by the load branch, and thus, the per-unit value of the negative-sequence voltages at the PCC, corresponding to the negative-sequence currents, is detected and quantified as the islanding detection signal. 2

30 V sd I dref I d F n (s) F n (s) Î d e d K i (s) u d Vˆsd ωˆ L f V td V sd ω L f L f s + R f I d I q I qref V sq F n (s) F n (s) Î q e q K i (s) u q ωˆ L f Vˆsq V tq ω L f V sq L f s + R f I q v sa v sb v sc T ( θˆ) V sd V sq θˆ i ta i tb i tc T ( θˆ) I d I q Figure 2.2. Block diagrams of (a) the negative-sequence currents controller and the corresponding subsystem (outlined), and (b) the negative-sequence voltages/currents resolver [29] Figure 2.3. Schematic diagram of the test system illustrating positive- and negative-sequence current injection [3] 2.3 Test System This section presents the experimental setup that is used to validate the performance of the negative-sequence currents injection method. To implement the control system, a Real 3

31 Figure 2.4. Schematic diagram of the experimental setup Time (RT)-Linux based controller, which provides a C programming environment, is used. Control and/or signal processing algorithms are first discretized and then developed into C codes. The RT-Linux system runs the C programming codes in real time. Figure 2.4 shows a single-line diagram of the experimental setup in which the DG unit includes a DC source (V dc ), a VSC unit, and a series filter. The VSC filter is represented by inductor L t for each phase. The load at the PCC is a parallel RLC. The study system parameters are given in Table 2.. In order to extract the magnitude of the positive- and negative-sequence voltages and the frequency of the PCC voltages, a unified three-phase signal processor (UTSP) [3] is utilized. The UTSP system, which is basically a three-phase enhanced PLL, is capable of decomposing a set of three-phase signals into its symmetrical components, even in a highly polluted environment. To implement the UTSP system, also the C programming environment of the RT-Linux system is used. Data acquisition is accomplished by a Yokogawa PZ4 Power Analyzer. This power analyzer is capable of capturing input waveforms with high-precision sampling (maximum 5 MS/s) while its measurement bandwidth covers a wide range from DC to 2 MHz. It is also equipped with Fast Fourier Transform (FFT) functions, harmonic analysis tools (up to 4

32 Table 2.. Parameters of the system of Figure 2.4 Quantity Value P.U. Comment L t 3 mh.2 pu Inductance of VSC filter VSC rated power 2.4 kw pu S base = 2.4 kva VSC terminal voltage (line-line) 5 V (rms) pu V base = 5 V f sw 3 khz PWM carrier frequency R 5.5 Ω pu Load nominal resistance L 7.8 mh.53 pu Load nominal inductance C 9 µf.87 pu Load nominal capacitance C Q = R L.87 Load quality factor f res = 2π LC 6 Hz Load resonant frequency f 6 Hz System nominal frequency V s (line-line) 5 V (rms) pu Grid nominal voltage V dc 23 V DC bus voltage 5 th order), and the capability of power calculations on fluctuating inputs. The acquired data are first stored on the PZ4 internal memory and then, transferred to a PC and plotted/displayed using MATLAB software. 2.4 Performance Evaluation In this section, UL74 standard test is adopted to test the proposed islanding detection method. In addition, several tests including sensitivity to (i) variations in load parameters, (ii) various levels of injected negative-sequence currents, (iii) grid imbalance, (iv) and load imbalance are carried out. Note that in these case studies, the VSC does not inject reactive power (unity power factor at the PCC), and the reference value for the q-component of the converter current is set at A. 5

33 Figure 2.5. Schematic diagram of the experimental setup based on the UL74 anti islanding test conditions 2.4. Performance Under UL74 Test Conditions In this experiment, the performance of the method is evaluated under the UL74 antiislanding test conditions [2]. Figure 2.5 presents the schematic diagram of the test system for islanding detection according to UL74 standard. The UL74 standard anti-islanding test requires that a three-phase VSC be connected to a utility grid, and a parallel RLC load be applied to each phase. The load circuit should have a quality factor Q = R.8 or less. Moreover, the inductance and the capacitance of the load should be selected such that their resonant frequency equals the fundamental frequency of the system, i.e., 2π LC C of L = 6 ±. Hz. Satisfying this condition, the overall load circuit has a unity power factor and appears to be purely resistive. Moreover, the test circuit real power dissipation should be equal to the rated power output of the VSC [2]. The load and system parameters for the experimental setup are given in Table 2.. Prior to the islanding event, the VSC is injecting %5 of the rated load current as the negativesequence currents for islanding detection. Moreover, the positive-sequence currents are set such that the grid currents are zero, i.e., there is a matched power condition between the 6

34 grid and the PCC. Thus, the positive-sequence currents of the VSC are almost equal to their rated values. The islanding event is imposed by opening switch S at instant t = 57 ms. Since there is a matched power condition between the grid and the PCC, subsequent to the islanding event, the PCC voltages and the converter currents do not change significantly and therefore, cannot be used for islanding detection. Figures 2.6 (a) and (b) show the instantaneous PCC voltages and the converter currents, respectively. Mainly due to the injection of the negative-sequence currents, the PCC voltages (subsequent to the islanding event) and the converter currents (prior and subsequent to the islanding event) are not balanced. Figures 2.6 (c) and (d) show the estimated instantaneous waveforms of the positiveand negative-sequence voltages at the PCC, respectively. The positive-sequence voltages have no significant change due to the islanding event. However, subsequent to the islanding event, the negative-sequence voltages component appears at the load terminals and reaches the steady state level in about three cycles and can be used to reliably identify the islanding event. It should be noted that the UL74 anti-islanding test asks for run-on times of two seconds and less while the proposed method can identify islanding events within 6 ms if the load parameters are not in the non-detection zone. The estimated magnitudes of the positive- and negative-sequence components of the PCC voltages, and the estimated frequency are shown in Figure 2.7 (a), (b), and (c), respectively. Figure 2.7 shows that the estimated frequency and the magnitude of the positive-sequence component of the PCC voltages are within the acceptable limits [2] prior to and after the islanding event and therefore, cannot be used for islanding detection. However, the magnitude of the negative-sequence voltages provides a reliable islanding detection signal Sensitivity to the Level of Injected Negative-Sequence Currents In this section, the performance of the islanding detection method with respect to the level of negative-sequence currents injection is evaluated. Three values for the injected negativesequence currents, i.e.,.5%, 3%, and 5% of the rated current, are considered. The system 7