Energy System Protection for Grid Resilience. Xianyong Feng, PhD, PE Center for Electromechanics The University of Texas at Austin October 31, 2017

Transcription

1 Energy System Protection for Grid Resilience Xianyong Feng, PhD, PE Center for Electromechanics The University of Texas at Austin October 31, 1

2 Presentation Outline Overview Mission Critical Energy Systems Energy System Fault Mgmt. CEM Approach Ctrl. & Prot. Energy System Protection (3 cases) Conclusion 2

3 Overview Resilience is different from reliability A resilient system 1. Acknowledges that power outages can occur 2. Be prepared and minimizes their impact 3. Quickly restores service 4. Draws lessons from experience to improve robustness * page 3 * Flynn, S.E America the resilient: Defying terrorism and mitigating natural disasters. Foreign Affairs 87: 2 8.

4 Mission Critical Energy System All-electric ship DC datacenter Wind collection system PV farm Electric aircraft Oil & gas platform page 4

5 Energy System Fault Management Detection Real-time monitoring Detect electrical abnormal Fault type identification (permanent or temporary) PREPARE Location Isolation Quickly and accurately locate fault Minimize system impact Open protective device Minimize load interruption AMELIORATE Restoration Restart interrupted power equipments Restore interrupted loads to normal QUICK RECOVERY page 5

6 CEM Approach - Control & Protection Simulation Test: New control and protection strategies are initially implemented in modeling software and verified in numerical simulation. The tools include but not limited to: 1. Matlab / Simulink 2. PSCAD 3. ETAP 4. OpenDSS Simulated control block 1 Simulated control block N Numerical simulation environment Control signal Measured signal Simulated circuit The control or protection strategies are implemented as software blocks in simulation tools; the control system performance can be evaluated and controller parameters can be optimally selected in off-line simulations. i Power Hardware-in-the-Loop (PHIL) Simulation Test: Design the interface between HIL simulator and real power systems such as hardware microgrid system at CEM. Power amplifiers (power converters and emulators) are the interfaces between real-time simulator and real power system. Key features: 1. Complicated network model is implemented in HIL simulator 2. Power electronics converters and active sources serve as the interface between software simulator and the real system 3. NI FPGA simulator enables the fast response of PE devices Real Hardware Microgrid System MV bus HIL simulator Controlled voltage source ~ Voltage signal Hardware Interface Current measurement I/Os Simulated network Power Amplifier Current signal Active Source iii Control Hardware-in-the-Loop (CHIL) Simulation Test: New control and protection strategies are implemented in hardware controllers. The controller is validated and tested in the HIL simulation environment to de-risk field test and demonstration. Main procedures include: 1. Model the circuit 2. Implement control strategy in hardware 3. Configure the communication interface between real-time simulator and hardware controllers 4. Perform real-time HIL tests Distributed control Advanced protection strategies Simulated switching devices in NI PXI simulator PXIe Real-Time/FPGA HIL System Sensors High speed communication link Control and Protection Hardware Control Center Simulated Distribution Network in Opal-RT Opal-RT Simulator I/O or other comm. Interfaces NI controllers Tertiary Controls SCADA System IED Real Hardware Test and Field Demonstration: The control and protection strategies are ultimately implemented in the control platform of real hardware power system for final testing and validation. Main benefits include: 1. Obtain validated engineering data 2. Demonstrate the control system performance in the real operation environment MW-scale Microgrid page 6 ii iv

7 LVDC Distribution System Protection DC fault current DC Protection Challenges No zero-crossing in fault current Lower line impedance in tightly coupled system High di/dt Power electrics device can not tolerate high fault current Extremely fast capacitor discharge AC fault current DC distribution system example DC Power Supply Fault 1 Fault 2 ~ = = = L Fault 3 L L L page 7

8 LVDC Distribution System Protection Inductance-based dc fault location* Estimate fault inductance with local measured v(t) and i(t) Use estimated L to locate fault Equivalent inductance L 1 Line inductance distribution L 2 L 3 Distance + - v Equivalent fault circuit i R *X. Feng, L. Qi, and J. Pan, A novel fault location method for dc distribution protection, IEEE Trans. Industrial Applications, vol. 53, no. 3, May-June,. L RF DC UPS 380 VDC ~ = = = level 1 level 2 level 3 Fault 1 Fault 2 Zone 1 (20 m) Zone 2 (65 m) Zone 3 (10.2 m) L L L L L L Fault 3 page 8 Zone 4 (1.5 m)

9 LVDC Distribution System Protection Protection Scheme Implementation Online moving-window least square method Algorithm on embedded controller Fault detection v i di/dt and location routine ADC ADC ADC v (1) i (1) di/dt (1) PRUs read data sequentially and store them in memory 7 analog inputs with A/D converters k = k + 1 Yes di ( k M 1) dt di A ( k M 2) dt di ( k) dt Start Fault detected? Yes k = 0 Read in measurements v(k), i(k), and di/dt(k) if k < M No No i( k M 1) v ( k M 1) i( k M 2) v ( k M 2 ) B i( k) v ( k ) Go to next time interval Yes di (0) dt di A (1) dt di ( k) dt i(0) v(0) i(1) v(1) B i( k) v( k ) Request new data once finishing the previous cycle N Main program executes the fault detection and location routine Locate fault? Y Send tripping PRUs 65 digital I/Os Processor (AM3358) if t < T max No No L R R F T 1 T A A A B if 0 < L < L th Yes Send tripping signal End page 9

10 Inductance (H) Inductance (H) LVDC Distribution System Protection Numerical Simulation Fault 1 15 m from breaker 1 Fault R: 2 mω Fault 2 50 m from breaker 2 Fault R: 2 mω 10 x x ms Zone 2 Zone 1 Estimated inductance Threshold time (sec) DC UPS 380 VDC ~ = = = Fault 1 Fault 2 Zone 1 (20 m) 0.77 mf mω mω 4.5 mω µh µh 13.8 µh Zone 2 (65 m) 1.35 mω 4.15 µh Zone 3 (10.2 m) L L L L L L Fault 3 Zone 4 (1.5 m) ms Zone 3 Zone time (sec) 10

11 LVDC Distribution System Protection User interface Control-HIL Test Opal-RT simulator Ethernet Opal-RT simulator Simulated DC network Simulated a 380 V dc system Convert v(t)/i(t) to analog Read in breaker status through D in Embedded controller Read in v(t)/i(t) signals Execute prot. algorithm Send a trip signal for internal fault Analog outputs: current/voltage signal Microcontroller A/D converters Breaker status wired back to Opal-RT simulator Fault detection and location algorithm Trip command 24 V 47uF Breaker page 11

12 LVDC Distribution System Protection Control-HIL Test Results Estimated error < 8.4% Fault location time < 0.7 ms current signal tripping signal ID Actual L (µh) / fault R (mω) Estimated L (µh) Error (%) Fault location time (ms) 1 18 / ~ / ~ / ~ / ~ / ~ / ~ / ~ / ~ / ~0.55 current signal voltage signal page 12

13 Estimated L (H) Estimated L (H) Estimated L (H) LVDC Distribution System Protection Sensitivity Analysis* Voltage error: 0.025% % * V rated (380 V) Current error: 0.005% - 1.5% * I max (2000 A) Improve accuracy using digital filter x Original method (L) Improved method (L) 3.2 Level 6 Lower lower Boundary boundary Inductance (H) 2.5 x x Voltage sensitivity Voltage error: 0.025% Voltage error: 0.125% Voltage error: 0.25% Voltage error: 0.5% Voltage error: 1.25% Base Scenario 1 Scenario 2 Scenario 3 Scenario time (sec) Current sensitivity Inductance (H) time (sec) *X. Feng, L. Qi, and J. Pan, Fault inductance based protection for DC distribution systems, Proc. of the 13th International Conference on Developments in Power System Protection, Edinburgh, Scotland, March Inductance (H) Current error: 0.005% Current error: 0.01% Current error: 0.025% Current error: 0.05% Current error: 0.25% Current error: 0.5% Current error: 1% Current error: 1.5% Base case Scenario 1 Scenario 2 Scenario 3 Scenario 4 Scenario 5 Scenario 6 Scenario 7 Level 4 boundary time (sec) page 13

14 Voltage Current LVDC Distribution System Protection Hardware Test Low voltage circuit 7.07 mf capacitor is charged to 12 V Inductors are used to emulate lines Short-circuit fault is created by closing a breaker Embedded controller Read in v(t), i(t), di/dt Execute prot. algorithm Send a trip signal for internal fault + 12 V DC - Switch Capacitor (7.07 mf) Inductor (6 µh) SLD diagram Current sensor Analog circuit of di/dt calculation Real circuit Line (6-12 µh) BeagleBone Black board with Tripping fault detection & signal location Emax page 14

15 Time (ms) Time (ms) LVDC Distribution System Protection Hardware Test Results L estimation error < 20% Detection/location time < 0.7 ms L = 18 µh and R = 20 mω L = 30 µh and R = 2 mω ID Actual L (µh) / fault R (mω) Estimated L (µh) Error (%) Fault location time (ms) 1 18 / / / / / / / / / Error (%) Error (%) page 15

16 LVDC Distribution System Protection Improvement Level 1 Level 2 Level 3 No boundary inductor Equivalent inductance distribution Zonal boundary inductors Equivalent inductance ΔL 1 ΔL 2 ΔL 3 Level 4 L 4 Equivalent inductance L 2 L 3 Inserted ΔL 3 L 3 L 1 Distance L 2 Inserted ΔL 2 level 1 level 2 level 3 L 1 Inserted ΔL 1 level 1 level 2 level 3 level 4 Distance DC UPS 380 VDC ~ = = = Fault 1 Fault 2 Zone 1 (20 m) Zone 2 (65 m) Zone 3 (10.2 m) L L L L L L Fault 3 Zone 4 (1.5 m) page 16

17 LVDC Distribution System Protection Summary The prot. method uses local measurements only to locate fault 1. Detection and location time < 0.7 ms 2. L estimation error in HIL test < 8.4% 3. L estimation error in hardware test < 20% The prot. method can accurately locate short-circuit faults if: 1. Voltage measurement error < 0.5% 2. Current measurement error < 1% Boundary inductors improve prot. selectivity Next Step More test on real MW-level dc microgrid page 17

18 MVDC Shipboard Power System Protection MVDC Prot. Challenges Multiple sources Distributed capacitors Mesh network Low line impedance Fast fault isolation Convert FCL Pulse load (high di/dt) 1.1 kv 2 MW 200 Hz M PMM PROPULSON LOAD PGM 850 V 0.8 MW 60 Hz 3-ph 850 V 1.2 MW 60 Hz 3-ph PCM PGM PFN Railgun MISSION LOAD 1.15 kvdc/ 1.0 kvdc = = 60 Hz Loads IPNC 1.15 kvdc PCM1-A = = 60 Hz AC Distribution 400 Hz Loads 60 Hz Loads 1.15 kvdc 60 Hz Loads 60 Hz AC Distribution IPNC = = = = 1.15 kvdc/ 1.0 kvdc PCM1-A 400 Hz Loads page 18

19 MVDC Shipboard Power System Protection Two power generation modules FCL in dc-dc converters One propulsion load One pulse load High di/dt Two dc circuit breakers Isolate fault on main dc bus Protection strategy* FCL + differential protection PMM M 1.1 kv 2 MW 200 Hz 3 NC PROPULSON LOAD Toshiba 1 & 4 NC = Normally closed CL = Current Limit 1 = Capacitor 2 = Mechanical Circuit Breakers 3 = Contactors 4 = Line Reactor kv main dc bus 2 2 NC NC 850 V, 0.8 MW 60 Hz, 3-phase Lab Power CL = = PGM CL = = 1 & 4 NC NC PGM 850 V, 1.2 MW 60 Hz, 3-phase Lab Power NC NC Equivalent DC zonal Load PCM MISSION LOAD PFN Railgun *S. Strank, X. Feng, A. Gattozzi, D. Wardell, S. Pish, J. Herbst, and R. Hebner, Experimental test bed to de-risk the navy advanced development model, Proc. of Electric Ship Technology Symposium, Arlington, VA, Aug., pp page 19

20 Voltage (V) Current (A) MVDC Shipboard Power System Protection Main results Fault: ms, 20 mω, on dc bus Prot. strategy: FCL + diff. prot PGM V 60 Hz 3-Ph ac Current differential: i 1 (t) + i 2 (t) = = Reactor 1 CB mh 0.39 mh 5 mf 0.5 mf Load MW Diff. prot. zone i 1 (t) 80 µh 9 mω time (ms) PGM V 60 Hz 3-Ph ac = = 5 mf Reactor mh 0.39 mh 0.5 mf 1 MW Load 2 CB2 i 2 (t) 80 µh 9 mω Main dc bus 1150 V dc time (ms) page 20

21 Current (A) Current (A) MVDC Shipboard Power System Protection Sensitivity analysis Current diff. with different fault R Current diff. with measurement time differences Internal fault Current differential: i 1 (t) + i 2 (t) Fault R = 1 mohm Fault R = 10 mohm Fault R = 20 mohm Fault R = 50 mohm Fault R = 200 mohm time (ms) Next step work Test the prot. strategy on a MWlevel MVDC test bed External fault delta t = 2 us delta t = 5 us delta t = 10 us delta t = 20 us delta t = 50 us time (ms) page 21

22 Current (p.u.) (p.u.) Current (p.u.) (p.u.) AC Distribution System Fault Location Fault type identification Permanent or temporary Impedance-based Fault Location Use impedance model and fault waveform Currents for a permanent fault Currents for a permanent fault Time (Seconds) Time (Seconds) Currents for a transient fault Currents for a transient fault Time (Seconds) Time (Seconds) page 22

23 AC Distribution System Fault Location Traveling Wave Method Requirement GPS synchronization High sampling rate sensors Fast processing speed Benefit Incipient fault location (sub-cycle fault) Simple algorithm Extra-fast fault location Proposed intelligent sensors GPS signals Traveling wave s 2 s 1 s 3 fault Intelligent sensor page 23

24 Conclusion 1. Reliable and fast prot. strategy improves grid reliability and resilience 2. DC prot. is enabling tech. for large-scale deployment of dc systems 3. Extra-fast fault location and restoration are keys for grid resilience 4. Control/power-HIL tests effectively evaluate new prot. technology page 24

25 Thanks Contact information: Xianyong Feng Center for Electromechanics The University of Texas at Austin Phone: page 25