300mA Low Noise High PSRR Dual Output LDO with Shutdown

Transcription

1 300mA Low Noise High PSRR Dual Output LDO with Shutdown Description The is a dual output, low dropout, high PSRR, low quiescent current linear regulators. The can supply 200mA output current with a lower dropout voltage about 300mV for each channel. The is suitable for portable and wireless application such as mobile phone and portable handsets. The is designed and optimized to work with low-value, low cost ceramic capacitors. The consumes less than 0.1uA during shutdown mode which is independent for each channel, allowing for flexibility in power management. Besides its current limit protection and on chip thermal shutdown features provide protection against any combination of overload or ambient temperature that could exceed junction temperature. The doesn t need external bypass capacitor and still could get better noise performance. The tiny SOT-23-6, TSOT-23-6, VSON-6, and TDFN-6 packages are attractive for hand-held applications. Pin Assignment S6 Package (SOT-23-6) Features Low Dropout Voltage:300mV at I OUT = 200mA Low 30μVrms Output Noise Guaranteed 300mA Output Current Per Channel Very Low Quiescent Current:25uA High Power Supply Rejection Ratio:70dB at 10kHz Highly Accurate:± 2% Needs Only 1µF Ceramic Capacitor for Stability Thermal Shutdown and Current Limiting Protection Tiny SOT-23-6, TSOT-23-6, VSON-6 and TDFN-6 Packages Applications Mobile Phones Portable or Wireless Instruments Cameras PDA and Notebook Computers Ordering Information - TR: Tape / Reel G: Green S9 Package (TSOT-23-6) Package Type S6: SOT-23-6 S9: TSOT-23-6 VS: VSON-6 WD: TDFN-6(1.6x1.6mm) Output Voltage VS Package (VSON- 6) WD Package (TDFN- 6) (1.6x1.6mm) VOUT1 VOUT2 VOUT1 VOUT2 A 3.3V 2.8V L 1.8V 2.6V B 3.3V 2.5V M 1.8V 3.0V C 2.8V 1.8V N 2.8V 3.3V D 2.5V 1.8V O 1.8V 1.8V E 3.0V 1.8V P 2.85V 2.85V F 1.8V 2.8V Q 1.5V 3.0V G 2.8V 2.8V R 1.5V 3.3V H 1.5V 2.8V S 1.2V 3.3V I 1.8V 3.3V T 3.0V 2.85V J 1.3V 2.8V V 3.3V 3.3V K 1.2V 2.8V Figure 1. Pin Assignment of -1.4-SEP

2 SOT-23-6 Marking -AS6G S2= -LS6G ad= -BS6G S3= -MS6G S8= -CS6G a0= -NS6G ac= -DS6G S4= -OS6G S9= -ES6G S5= -PS6G K6= -FS6G d0= -QS6G K7= -GS6G S6= -RS6G K8= -HS6G h0= -SS6G B6= -IS6G S7= -TS6G K9= -JS6G i0= -VS6G e7= -KS6G k0= VSON- 6 Marking -AVSG P7= -LVSG 0s= -BVSG P8= -MVSG d3= -CVSG 0i= -NVSG 0t= -DVSG P9= -OVSG d9= -EVSG r1= -PVSG e2= -FVSG 0k= -QVSG e3= -GVSG r2= -RVSG e4= -HVSG 0m= -SVSG B7= -IVSG r3= -TVSG e5= -JVSG 0n= -VVSG e6= -kvsg 0r= TSOT-23-6 Marking -AS9G P0= -LS9G az= -BS9G P1= -MS9G W3= -CS9G aw= -NS9G ay= -DS9G P2= -OS9G W4= -ES9G P3= -PS9G W5= -FS9G ax= -QS9G W6= -GS9G W1= -RS9G W7= -HS9G az= -SS9G B5= -IS9G W2= -TS9G W8= -JS9G aa= -VS9G W9= -KS9G ab= TDFN-6 (1.6x1.6mm) Marking -AWDG A. -LWDG 7 -BWDG B. -MWDG G. -CWDG t -NWDG 8 -DWDG C. -OWDG H. -EWDG D. -PWDG J. -FWDG 1 -QWDG K. -GWDG E. -RWDG L. -HWDG 3 -SWDG 9 -IWDG F. -TWDG M. -JWDG 4 -VWDG N. -KWDG SEP

3 Typical Application Circuit EN1 VOUT1 1 1uF VIN GND 1 1uF EN2 VOUT uF Figure 2. Typical Application Circuit of Note:To prevent oscillation, it is recommended to use minimum 1µF X7R or X5R dielectric capacitors if ceramics are used as input/output capacitors. Functional Pin Description Pin Name VIN VOUT1 VOUT2 GND EN 1 EN 2 Pin Function Power is supplied to this device from this pin which requires an input filter capacitor. In general, the input capacitor in the range of 1µF to 10µF is sufficient. The output supplies power to loads. The output capacitor is required to prevent output voltage unstable. The is stable with an output capacitor 1µF or greater. The larger output capacitor will be required for application with large transit load to limit peak voltage transits, besides could reduce output noise, improve stability and PSRR. The output supplies power to loads. The output capacitor is required to prevent output voltage unstable. The is stable with an output capacitor 1µF or greater. The larger output capacitor will be required for application with large transit load to limit peak voltage transits, besides could reduce output noise, improve stability and PSRR. Common ground pin Logic input control VOUT1 active or shut off. The enable pin can t be left floating and must be tied to the Vin pin if not used. The shutdown mode which is independent for each channel, allowing for flexibility in power management. Logic input control VOUT2 active or shut off. The enable pin can t be left floating and must be tied to the Vin pin if not used. The shutdown mode which is independent for each channel, allowing for flexibility in power management SEP

4 Absolute Maximum Ratings Supply Input Voltage (VIN) V Other Pin Voltage (EN1, EN2, VOUT1, VOUT2) V Power Dissipation (P D T A =25 : SOT-23-6, TSOT W VSON W TDFN-6 (1.6mX1.6m)(P D ) W Package Thermal Resistance (θ JA ): SOT-23-6, TSOT /W VSON /W TDFN-6(1.6mX1.6m) /W Maximum Junction Temperature (T J ) Storage Temperature Range (T S ) to + 1 Lead Temperature (Soldering, 10 sec.) (T LEAD ) Note1:Stresses beyond those listed under Absolute Maximum Ratings" may cause permanent damage to the device. Recommended Operating Conditions Input Voltage ( ) V to + 5.5V Operating Temperature Range (T OPR ) to + 85 Block Diagram Figure 3. Block Diagram of -1.4-SEP

5 Electrical Characteristics ( = +1V, V EN1 = V EN2 =, =1µF, =1µF, T A =25 ºC, unless otherwise specified) Parameter Symbol Conditions Min Typ Max Unit Output Voltage Accuracy I OUT = 1mA % Current Limit I LIMIT R Load =1Ω 300 ma Quiescent Current I Q I OUT = 0mA 25 µa =1.5V =1.8V I OUT =1mA =2.5V =3.0V Dropout Voltage (Note2) V DROP =3.3V =1.5V mv =1.8V I OUT =300mA =2.5V =3.0V =3.3V Line Regulation I OUT =1mA, = +1V to 5V % / V x Load Regulation (Note3) Δ I OUT =1mA to 200mA mv Ripple Rejection (Note4) PSRR = +1V f RIPPLE = 10kHz 70 db Output Noise Voltage (Note4) V NO =1μF, I OUT =0mA 30 μv RMS Standby Current I STBY V EN1 = V EN2 =GND, Shutdown 1 µa EN Input Bias Current I IB V EN1 = V EN2 = or GND 100 na EN High Threshold V IH Start-up 1.0 V EN Low Threshold V IL Shutdown 0.4 V Temperature Coefficient (Note4) T C I OUT = 1mA, = 5V 100 ppm/ ºC Thermal Shutdown Temperature (Note4) T SD 160 ºC ΔT SD Hysteresis 25 ºC Note2:The dropout voltage is defined as -, which is measured when drops 2% of its normal value with the specified output current. Note3:Load regulation and dropout voltage are measured at a constant junction temperature by using a 40ms low duty cycle current pulse. Note4:Guarantee by design SEP

6 Typical Performance Curves =3V 4V I OUT =0 100mA Figure 4. Load Transition Response ( =2.8V, =1.8V) Figure 5. Line Transition Response ( =1.8V, I OUT =10mA) V EN1 = V EN2 V EN1 =V EN Figure 6. Enable Test ( =4V, 1 =3.3V, 2 =2.8V, I OUT =30mA) Figure 7. Shutdown Test ( =4V, 1 =3.3V, 2 =2.8V, I OUT =30mA) 1 =2.8V 1 =2.8V 2 =1.2V 2 =1.2V I OUT1 =100mA I OUT2 =100mA Figure 8. Dual Channel Crosstalk Test Figure 9. Dual Channel Crosstalk Test -1.4-SEP

7 Typical Performance Curves (Continued) 45 =2.8V 45 =1.8V Quiescent Current (ua) Quiescent Current (ua) Input Voltage (V) Figure 10. Quiescent Current vs. Input Voltage Input Voltage (V) Figure 11. Quiescent Current vs. Input Voltage =4V =2.5V = =4V =1.8V = Current Limit (ma) Current Limit (ma) Figure 12. Current Limit vs. Temperature Figure 13. Current Limit vs. Temperature =2.8V =1.8V =3.5V =2.5V Output Voltage (V) Output Voltage (V) Figure 14. Output Voltage vs. Temperature Figure 15. Output Voltage vs. Temperature -1.4-SEP

8 Typical Performance Curves (Continued) Quiescent Current (ua) =2.8V Quiescent Current (ua) =3.5V =2.5V Dropout Voltage(mV) Figure 16. Quiescent Current vs. Temperature ( =2.8V, =1.8V) =3.3V Tj=25 0 C Tj=85 0 C Tj=-40 0 C Loading Current(mA) Dropout Voltage(mV) Figure 17. Quiescent Current vs. Temperature ( =3.5V, =2.5V) =2.8V Tj=25 0 C Tj=85 0 C Tj=-40 0 C Loading Current(mA) Power Supply Rejection Ratio(dB) Figure 18. =3.3V Dropout vs. Temperature =3.3V, =1.8V =None,, No Load Frequency(Hz) Figure 20. Power Supply Rejection Ratio vs. Frequency Power Supply Rejection Ratio(dB) -100 Figure 19. =2.8V Dropout vs. Temperature ( =3.3V, =1.8V, I OUT =100mA, ) ( =3.3V, =1.8V, I OUT =1mA, ) ( =3.3V, =1.8V, I OUT =200mA, ) =None Frequency(Hz) Figure 21. Power Supply Rejection Ratio vs. Frequency -1.4-SEP

9 Application Information The include 2 independent output channels. Current limit and on chip thermal shutdown features provide protection against any combination of overload or ambient temperature that could exceed maximum junction temperature. EN Control Force EN pin high to enable the and turned off the device by pulling it low. The EN pin can t be floated and must be tied to the Vin if not used. The enable control is independent to each channel. PSRR (Power Supply Rejection Ratio) The has high 70dB PSRR. Ripple rejection is the ability of the regulator to reduce input voltage ripple. It is specified with a 10kHz and 1V P-P signal applying to input, with 1uF output capacitor. Ripple rejection, expressed in db, is the ratio of output ripple to input ripple. Thermal Shutdown Thermal shutdown is employed to protect the device damage from the junction temperature exceed safe margins due mainly to short circuit or current limit. Moreover, the device returns normally operation when the junction temperature down to a constant temperature. Though temperature protection circuit is built in to protect IC, the maximum power dissipation design within Tj(max) is needed. The thermal protection is independent to each channel. Thermal Consideration The power handling capability of the device will be limited by maximum 125 C operation junction temperature. The power dissipated by the device will be estimated by P D = I OUT ( - ) The power dissipation should be lower than the maximum power dissipation listed in Absolute Maximum Ratings section. Capacitor Selection The ceramic capacitor is ideal for application. The ESR of the output capacitor affects stability. Larger value of the output capacitor decreases the peak deviations and improves transient response for larger current changes. The capacitor types (ceramic, aluminum, and tantalum) have different characterizations such as voltage and temperature coefficients. All ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior across temperature and applications. Common dielectrics used are X5R, X7R and Y5V. It is recommended to use 1uF to 10uF X5R or X7R dielectric ceramic capacitors because X5R or X7R hold their capacitance over wide voltage and temperature ranges than other Y5V or Z5U types. The ESR of output capacitor is very important because it generates a zero to provide phase lead for loop stability. The input capacitor can reduced peak current and noise at power source SEP

10 Outline Information SOT-23-6 Package (Unit: mm) SYMBOLS DIMENSION IN MILLIMETER UNIT MIN MAX A A A B D E E e e L Note:Followed From JEDEC MO-178-C. TSOT-23-6 Package (Unit: mm) SYMBOLS DIMENSION IN MILLIMETER UNIT MIN MAX A A A B D E E e e L Note:Followed From JEDEC MO-193-C SEP

11 Outline Information (Continued) VSON- 6 Package (Unit: mm) SYMBOLS DIMENSION IN MILLIMETER UNIT MIN MAX A A C b D D E E e L Note: Followed From JEDEC MO-287-A. TDFN mmX1.6mm Package (Unit: mm) SYMBOLS DIMENSION IN MILLIMETER UNIT MIN MAX A A A D E a b e D E Note :Followed From JEDEC MO-229-C Life Support Policy Fitipower s products are not authorized for use as critical components in life support devices or other medical systems SEP