Five-level NPC-VSI Capacitor Voltage Balancing Using a Novel Clamping Bridge

Transcription

1 Asan Power Eletrons Journal, ol.5 No., Aug 0 Fve-level NP-SI apator oltage Balanng sng a Novel lampng Brdge R. HIBANI E.M. BERKOK M.S. BOHERIT Astrat- A serous onstrant n multlevel nverters s the apator voltage-alanng prolem. The unalane of the dfferent D voltage soures of the fve-level Neutral Pont lampng oltage Soure Inverter (NP-SI) onsttuted the major lmtaton for the use of ths power onverter. To remedy to ths prolem, a new ontrol soluton to ompensate the unalaned D voltages for the fve-level NP SI s presented. It provdes a fast and flexle ontrol of the nverter apator voltages, leads to a smpler mplementaton, and present hgh equalzaton effeny. Smulaton results show the effetveness of our methods. Keywords- lampng rdge, fve-level, NP SI, Lyapunov funton, Sldng mode ontrol. I. INTRODTION In 980, early nterest n multlevel power onverson tehnology was trggered y the work of Naae, who ntrodued the neutral-pont-lamped (NP) nverter topology []. It was mmedately realzed that ths new onverter had many advantages over the more onventonal two-level nverter. Susequently, the onept of the three-level onverter was extended further and some new multlevel topologes were proposed. An alternatve to the dode-lamped onverter, the flyng apator topology does not have ssues wth lampng dodes. Frst proposed n 99 [], ths approah has the advantage of a larger numer of redundant swthng states, whh allows more freedom n alanng the lampng apators voltages. The man dsadvantage s the potental for parast resonane etween the deouplng apators; ths s made even worse y the hgh numer of apators, whh omplates pakagng for small ndutane. In addton, there are ssues wth voltage redstruton n the ase of voltage surges. Nevertheless, the flyng apator topology seems very promsng. The multlevel onfguraton wth asaded H-rdge nverters presents another alternatve n the desgn of multlevel onverters []. A prmary advantage of ths topology s that t provdes the flexlty to nrease the numer of levels wthout ntrodung omplexty nto the power stage. Also, ths topology requres the same numer of prmary swthes as the dode-lamped topology, ut does not requre the lampng dode. However, ths onfguraton uses multple dedated Dusses and often a omplated and expensve lne transformer, whh makes ths a rather expensve soluton. In addton, dretonal operaton s somewhat dffult (although not mpossle) to aheve. The paper frst reeved 0 Aug 009 and n revsed form 4 Jul 0 Dgtal Ref: A9074,, Proess ontrol Laoratory of the Natonal Polytehn Shool of Algers, 0, Rue Hassen BADI. ELHarrah BP8 Algers ALGERIA (orrespondng author e-mal: redha9@yahoo.fr). Perhaps the most mportant mprovement n asaded onverter topologes s the hyrd multlevel topology [4]. The man strength of ths approah s ts omnaton of the hgh voltage apaty of the relatvely slow GTO deves wth the hgh swthng frequeny of the lower voltage apaty IGBT deves. At the same tme, the dfferent voltage levels of the IGBT and GTO rdges reate an addtonal voltage level wthout any addtonal omplexty. One mportant prolem assoated wth the NP nverter s ts Neutral Pont (NP) varaton []. The D lnk NP potental an sgnfantly flutuate or ontnuously drft to unaeptale levels due to non unform swthng deve or D lnk apator haratersts or flutuaton eause of the rregular and unpredtale hargng and dshargng n eah apator [5-7]. Some solutons have een proposed, whh are ased on redundant swthng onfguratons [] [8-5] or on the addton of zero-sequene voltage omponents to the output voltage [9]. nfortunately, these methods modfy the output voltage waveform. As the numer of nverter-levels nreases, the prolem of apator alanng eomes more omplex and the soluton very drast. The unalane D voltage prolem an also e solved y separate D soures [6] or y addng eletron rutry. In [6-8], lampng rdges ased on transstors and resstors are proposed as a soluton to ths prolem. Ths paper deals ntrodues a new lampng rdge for the D apator voltage equalsaton has een proposed to D-lnk apators voltages flutuatons n an NP SI that permts to aheve a orret apators voltages sharng, when onventonal alanng methods ompensate fal. The organzaton of ths paper s as follows. Seton develops the mathematal modellng of the D-A onverter fve-level NP-SI and ts Pulse Wdth Modulaton ontrol strategy (PWM) usng four polar arrers. The ontrol of the two-level PWM urrent retfer y Lyapunov funton usng feedak loops to regulate the average value of D voltages and the network urrents are dsussed n seton. Therefore, a lampng rdge ontrol s ntrodued to mprove the performane of voltage alane strategy n seton 4. Fnally, n the seton 5, smulatons wll e mplemented to present a study of the phenomenon, to demonstrate the proposed method and to report the effetveness of ths soluton. II. FIE-LEEL ASADE We frstly propose a knowledge model of the threephase fve-level NP-SI nverter and develop a PWM strategy to ontrol t (four polar arrers). The gloal sheme of the asade s gven on the Fg. e-mal: emerkouk@yahoo.fr e-mal: ms_bouhert@yahoo.fr

2 han R. et.al : Fve-Level NP-SI apator... Ths strategy uses four polar arrers (, p, p, p ). It s haratersed y two parameters m the p 4 ndex modulaton and r the modulaton rate. The algorthm of ths strategy an e summarsed as follows: Fg.: Struture of the asade proposed A. Fve-level NP-SI modellng The general struture of the three-phase fve-level NP voltage soure nverter s shown on the fgure. It s omposed y 4 pars transstor-dode. Every leg of ths nverter nludes eght pars, four on the upper half leg and four on the lower one. The optmal ontrol law s gven elow: B B k k 5 B B k k 4 B B () k k 6 B k 7 B k. B k. B k B k 8 B k 4. B k 5. B k 6 Bks s the ontrol sgnal of TD ks. TD ks represent every par transstor-dode y one -dretonal swth. The voltage of the three-phase A, B, relatvely to the mddle pont M and usng the half leg onneton funtons F km are gven y XM wth x pont A, B or and k,,. XM [ F k.( + ) k 7.( )] () [ F k 0.( + 4 ) k 8.( )] The nput urrents of the three-phase fve-level nverter usng the load urrents are gven y the followng relatons: d F d F F d d 4 F () + + d 0 d d d d 4 B. ontrol strategy of the nverter For a fve-level nverter, four arrer waves and three modulaton sgnals are used. the modulaton waves are ompared wth the trangular arrer waves and at the nterseton ponts the swthng desons are made for the assoated swthes. Pulse Wdth Modulaton (PWM) of multlevel onverters s typally an extenson of two-level methods. The most ommon types of multlevel voltage-soure PWM are sne-trangle modulaton and spae-vetor modulaton (SM). Multlevel sne-trangle modulaton reles on defnng a numer of trangle waveforms and swthng rules for the nterseton of these waveforms wth a ommanded voltage waveform [ 4]. Ths method s farly straghtforward and nsghtful for desrpton of multlevel systems. Step : Determnaton of the ntermedate voltages > then p XM + < then 0 p XM > then p XM + < then p XM + > then 0 (4) p < then p p 4 XM XM > then XM 4 < then p 4 XM 4 Step : Determnaton of the output voltage (XA, B,) (5) XM XM XM XM XM 4 III.TWO-LEEL PWM RRENT RETIFIER The ontrol of the two-level PWM urrent retfer y Lyapunov Funton usng feedak loops to regulate the output D voltage and the network urrents are gven. The general struture of the two-level PWM urrent retfer s gven on the Fg. Fg.: General struture of the three-phase fve-level NP SI. Fg.: Struture of the two-level PWM urrent retfer A. oltage feedak ontrol

3 Asan Power Eletrons Journal, ol.5 No., Aug 0 For eah phase k (k, or ) of the three-phase network feedng, the retfer onsdered an e represented y a R,L rut. resk s the voltage of one phase k of the threephase network and k s the voltage of the leg k of the retfer [7]. The voltage loop mposes the effetve value of the referene urrent of the network orrespondng to the power exhanged etween the network and the ontnue load (Fg 4). Fg.4: ontrol algorthm of the average output D voltage of the two-level PWM urrent retfer. To guarantee the gloal asymptot stalty n the voltage loop, we otan I e as the output value of the voltage regulator: 4. I e.[ I h K..( ref )] (6). e B. urrent feedak ontrol We ontrol the network urrent of the phase and y a sldng mode regulator. The algorthm of ths urrent loop s gven on the Fg 5. In ths sheme, the transfer funton H (s) s expressed as follows: I resk H( s) (7) R + L. s seond ategory usng arrer-ased pulse wdth modulaton (PWM) sheme, a zero sequene voltage sgnal s added to the modulaton sgnals. In some shemes usng zero sequene voltage to alane D apator voltages, knowledge of load power fator (or dreton of nstantaneous power flow) s requred whh s dffult to mplement under transent ondtons, and n others, measurements of oth apator voltages and load urrents (magntudes or polartes) are requred. nfortunately, these methods modfy the output voltage waveform. Also, as the numer of nverter-levels nreases, the prolem of apator alanng eomes more omplex and the soluton very drast. By usng a separate supply for eah D-lnk level, the alanng ssues are solved [6]. However, ths soluton s expensve espeally for more then three-level. Another soluton onssts of addng eletron rutry. In [6-8], lampng rdges ased on transstors and resstors (dsspatve method) are proposed as a soluton to ths prolem. Advantages are low ost and low omplexty. Dsadvantages are hgh energy losses, hgh urrent swthes and ostly desgn thermal management requrements for large values. Ths method s est suted for systems that are harged often wth small urrents. In order to remedy to the unalane prolem, we suggest a soluton whh onssts n estalsh a rdge alanng etween the retfer and the ntermedate flter (Fg 6). The am of ths use s to lmt and stalse varatons of the nput D voltages of the nverter. Fg.5: ontrol algorthm of the network urrent resk of the threelevel PWM retfer. To guarantee the gloal asymptot stalty n the urrent loop, we otan N gk as the output of the urrent regulator:. π Ngk resk RI. resk Ieω L os( ωt ( k ) + KL ( resk ) 4. (8) I. LAMPING BRIDGE In ths seton, a lampng rdge ontrol s ntrodued to alane the four D nput voltages, avod NP potental drft and mprove the performanes of the speed ontrol of the permanent magnet synhronous mahne. Several pulatons have dsussed ways to solve ths alanng prolem n three-level NP-SI [8-7]. The multtude of proposals (seleton of approprate voltage vetors) mplemented to ensure D voltage alanng an e roadly dvded nto two ategores. In the frst ategory ased on spae vetor realzaton, redundant swthng states of the onverter are used whle n the Fg. 6: Struture of the lampng rdge The apator voltage equalzaton lampng rdge sheme has many advantages suh as hgher equalzaton effeny and a modular desgn approah. As shown n Fgure 6, swthes T, T, T and T 4 are MOSFET; dodes D, D, D and D 4 are ontnued flow dodes; L and L s the energy storage ndutors;,, and 4 are four adjaent seres ells, respetvely. The as operatonal prnple s as follows: * When >, a drve sgnal s gven to the swthes, and swth T s turned off and T s turned on. Whle T s on, apator, swth T and ndutor L forms a loop rut, whose urrent s I. The part of energy of apator transfers to ndutor L. Whle T s off, apator, ndutor L and the dode D forms a loop rut, whose urrent s I. The energy of ndutor L transfers to apator. * When <, swth T s turned off and T s turned on. The energy transfers from to untl the voltages of the two apators are the same.

4 han R. et.al : Fve-Level NP-SI apator... * When > 4, a drve sgnal s gven to the swthes, and swth T 4 s turned off and T s turned on. Whle T s on, apator, swth T and ndutor L forms a loop rut, whose urrent s I. The part of energy of apator transfers to ndutor L. Whle T s off, apator 4, ndutor L and the dode D forms a loop rut, whose urrent s I. The energy of ndutor L transfers to apator. * When < 4, swth T s turned off and T 4 s turned on. The energy transfers from to 4 untl the voltages of the two apators are same. apator voltage equalzaton ontrol should e mplemented to restrt the harge-dsharge urrent to the allowale ell lmtatons n the apator strng. The alanng algorthm searh to effently remove energy from a strong apator and transfer that energy nto a weak one untl the apator voltage s equalzed aross all apators. The apator voltage equalzaton lampng rdge sheme has many advantages suh as hgher equalzaton effeny and a modular desgn approah. The alanng algorthms searh to effently remove energy from a strong apator and transfer that energy nto a weak one untl the apator voltage s equalzed aross all apators. Fg.8. Output voltage A for m6, r0.8 and f50hz Fg.9. Harmon spetrum of the voltage A (m9 r0.8. A. Swth ontrol strategy of the lampng rdge Step : Deduton of the sgn of the dfferenes. We use the followng equatons: d ( ). ( L + d + ) dt d ( 4 ). ( L d ) dt Step : Deduton of the ommand of the transstors > T ; T 0 > T 0; T > T ; T > T 0; T 4 (9) (0) () Fg.0. Harmon spetrum of the voltage A for m and r0.8 Fg.. Harmon spetrum of the voltage A for m5 and r0.8. SIMLATION RESLTS In order to valdate the soluton proposed prevously, we present smulaton results for the two-level PWM urrent retfer fve-level NP-SI PMSM asade. In the frst ase, the lampng rdge wll not e used n order to show the nstalty prolem of the four nput D voltages. In the seond one, the soluton proposed s ntrodued to mprove the performanes of D voltages and PMSM. Fg.. haratersts of the voltage A for m6 Fg.7. Referene voltages and polar arrers Fg.: oltage and ts referene and the network voltage res, the network urrent res and ts referene ref 4

5 Asan Power Eletrons Journal, ol.5 No., Aug 0 I. RESLTS AND DISSSIONS Fg.4: oltage and Fg.5: oltage and 4 Fg.6: Speed and ts referene Fg.7: Eletromagnet torque Fg.8: d axs urrent ( d ) Fg.9: q axs urrent ( q ) Fg.0: oltages and Fg.: oltages and 4 Fg.: Speed and ts referene Fg.: Eletromagnet torque Fg.4: d axs urrent ( d ) Fg.5: q axs urrent ( q ) The fgure 7 shows the referene voltages and the four polar arrers used for ths strategy. The fgures 8 to gve the output voltage A. and ts harmon spetrum for a modulaton ndex m6 (Fg.8), m9 (Fg.9), m (Fg.0) and m5 (Fg.) and a modulaton rate r0.8. The frequeny s 50 Hz. We note that n the four ases, the harmons gather y famles entred around frequenes multple of 4.m.f. Beause of the symmetry to the quarter of the perod presented y the voltage A, we otan only odd harmons. The most mportant harmons gather around the frst famly. The modulaton rate r lets lnear adjustng of fundamental magntude from r0 to r and the harmons rate dereases when r nreases (Fg.). For evaluatng the performanes of the lampng rdge proposed, two smulatons are presented. The frst one propose to study a one two-level PWM urrent retfer Fve-level NP SI Permanent Magnet Synhronous Mahne. Ths study shows partularly the prolem of the nstalty of the nput D voltages of the fve-level NP SI and ts onsequene on the performanes of the PMSM speed ontrol for D 800, m7, r0.8 In order to test the Lyapunov funton ontrol of the average value of the output voltage of the two-level PWM retfer, a voltage referene of 00 s appled and at ts we nrease ths referene from 00 to 50. The fgure shows the voltage and ts referene otaned. Ths voltage follows perfetly ts referene (00). The network urrent res of the retfer s n phase wth the network voltage res. The parameters of the net are: R0.5Ω ; L0mH. On the fgure 4 and 5, we show perfetly the prolem of the unalane of the four D voltages of the ntermedate apators rdge. The voltages and 4 are dereasng and the voltages and are nreasng. The parameters of the apators are: 4 0µF The fgures 6 to 9 show the onsequenes of the D voltages drft on the haratersts of the Permanent Magnet Synhronous Mahne. The speed follows ts referene (400 rd/s) ut the undulatons on the eletromagnet torque and dfferent urrents ( d, q ) are very mportant due to the unalane prolem of the four nput D voltages. The parameters of the PM synhronous mahne are: L d L q.mh; R s Ω; p; Φ f 0.N.m/A; J6.0-4 kg.m²; F 9,5.0-5 N.m.s/rad. Those results show the mportane of the stalty of the nput D voltages of the nverter n order to have good performanes for the speed ontrol of the PM synhronous mahne. On the seond smulaton, we ntrodue the lampng rdge proposed n the preedent asade on the Fgure n order to show the dfferent nput D apator voltage equalzaton performanes. We an see on the fgures 0 and that the four voltages (,, and 4 ) stalse around the referene voltage value (00) and the D lnk apator voltages are equalzed. By usng ths tehnque of stalsaton, we an remark on the fgure,, 4 and 5 that the undulatons on the performanes (Torque and urrents d and q ) of the PMSM dsappear and those performanes are mproved y usng the ndutve lampng rdge. The parameters of the lampng rdge are: L mh L mh. 5

6 han R. et.al : Fve-Level NP-SI apator... The afore-presented results onfrm that the lampng rdge s ale to equalze D lnk apator voltages and stalze the dfferent D voltages around the desred value. The performanes of speed ontrol of the PMSM are then ameloratng. II. ONLSION The present ontruton ntends to demonstrate that permanent magnet synhronous mahne ontrol ased on sldng mode ontrol when appled wth a two-level PWM urrent retfer Fve-level PWM NP-SI may ontrute oth for funtonal performanes mprovement and attenuaton of some tehnologal lmtatons. The nput D voltages are generated y a two-level PWM urrent retfer ontrolled y Lyapunov funton. By ths study, we have partularly shown the prolem of the stalty and ts effets on the speed ontrol of PMSM and the nput D voltages soures of the nverter. In the last part of ths paper, we propose a smple soluton to stalse the four D voltages and ths y usng a lampng rdge omposed y four swthes (par transstor-dode) and two ndutanes. Ths nondsspatve equalzaton desgn has many advantages suh as hgh equalzaton effeny due to the nondsspatve urrent dverter, dretonal energy transferrng apalty, and a modular desgn. Another advantage of ths system s that no losed-loop ontrol s needed and the proess s self-lmtng: when voltage equalzaton s omplete, the swthng of the apators onsumes mnmal energy. L d, wndng, APPENDIX L q : self ndutane of the d and q armatures equvalent R s : resstane of an armature wndng,ω : angular speed. s : Laplae operator, J : nerta of the set mahne-load, r : Load torque, e d : Error varale, S d : Surfae varale resk : Network voltage of one phase k, k : oltage of the leg k of the retfer, R : grd resstane L : grd ndutane : Average value of the four nput D voltages,,, 4 : nput apators of the fve-level NP-SI ; : oltage and urrent of the grd res res : Effetve value of the grd voltage e REFERENES [] A.Naae, I.Takahash and H.Agak, A new neutral pont lamped PWM nverter, IEEE Transatons on Industral Applaton, 98, ol IA-7, ssue 5, pp [] T.Meynard and H.Foh. Mult-level hoppers for hgh voltage applatons, EPE Journal, ol No., pp45 50, 99. [] P. Hammond, A new approah to enhane power qualty for medum voltage a drves, IEEE Transatons on. Industral. Applatons., ol., pp.0 08, Jan./Fe [4] M. D. Manjrekar, P. K. Stemer, and T. A. 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