Phased Out Products. Video Signal Driver for DVD Players Monolithic IC MM1568. Outline. Features. Package. Applications

Transcription

1 ideo Signal for DD Players Monolithic I MM18 July 10, 00 Outline This I is a video signal driver I that supports -ch progressive video developed for DD players. It includes a low-pass filter that attenuates the noise element during DA conversion, and a -channel db amp with Ω driver (component circuit: -channel). In addition, external ESD protection diodes can be reduced by a sag correction pin for reducing output coupling capacitance, and enhancement of the ESD protection elements for output pins. Features 1. Includes a SAG correction pin. Enabled to drive a -channel db amp with Ω driver. Includes a th-order low-pass filter Frequency response:.mhz ±1dB / MHz - db min. 1.MHz ±1dB / MHz - min.. Includes a db amp. Includes a power save function. S/N=80dB typ.(/ mix:7 typ.) 7. ESD strengh (aerial discharge) of ±1k (IE standard) 8. The component circuity can support RGB sgnals with the control pin. Package SSOP-A Applications 1. DD players that support progressive video. Digital STB. Other digital video equipment

2 Block diagram 1 1 bias 10kΩ IN.MHz db Ω MUTE1 sync tip clamp IN.MHz + db Ω 1 OUT MIX IN BIAS IN 1 LP 1 bin 1 MUTE 1 sync tip clamp bias sync tip clamp bias 10kΩ bias 10kΩ.MHz 1.MHz 1.MHz db db db Ω Ω Ω SAG OUT SAG SAG bout bsag rin 1 17 bias 10kΩ 1.MHz db Ω rout rsag

3 Pin Assignment 1 1 IN MUTE1 IN 1 OUT MIX 0 SAG IN 9 BIAS 1 1 IN LP bin MUTE rin SSOP-A rsag IN 19 rout MUTE1 0 IN 1 bsag MIX bout IN 7 BIAS SAG SAG 11 8 OUT 1 IN 9 1 LP 0 SAG 1 bin 1 OUT 1 MUTE 1 rin 17 OUT SAG SAG bout bsag rout rsag

4 Pin Description Pin No. Pin name Function Internal equivalent circuit diagram 1 1 IN roma input 10k MUTE1 Mute Select 1 MUTE Using of Mute and POWER-SAING IN ideo input IN (omposite or ) Input clamp:sync tip 1 00 µ.1 MIX MIX select 0µ 1.

5 Pin Description Pin No. Pin name Function Internal equivalent circuit diagram 7 BIAS Bias 7 7k 1.k.k IN Luminance input The input can select Sync tip clamp or Bias. 1 LP Input clamp select k 1. 1 bin omponent input 1 rin 10k 1 1

6 Pin Description Pin No. Pin name Function Internal equivalent circuit diagram 18 rout Signal output 1 bout OUT 0 OUT 19 rsag SAG correction bsag SAG 8 SAG 1 SAG roma output Absolute Maximam Ratings (Ta= ) Item Symbol Rating Unit Storage temparature TSTG ~ +10 Operating temparature TOPR 0 ~ +8 Supply oltage max. 7 Power dissipation *1 Pd 1. W note *1 Board mounting power dissipation. Board size 100mmX100mmX1.mm Recommended Operating onditions Item Symbol Rating Unit Operating temparature TOPR 0 ~ +8 Operating oltage OP. ~ k

7 Electrical haracteristics (Unless otherwise specified, Ta=,cc=) Item Symbol Measurement onditions Min. Typ. Max. Unit I1 No signal ma onsumption current I No signal Mute1:ON 1 ma I No signal Mute:ON 9 71 ma I No signal Mute1 and Mute:ON 1 ma roma input IN omposite video input IN Luminance input IN, IN omponent input bin, rin roma outoput. omposite video output OUT 1.1 Luminance output OUT, 1.1 omponent output bout, rout. ontrol terminal H IIHm* 0 µa Input current L IILm* µa ontrol terminal H thhm*.1 input voltage L thlm* 0.7 Input impedance ZIN, bin, rin kω oltage gain G1,,,* SIN wave:1 f=100khz.7.0. db G1,,7,8* SIN wave:1 f=100khz.7.0. db f11~* SIN wave:1.mhz/100khz db f1~* SIN wave:1 MHz/100kHz 0 db Frequency characteristic f* SIN wave:1 1.MHz/100kHz db f7,8* SIN wave:0.7 1.MHz/100kHz db f~8* SIN wave:1 MHz/100kHz 0 db Differential gain DG1~* Staircase signal % Differential phase DP1~* Staircase signal Output dynamic range DRn* SIN wave:100khz THD=1.0%..0 rosstalk Tn* f=.mhz, 1 0 db SN1~* BW:100k ~ MHz 80 db S/N SN1~* BW:100k ~ MHz at MIX OUT 7 db SN~8* 80 db Group delay t1gd1~* at 100kHz 0 ns tgd~8* at 100kHz (omponent) 0 ns t1gdn* to.8mhz ns tgdn* to.mhz 7 ns Group delay deviation tgd1~* to MHz 1 ns tgd~8* to MHz (omponent) ns tgd~8* to 1MHz (omponent) 1 ns note * The subscript number "m" is the terminal of right table. note * The subscript number "n" is the combination of under table. n Input Output 1 IN IN OUT IN IN m Terminal 1 MUTE1 MUTE MIX LP n Input Output IN OUT IN 7 bin bout 8 rin rout

8 Test ircuit TP1 TP TP TP TP TP SG1 SG SG SG SG SG 1 1 IN MUTE1 1 OUT IN 0 SAG MIX 9 IN 8 OUT BIAS SAG MM SAG 11 1 IN bout LP 1 bsag bin 0 MUTE 19 rout rin 1 1µ 1 1 1µ 1 18 rsag 17

9 Switch ontrol Table Input ontrol Terminal Output Terminal Select MUTE1 MIX MUTE LP MUTE Low * * * IN High * * * MUTE Low * * * Low * * High IN High * * IN+IN OUT MUTE Low * * * OUT IN High * * * MUTE * * Low * IN(lamp) * * Low High IN(Bias) * * High MUTE bout * * Low * bin * * High * MUTE * * Low * rout rin * * High * * : Don't care

10 Application ircuit IN MUTE1 1 OUT IN 0 SAG MIX 9 IN 8 OUT BIAS 7 SAG SAG 11 b r b r S OUT 1 S OUT S OUT OMPOSITE IDEO OUT 1 OMPOSITE IDEO OUT OMPOSITE IDEO OUT OMPONENT OUT 1 OMPONENT OUT MM18 IN 1 bout LP 1 1µ 1 bsag bin 1 0 MUTE 1 1µ 19 rout rin 1 OUT OUT 18 OUT OUT b OUT rsag 17 r OUT MUTE control 1 MUTE control DA Microprocessor (note) : Please arrange power supply bypass capacitor near the terminal (PIN).

11 Application ircuit At unused the SAG correction function 1 1 IN MUTE1 1000µ 1 OUT IN 0 SAG MIX 9 IN 1000µ 8 OUT BIAS µ MM18 OUT OUT OUT OUT b OUT r OUT MUTE control 1 SAG MUTE control µ 1 b r b r 1µ µ 1µ S OUT 1 S OUT S OUT OMPOSITE IDEO OUT 1 OMPOSITE IDEO OUT OMPOSITE IDEO OUT OMPONENT OUT 1 OMPONENT OUT 1 SAG IN bout LP bsag bin MUTE rout rin rsag DA Microprocessor (note) : Please arrange power supply bypass capacitor near the terminal (PIN).