M52765FP M52765FP INTEGRATED CIRCUIT. 1. Model Number : 2. Functions Function name. Figure Block diagram. 3. Applications : TV,VTR

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1 PLL-SPLIT /SIF IC TEGRATED CIRCUIT. Model Number :. Functions. Function name. Block diagram 3. Applications : amplification, Picture detection, APC detection, IF / RF AGC, CO, AFT, Lock detection, Analog SW, SIF amplification, QIF amplification, QIF detection, QIF AGC, SIF limiter, FM detection. T,TR Figure 4. Package specifications 4. Package name 4 - pin plastic mold flat package 4. Package diagram number G Circuit diagram number 6. Pin configuration RF AGC DELAY AFT OUT RF AGC OUT NC GND GND SIF IF AGC FILTER / FM RADIO FM DET COIL AUDIO OUT SIF CARRIER DET LEEL APC FILTER IDEO OUT NTSC / OTHER SW cc cc CO COIL CO COIL SIF CARRIER DET OUT QIF OUT AF FILTER ITER 7. Related standards

2 8. Absolute maximum ratings ( Ta = 5ºC, unless otherwise noted ) PLL-SPLIT /SIF IC Parameter Symbol Ratings Unit Note Supply oltage cc 6.0 Power Consumption Pd 90 mw Operating Temperature Topr -0 ~ +75 ºC Storage Temperature Tstg -40 ~ +50 ºC Temperature Characteristics ( maximum ratings ) 750 Mounting in standard circuit board Ambient temperature Ta (ºC) Recommended Operating Condition Supply oltage Range (cc) 4.75 to 5.5 Rated Supply oltage (cc) 5.0

3 PLL-SPLIT /SIF IC 0. Block diagram and peripheral circuit cc CO COIL 5549 K BPF Radio CO AMP AFT AMP Radio IF AGC T IDEO DET APC QIF DET QIF AGC FM DET 47K 47K T RF AGC AMP SIF AMP AF AMP N.C TP TP3 SW SIF FM det coil 593 TP FIG.

4 PLL-SPLIT /SIF IC. Electrical Characteristics (CC=,Ta=5ºC unless otherwise noted) T Mode NO Parameter Symbol Circuit SG Measurement condition External power 0 4 switches set to position unless otherwise noted Limits M TYP MAX Circuit Current CC= cc= ICC A SG ma SW9= ideo Output DC oltage ideo Output oltage ideo S/N ideo Band Width Sensitivity Maximum Allowable AGC Control Range TPA 0 SW0= o det TPA SG. p-p.8.4 ideo S/N TPB BW M MAX TPA TPA TPA SG SG3 SG4 SG5 ariable SW= SW0= GR db Unit Note db MHz dbµ dbµ IF AGC oltage 0 TP0 SG Maximum IF AGC oltage 0H TP Minimum IF AGC oltage Maximum RF AGC oltage 0L 3H TP0 TP3 SG7 SG Minimum RF AGC oltage 3L TP3 SG RF AGC Delay 3 TP3 SG8 SW= dbµ 6 5 Capture Range U CL-U TPA SG9.0.7 MHz Capture Range L Capture Range T CL-L CL-T TPA SG MHz MHz AFT Sensitivity µ TP AFT Maximum oltage H AFT Minimum oltage L TP TP SG0 m khz 0 SG SG

5 PLL-SPLIT /SIF IC NO Parameter Symbol Circuit SG Measurement condition External power 0 4 switches set to position unless otherwise noted Limits M TYP MAX Unit Note Inter Modulation IM TPA ariable SG SW0= db Differential Gain DG TPA SG 5 % 3 Differential Phase DP TPA SG 5 deg 4 Sync. tip level SYNC TPA SG Resistor R TP5. kω 6 capacitance C TP5 5 pf

6 PLL-SPLIT /SIF IC NO Parameter Symbol Circuit SG Measurement condition External power 0 4 switches set to position unless otherwise noted Limits M TYP MAX Unit Note QIF Output 7 QIF oltage TP5 SIF SG SG dbµ 8 QIF Output oltage QIF TP5 SIF SG SG dbµ 9 AF Output (4.5MHz) oaf TP SG mrms 30 AFOutput Distortion (4.5MHz) THD AF TP SG % 3 Limiting Sensitivity (4.5MHz) TP SG dbµ 3 AM Rejection (4.5MHz) AMR TP SG db 3 33 AF S/N (4.5MHz) AF S/N TP SG db 4 34 SIF Resistor RS TP9.5 kω 35 SIF capacitance CS TP9 4 pf FM Radio Mode NO Parameter Symbol Circuit SG Measurement condition External power 0 4 switches set to position unless otherwise noted Limits M TYP MAX Unit Note 3 SIF detection out High oltage 6H TP6 0 SW0= SIF detection out Low oltage SIF 6L TP6 SG0 0 SW0= SIF detection Threshold TSIF TP6 SIF SG 0 SW0= dbµ 5 35 RF AGC Delay 3F SIF TP3 SG 0 SW= SW0= dbµ 6 36 AF Output of TP SG 0 SW0= mrms 37 AF Output Distortion THD F TP SG 0 SW0= 0..0 % 38 AF S/N S/N F TP SG9 0 SW0= 55 6 db 7

7 Measuring Circuit Diagram PLL-SPLIT /SIF IC BPF TPB SW9 A cc K 4 5 SW4 TP4 SW CO COIL 5549 TP5 TP4 TP TP Radio CO AMP AFT AMP Radio IF AGC T IDEO DET APC QIF DET QIF AGC 47K FM DET 47K T RF AGC AMP SIF AMP AF AMP N.C : TP TP3 TP9 TP0 SW TP 5 5 SIF SW0 FM det coil 593 TP 8 All capacitor is 0.0µF, unless otherwise noted. The Measuring Circuit is Mitsubishi standard evaluation fixture. Fig.

8 PLL-SPLIT /SIF IC Measuring Circuit Diagram Radio CO AMP AFT AMP Radio IF AGC T IDEO DET APC QIF DET QIF AGC 47K FM DET 47K T RF AGC AMP SIF AMP AF AMP TP4 TP7 HI LO RX meter HI LO RX meter All capacitor is 0.0µF, unless otherwise noted.

9 PLL-SPLIT /SIF IC PUT SIGNAL SG Ω Termination fo=58.75mhz AM 0 KHz 77.8 % 90 dbµ fo=58.75mhz 90 dbµ Cw f=58.75mhz 90 dbµ Cw f=frequency ariable 70 dbµ Cw Mixed Signal fo=58.75mhz AM 0 KHz 77.8% Level ariable fo=58.75mhz AM 0 KHz 4.0% Level ariable fo=58.75 MHz fo=58.75 MHz fo=58.75 MHz 80 dbµ Cw 0 dbµ Cw fo=frequency ariable AM 0 KHz 77.8 % 90 dbµ fo=frequency ariable f=58.75mhz 90 dbµ Cw f=55.7mhz 80 dbµ Cw f3=54.5mhz 80 dbµ Cw 90 dbµ Cw Mixed Signal fo=58.75mhz 87.5 % T modulation Ten-step waveform Sync Tip Level 90 dbµ fo=54.5mhz 95 dbµ Cw fo=54.5mhz 75 dbµ Cw fo=4.5 MHz 90 dbµ FM 400 Hz ±5 KHz dev fo=4.5 MHz Level ariable FM 400Hz ±5KHz dev fo=4.5 MHz 00 dbµ AM 400 Hz 30 % fo=4.5 MHz fo=4.5 MHz 90 dbµ Cw fo=54.5 MHz Cw Level ariable Level ariable Cw 90 dbµ Cw fo=54.5 MHz Level ariable Cw fo=4.5 MHz 90 dbµ FM 400 Hz ±75 KHz dev

10 Notes PLL-SPLIT /SIF IC. ideo S/N SG into and measure the video out(pin ) noise in r.m.s at TP-B through a 5MHz (-3dB) L.P.F. S/N=0 log 0.7 x 0 det NOISE (db). ideo Band width: BW. Measure the MHz component level of ideo output TPA with a spectrum analyzer when SG3(f=57.75MHz) is input into. At that time, measure the voltage at TP0 with SW0, set to position, and then fix 0 at that voltage.. Reduce f and measure the value of (f-f) when the (f-f) component level reaches -3dB from the MHz component level as shown below. TP -3dB MHz BW ( f - f ) 3. Sensitivity: M SG4 (i=90dbµ) into, and then gradually reduce i and measure the input level when the 0KHz component of ideo output TPA reaches - 3dB from o det level. 4. Maximum Allowable : MAX. SG5 (i=90dbµ) into, and measure the level of the 0KHz component of ideo output.. Gradually increase the i of SG and measure the input level when the output reaches -3dB.

11 PLL-SPLIT /SIF IC 5. AGC Control Range: GR GR = MAX - M (db) 6. RF AGC Operating oltage: 3 SG8 into and gradually reduce i and then measure the input level when RF AGC output TP3 reaches / CC, as shown below. TP3 oltage 3H /CC 3L i i(dbµ) 7. Capture range: CL - U. Increase the frequency of SG9 until the CO is out of locked-oscillation.. Decrease the frequency of SG9 and measure the frequency fu when the CO locks. CL - U = fu (MHz) 8. Capture range: CL - L. Decrease the frequency of SG9 until the CO is out of locked-oscillation.. Increase the frequency of SG9 and measure the frequency fl when the CO locks. CL - L = fl (MHz) 9. Capture range: CL - T CL - T = CL - U + CL - L (MHz)

12 PLL-SPLIT /SIF IC 0. AFT sensitivity µ, Maximum AFT voltage H, Minimum AFT voltage L. SG0 into, and set the frequency of SG0 so that the voltage of AFT output TP is 3. This frequency is named f(3).. Set the frequency of SG0 so that the AFT output voltage is. This frequency is named f() 3. the graph, maximum and minimum DC voltage is H and L, respectively. TP oltage µ = 000 (m) f() - f(3) (khz) (m/khz) 4 H f(3) f() L f(mhz). Inter modulation: IM. SG into, and measure EQ output TPA with an oscilloscope.. Adjust AGC filter voltage 0 so that the minimum DC level of the output waveform is At this time, measure TPA with a spectrum analyzer. The inter modulation is defined as a difference between 0.9MHz and 3.58 MHz frequency components.

13 PLL-SPLIT /SIF IC. Limiting Sensitivity:. SG6 (i=90dbµ) into SIF, and measure the 400Hz component level of AF output TP.. Lower the input level of SG6, and measure the level of SG6 when the oaf level reaches -3dB. Audio output [mrms] -3dB 90 level [dbµ] 3. AM Rejection: AMR. SG7 into SIF, and measure the output level of AF OUT (TP). This level is named AM.. AMR is; AMR = 0log oaf (mr.m.s) AM (mr.m.s) (db) 4. AF S/N: AF S/N. SG9 into SIF, and measure the output noise level of AF OUT (TP). This level is named N.. S/N is; S/N = 0log oaf (mr.m.s) N (mr.m.s) (db)

14 PLL-SPLIT /SIF IC 5. SIF detection threshold level TSIF SG is applied to SIF and the input amplitude is swept. Then, the level of SG, TSIF, is measured at the time when the DC voltage of SIF CARRIER DET OUT (TP6) has just begun to vary. 6. RF AGC voltage 3F SG is applied to SIF and the input amplitude is swept. Then, the level of SG, 3F, is measured at the time when the DC voltage of RF AGC OUT (TP3) has just reached /cc. 7. AF S/N (S/N F). SG9 is applied to SIF and the output noise of AUDIO OUT (TP) is measured. The measured noise is named NF. S/N F = 0log of [mr.m.s] [db]. S/N F is, NF [mr.m.s]

15 PLL-SPLIT /SIF IC CO coil adjustment methods. SG (fo=58.75mhz, 90dBµ CW) into.. And adjust the coil until the voltage of AFT output reaches about cc/=.. FM DET coil adjustment methods. The first thing, adjust the CO coil.. SG3 (fo=54.5mhz, 95dBµ CW) into SIF. 3. Change the switch of SW3 and SW5 to position. 4. Change to FM RADIO mode (0=0). 5. Adjust the DC voltage of AFT OUT to cc/ and SIF det OUT to Low (under ). Material Frame : Copper alloy Lead plating : Solder plating Plastic molded Indications M F P X X X X X X MITSUBISHI Model Number Mark lot number Lot number constitution The first place of the year (999) weekly code (th week) Production factory code Running number

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