Electronic Costing & Technology Experts

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Electronic Costing & Technology Experts 21 rue la Nouë Bras de Fer 44200 Nantes France

provides cost studies based on its knowledge of the manufacturing and selling prices of

The given values are realistic estimates which do not bind System Plus Consulting nor the

1 Electronic Costing & Technology Experts 21 rue la Nouë Bras de Fer Nantes France Phone : +33 (0) info@systemplus.fr May 2014 Version 2 Written by Sylvain Hallereau DISCLAIMER : System Plus Consulting provides cost studies based on its knowledge of the manufacturing and selling prices of electronic components and systems. The given values are realistic estimates which do not bind System Plus Consulting nor the manufacturers quoted in the report. System Plus Consulting is in no case responsible for the consequences related to the use which is made of the contents of this report. The quoted trademarks are property of their owners by SYSTEM PLUS CONSULTING, all rights reserved. 1

2 Glossary 1. Overview / Introduction 4 Executive Summary Comparison of C6 and C7 generations Reverse Costing Methodology 2. Companies Profile 8 Infineon Profile 3. IPD65R225C7 Characteristics 10 IPD65R225C7 Characteristics 4. IPD65R225C7 Physical Analysis 13 Physical Analysis Methodology Package Views & Dimensions Package Cross-Section Leadframe MOSFET Die View, Dimensions & Marking Gate Supply Line Guard Ring Delayering Metal Layers Source and Gate Cross-Section Source Cross-Section Substrate and Epitaxy Layers Superjunction Structure Backside MOSFET Characteristics 5. Manufacturing Process Flow 46 Global Overview MOSFET Front end Unit MOSFET Tests Unit Transistor Process Flow 6. Cost Analysis 56 Synthesis of the cost analysis Main steps of economic analysis Yields Hypotheses MOSFET Epitaxy Cost MOSFET Front-End Cost MOSFET Wafer Cost MOSFET Cost per process steps MOSFET : Equipment Cost per Family MOSFET : Material Cost per Family MOSFET : Back-End : Probe and IPD65R225C7 - Package IPD65R225C7 - Final Test 7. Price Estimation 76 Contact by SYSTEM PLUS CONSULTING, all rights reserved. 2

3 This full Reverse Costing study has been conducted in order to give insight on technology data, manufacturing cost of the CoolMOS 650V MOSFET used in the IPD65R225C7 from Infineon. The IPD65R225C7 package contains 1x CoolMOS 650V. The IPD65R225C7 drives 11A at 25 C for 225mohms and 7A at 100 C. The component is provided in a standard 3-pins DPAK package, compatible with SMD process. The MOSFET has a current density of 1.06A per mm² at 100 C under 650V. The power component is designed and manufactured by Infineon. The manufacturing of the MOSFET is assumed to take place in a 200mm wafer fab unit in Malaysia. The packaging and final test are realized by Infineon and are assumed to take place in a plant in Malaysia. The component can be used for : PFC stages, Hard switching PWM stages, Computing, Server, Telecom, UPS, Solar inverters by SYSTEM PLUS CONSULTING, all rights reserved. 3

5 The reverse costing analysis is conducted in 3 phases: Teardown analysis Package is analyzed and measured The dies are extracted in order to get overall data: dimensions, main blocks, pad number and pin out, die marking Setup of the manufacturing process. Costing analysis Setup of the manufacturing environment Cost simulation of the process steps Selling price analysis Supply chain analysis Analysis of the selling price 2014 by SYSTEM PLUS CONSULTING, all rights reserved. 5

The CoolMOS is assembled in a DPAK package. Dimensions : 6.

the packaging label : CoO: Malaysia (production country) Module top

6 The CoolMOS is assembled in a DPAK package. Dimensions : 6.6mm x 6mm x 2.3mm Marking Code : 65C7225 ( 650V C7 225mOhm) HRC339 (H = ROHS + halogen free; RC = Lot number 339 = week) (Logo Infineon) R On the packaging label : CoO: Malaysia (production country) Module top view Package back view DPAK exposed leadframe to enhance the heat dissipation. Lateral view 2014 by SYSTEM PLUS CONSULTING, all rights reserved. 6

Die in the DPAK after acid etching. 2 Aluminum wire bonds : 1 Gate bond : Xmm and Xµm of diameter in aluminum. 2 Source bond : Xmm and Xµm of diameter in aluminum.

7 Die in the DPAK after acid etching. 2 Aluminum wire bonds : 1 Gate bond : Xmm and Xµm of diameter in aluminum. 2 Source bond : Xmm and Xµm of diameter in aluminum. The lateral areas of the MOSFET, are covered by a polyimide layer, the yellow on the picture. Resin Bonding Pad for the test Gate bond The Drain is directly soldered on the package leadframe with SAC solder. Source bond 2014 by SYSTEM PLUS CONSULTING, all rights reserved. 7

8 Die size : XXmm x XXmm (XXsq mm) XXmm Source pad: - Size: XXmm x XXmm Gate pad: - Size: XXsq mm XXmm Die thickness: XXµm Optical views : Die Mark of the polyimide on the die by SYSTEM PLUS CONSULTING, all rights reserved. 8

Reverse costing analysis represents the best cost/price evaluation given the publically available data, and estimates completed by industry experts.

11 Reverse costing analysis represents the best cost/price evaluation given the publically available data, and estimates completed by industry experts. Given the hypothesis presented in this analysis, the major sources of correction would lead to a +/- 20% correction on the manufacturing cost (if all parameters are cumulated) These results are open for discussion. We can reevaluate this circuit with your information. Please contact us: 2014 by SYSTEM PLUS CONSULTING, all rights reserved. 11

21 rue La Noue Bras de Fer Nantes - France Phone : +33 (0) w7-foldite :

21 rue La Noue Bras de Fer Nantes - France Phone : +33 (0) w7-foldite : 21 rue La Noue Bras de Fer 44200 - Nantes - France Phone : +33 (0) 240 180 916 - email : info@systemplus.fr - w7-foldite : www.systemplus.fr February 2013 Version 1 Written by: Sylvain HALLEREAU DISCLAIMER