GaAS MMIC SMT LOW DISTORTION T/R SWITCH DC GHZ

Transcription

1 '99 MICROWVE CORPORTI GaS MMIC LOW DISTORTI T/R SWITCH DC GHZ Features General Description HIGH THIRD ORDER INTERCEPT: + m SINGLE POSITIVE SUPPLY: +3 TO +V HIGH POWER CPILITY TTL/CMOS CTROL The is a low-cost SPDT switch in an 8-lead SOIC package for use in transmit-receive applications which require very low distortion at high signal power levels. The device can control signals from DC to 2.5 GHz and is especially suited for 0MHz and GHz applications. The design provides exceptional intermodulation performance; providing a +m third order intercept at 8 Volt bias. 1 or 2 is a reflective short when "Off". On-chip circuitry allows single positive supply operation at very low DC current with control inputs compatible with CMOS and most TTL logic families. 7SPDT Guaranteed Performance, = +5 Vdc, 50 Ohm System, -40 to +85 deg C Insertion Loss Isolation Return Loss Parameter Input Power for 1 Compression Input Third 0/8V Control 0/8V Control Switching Characteristics trise, tfll (/% ) t, t (50% CTL to /% ) F requency M in. T yp. Max. DC - 1.0GHz DC - 2.0GHz DC - 1.0GHz DC - 2.0GHz DC - 1.0GHz DC - 2.0GHz GHz GHz GHz GHz Units d d 39 m m ns 24 ns 7-22

2 '99 MICROWVE CORPORTI LOW DISTORTI T/R SWITCH DC GHZ Insertion Loss 0 Isolation 0 INSERTI LOSS () ISOLTI () FREQUENCY (GHz) FREQUENCY (GHz) Return Loss 7 RETURN LOSS () SPDT FREQUENCY (GHz) S - Parameter data is available On-Line at

3 '99 MICROWVE CORPORTI LOW DISTORTI T/R SWITCH DC GHZ Input Power for 0.1 and 1.0 Compression vs ias Voltage Input Third vs ias Voltage COMPRESSI (m) db at 10MHz Compression vs ias Voltage Distortion vs ias Voltage 1 Watt Carrier at 0MHz 1 Watt Carrier at 10MHz 7SPDT ias Third Harmonic Third Harmonic ( Volts) ( c) (c) Caution: Do not operate in 1 compression at power levels above +m and do not "hot switch" power levels greater than +23 m ( = +5V). 1 at 0MHz 0.1 at 0MHz 0.1 at 10MHz IP3 (m) 0MHz 10MHz IS (Volts) IS (Volts) Carrier at 0MHz Carrier at 10MHz ias Input Power Input Power for 0.1 for 1 Compression Compression Input Power for 0.1 Compression Input Power for 1 Compression ( Volts) (m)

4 MICROWVE CORPORTI '99 LOW DISTORTI T/R SWITCH DC GHZ Functional Diagram 2 GND GND 1 Truth Table *Control Input Voltage Tolerances are ± 0.2 Vdc ias Control Input* (Vdc) (Vdc) (Vdc) ias Control Current Current Ivdd (u) la (u) Control Current lb (u) Signal Path State to 1 to bsolute Maximum Ratings ias Voltage Range () Control Voltage Range ( & ) Storage Temperature -0.2 to +12 Vdc -0.2 to + Vdc -65 to +150 deg C Operating Temperature Outline -40 to +85 deg C 0.188/0.196 (4.78/4.98) PIN 8 2 GND GND 1 LOT NUMER 0.150/ /0.244 (3.81/4.00) (5.82/6.20) NNNNN YYWW DTE CODE YY= YER WW= WEEK PIN 1 PIN 1 (REF) SPDT 0.054/0.068 (1.37/1.73) 3 Deg / 8 Deg 0.007/0.009 (0.18/0.25) TYP (1.27) TYP 0.014/0.018 (0.36/0.46) TYP 0.004/ (0.41) MIN TYP 1) MTERIL: ) PCKGE ODY: LOW STRESS INJECTI MOLDED PLSTIC, SILIC & SILICE IMPREGNTED ) LEDFRME MTERIL: COPPER LLOY 2. PLTING: LED-TIN SOLDER PLTE 3. DIMENSIS RE IN INCHES (MILLIMETERS) UNLESS OTHERWISE SPECIFIED TOLERNCE RE ±0.005 (±0.13) 7-25

5 '99 MICROWVE CORPORTI LOW DISTORTI T/R SWITCH DC GHZ Typical pplication Circuit for 2 1 GND GND +V R1 R2 R3 +V CTL CMOS CMOS Notes: 1. Control inputs and can be driven directly with CMOS logic (HC) with V of 3 to 8 Volts applied to the CMOS logic gates and to pin 4 of the switch. 2. DC locking capacitors are required for each port as shown. Capacitor value determines lowest frequency of operation. 3. Highest signal power capability is achieved with V set to +V. However, the switch will operate properly (but at lower power capability) at bias voltages down to +3V. 4. Set V to 5 Volts and use HCT series logic to provide a TTL driver interface. 7SPDT 7-26

6 MICROWVE CORPORTI '99 LOW DISTORTI T/R SWITCH DC GHZ Evaluation Circuit oard The circuit board used in the final application should use circuit design techniques. Signal lines should have 50 ohm impedance while the package ground leads should be connected directly to the ground plane similar to that shown below. sufficient number of VI holes should be used to connect the top and bottom ground planes. The evaluation circuit board as shown is available from Hittite upon request. Evaluation Circuit oard Layout Design Details 7 Layout Technique Material Grounded Co-Planar Waveguide (GCPW) FR4 SPDT Dielectric Thickness 0.028" (0.71 mm) 50 Ohm Line Width 0.037" (0.94 mm) Gap to Ground Edge 0.0" (0.25 mm) Ground VI Hole Diameter 0.014" (0.36 mm) Connectors SM-F ( EF - Johnson P/N ) 7-27