Effect of Interface Layer on the Performance of High Power Diode. Laser Arrays

Transcription

1 Effect of Interface Layer on the Performance of High Power Diode Laser Arrays Pu Zhang a, Jingwei Wang b, Lingling Xiong a, Xiaoning Li a,c, Dong Hou b, Xingsheng Liu a,b a State Key Laboratory of Transient Optics and Photonics, Xi'an Institute of Optics and Precision Mechanics, Chinese Academy of Sciences, No. 17 Xinxi Road, New Industrial Park, Xi'an Hi-Tech Industrial Development Zone, Xi'an, Shaanxi, , P.R. China b Focuslight Technologies Co., LTD, No. 60 Xibu Road, New Industrial Park, Xi'an Hi-Tech Industrial Development Zone, Xi'an, Shaanxi, , P.R. China c Key Laboratory for Physical Electronics and Devices of the Ministry of Education & Shaanxi Key Lab of Information Photonic Technique, Xi an Jiaotong University, No.28, Xianning West Road, Xi'an, Shaanxi, , P.R. China ABSTRACT Packaging is an important part of high power diode laser (HPLD) development and has become one of the key factors affecting the performance of high power diode lasers. In the package structure of HPLD, the interface layer of die bonding has significant effects on the thermal behavior of high power diode laser packages and most degradations and failures in high power diode laser packages are directly related to the interface layer. In this work, the effects of interface layer on the performance of high power diode laser array were studied numerically by modeling and experimentally. Firstly, numerical simulations using finite element method (FEM) were conducted to analyze the effects of voids in the interface layer on the temperature rise in active region of diode laser array. The correlation between junction temperature rise and voids was analyzed. According to the numerical simulation results, it was found that the local temperature rise of active region originated from the voids in the solder layer will lead to wavelength shift of some emitters. Secondly, the effects of solder interface layer on the spectrum properties of high power diode laser array were studied. It showed that the spectrum shape of diode laser array appeared right shoulder or multi-peaks, which were related to the voids in the solder interface layer. Finally, void-free techniques were developed to minimize the voids in the solder interface layer and achieve high power diode lasers with better optical-electrical performances. Key words: Diode laser array, Interface layer, Voids, Packaging, Spectrum 1. INTRODUCTION High power diode lasers have found increased applications in industry, advanced manufacturing, scientific research, aerospace and medical therapy, etc [1,2]. With the improvement of output power, efficiency and reliability of high power diode lasers, more and more new applications have been enabled [3]. Packaging has been a significant part of high power diode laser research and development and has become one of the limiting factors of high power diode lasers. In the zhangpu@opt.ac.cn, Phone: (86) ; Fax: (86) Components and Packaging for Laser Systems, edited by Alexei L. Glebov, Paul O. Leisher, Proc. of SPIE Vol. 9346, SPIE CCC code: X/15/$18 doi: / Proc. of SPIE Vol

2 package structure of high power diode laser, the properties of interface layers have significant effects on the performance of devices. For example, the junction temperature rise correlated with interface layer affects output power, spectrum, slope efficiency, threshold current and the reliability, etc. Most behaviors of degradation and failure in high power diode laser packages are directly related to interface layer [4]. The effects of interface layer on the performance of high power diode lasers have been studied by some groups in recent years. Xingsheng Liu et al. found that the sudden failure was caused by voids created and gradually enlarged by indium solder electromigration. They also found that the voids in the solder layer cause local heating near the facets of the laser and the local heating induced catastrophic optical mirror damage (COMD) of the lasers [5]. Ajit R. Dhamdhere et al. found the intermetallic compounds and microscopic physical defects at the die attach interface are detrimental to transient heat transfer, and thus, overall package reliability of high power diode laser [6]. According to the research by M. T. Sheen et al, the joint strength decrease was caused by both the enlargement of the initial voids and an increase in the number of voids as aging time of high power diode laser increased [7]. In order to understand the effects of interface layer on the optical-electrical performance of high power diode lasers, we performed numerical and experimental studies using finite element method, spatial spectrum, scanning acoustic microscope, etc. First, a conduction-cooled diode laser array was used as an example in studying the effects of voids in the solder layer on the junction temperature using FEM. After that, the spectrum and spatial spectrum of two typical conduction-cooled diode laser arrays were characterized. The correlations between spectrum shape and voids in solder layer were analyzed according to scanning acoustic microscope (SAM). Finally, void-free packaging techniques were developed to decrease the voids in the solder layer. Based on the void-free die bonding technique, a series of conduction-cooled diode laser array with improved optical-electrical performance were fabricated and characterized. 2. NUMERICAL SIMULATION OF INTERFACE LAYER ON THE JUNCTION TEMPERATURE 2.1 Device structure and finite element model The schematic diagram of a typical continuous wave (CW) 60W high power conduction-cooled laser diode array is shown in Figure 1. The package structure mainly consists of five parts: copper heatsink which dissipates the heat generated from diode laser array and acts as an anode in the same time; indium or AuSn solder layers; Al 2 O 3 insulator; diode laser array (also called diode laser bar ) ; copper foil which acts as a cathode. A laser diode bar contains several to tens of individual emitters, and the emitter width is also variable. The diode laser bar discussed in this paper contains 19 emitters with a stripe width 150μm and a pitch of 500μm (30% fill factor (FF)). The cavity length and the width of the diode laser bar are 2 mm and 10 mm, respectively. Proc. of SPIE Vol

3 Cu foil A1103 Insulator Solder Laser diode ba Solder Cu Anode (a) (b) Figure 1. The schematic diagram (a) and picture (b) of a conduction cooled diode laser array (CS package).these CS diode lasers were supplied by Focuslight Technologies Co., LTD. Figure 2. The finite element model of a conduction cooled diode laser array. During the FEM simulation, the boundary conditions are set as following: the bottom temperature is set and fixed at 25 because the CS diode laser array is commonly mounted on a TEC (thermoelectric cooler). The heat is primarily generated inside the emitters in the active region, and the heat generation rate of each emitter is assumed to be the same for each emitter. The electrical-optical conversion efficiency is assumed to be 50%. If the output power of a device containing 19 emitters is 60W, the heat generation of each emitter is 3.16W. The natural-convection heat transfer between the device and ambient air and thermal radiation are ignored in the simulation. In addition, the temperature and thermal flux are assumed to be satisfied with continuity as the following equations. The 3D finite element model is shown in Figure 2. T i (1) Ti 1 Ti ki y k i 1 T y i 1 y yi y yi 1 (2) Proc. of SPIE Vol

4 2.2 The effects of voids in solder layer on the junction temperature During the die bonding process of high power diode laser array, voids could be formed and propagate due to mechanical stress, thermal stress, thermal fatigue, electro-migration and other factors [5,8]. In our previous studies, it had been found that the solder voids causes local heating and therefore there could have a shoulder or tail on the right side of the spectrum, non-uniform thermal stress on the emitters could be the dominant factor in causing double or multiple peaks in spectrum profile [9,10]. However, it is still not clear about the quantitative effect of voids on the junction temperature and the corresponding optical-electrical properties of high power diode laser array. Temperature Rise ( C) Void Size ( m) Figure 3. The correlation between the void size and the junction temperature rise of high power diode laser array calculated using FEM. Numerical simulations were performed using finite element method to investigate and analyze the effects of solder voids on the temperature in active region. Based on the results of FEM simulation, the correlation between the void size and the temperature rise in the active region of high power diode laser array were shown in Figure 3. The functional relation between void size and junction temperature rise ΔT is fitted, as shown in Equation 3. T 38.21exp( Size/ ) (3) With the increase of void size, the slope of the function between the void size in solder layer and temperature rise in active region is decreased, which shows that it could induce a faster temperature rise when the void size is smaller. The effect of void position along the cavity of diode laser array is also simulated, as shown in Figure 4. The sizes of voids are set as 50μm(length)*50μm(height)*50μm(depth) and 250μm(length)*250μm(height)*50μm(depth), respectively. According to the simulation, when the void is near the front facet of resonance cavity, the corresponding temperature rise in active region increases very quickly. Hence, it s important to minimize voids near the front facet to decrease temperature of facet and improve the reliability of HPLD. Proc. of SPIE Vol

5 N-foil 3? so 23 Pìsr,>,tce Vow Rtcd Cu Heatsink P 0 2P 38 dg 2P Istanoe tv trontfaaet ium} Figure 4. The correlation between junction temperature rise and void position along the cavity for a high power diode laser array calculated using FEM. 3. THE EXPERIMENTAL RESULTS We choose two high power conduction-cooled diode laser arrays with two different kinds of spectral shapes: right shoulder and multi-peaks, as shown in Figure 5. The corresponding spectrum profile of each emitter was also measured and shown in Figure 5. It can be seen that the central wavelengths of 19 emitters are different from each other, which induced the different shapes of overall spectrum. ß1 - (4 *pules I ß ZS 61S cs em giiuelu La* Yat LI18uelasem lulu}!p ules MA ßCS Ljc'ü9;e ünh 4'!'., B', L,1[L Figure 5. The measured overall spectrum and spectrum of each emitter of a conduction cooled 60W diode laser array with different spectral shapes: right shoulder (a) and multi-peaks (b). The above two samples were characterized using SAM, as shown in Figure 6. For sample 1 and sample 2, the corresponding SAM images have a large amount of bright spots. According to the research by Xingsheng Liu et al., the brightest spots indicate solder voids [5,8] and the junction temperature of the individual emitters is very sensitive to the solder voiding underneath the emitters as the laser bar is epi-down bonded [9,10]. Hence, for sample 1 and sample 2, the right shoulder and multi-peaks in spectrum profile are mainly caused by thermal effects induced by voids in the lull:. Proc. of SPIE Vol

6 solder layer. According to relationship between wavelength and junction temperature, the temperature rise will cause the emitter wavelength red shift at 0.28nm/ [11]. Taking sample 1 as an example, the maximum wavelength difference for different emitters is 6 nm, which corresponds to a temperature difference of 21. Based on Equation 3 shown in sector 2.2, the void size could be ca. 375μm. Therefore, it could be concluded that the voids in solder layer have significant effects on the performance of high power diode laser array. Salimple. A sative Figure 6. The SAM images of two types of conduction cooled diode laser arrays shown in Figure PROCESS OPTIMIZATION OF INTERFACE LAYER According to the numerical and experimental results, one of the most critical issues for the packaging of high power diode laser is to decrease the amount and volume of voids in solder interface layer. Therefore, it is important to develop a void-free bonding technique. The principle is based on Equation 4 to eliminate void generation or minimize void size [4]. PV nrt (4) where P, V, and T are pressure, volume, and temperature of the air bubble respectively. n is the mole number of substance in air bubble, and R is gas constant. According to Equation 4, when pressure is decreased and temperature is increased, volume V will be increased for a given air bubble. When volume is large enough at very low pressure, the air bubble tends to burst. In this way, the potential voids could be eliminated. To decrease the void size, i.e., the volume of air bubble V, it needs higher pressure and lower temperature Power Voltage Efficiency Current A Figure 7. LIV test results of high power diode laser array manufactured by void-free die bonding process. Proc. of SPIE Vol

7 Based on our developed void-free bonding techniques, we successfully fabricated a series of high power diode laser array with better optical-electrical performance as shown in Figure 7 and Table 1. After optimization, The threshold current decreases from 10.29A to 10.26A; the slope efficiency increases from 1.19W/A to 1.20W/A; the wall plug efficiency increases from 56.29% to 56.92%; the spectral width (FWHM) decrease from 4.80nm to 1.85nm. Table 1. Comparison of devices performances before and after optimization of packaging process Indexes Before optimization After optimization I op (A) I th (A) Slope eff. (W/A) I op (%) Max Eff. (%) R s (mohms) I op (V) Central wavelength (nm) Peak wavelength (nm) FWHM (nm) FW 90% energy (nm) From the spatial spectrum of the diode laser array, which is shown in Figure 8, we can see that majority of emitters in the diode laser array have a good consistency apart from several emitters on the edge of the diode laser array and the maximum wavelength difference is only 0.4nm. According to the coefficient of wavelength and temperature of 0.28 nm/, it is deduced that the maximum temperature is less than 2. Based on our simulation in sector 2.2, the void size is smaller than 20μm. Based on our void-free die bonding techniques, 90% conduction cooled high power diode laser arrays have achieved spectrum width (FWHM, full width at half maximum) less than 2.5nm, as shown in Figure 9. After process optimization, the diode laser arrays have better optical-electrical performances. Intensity (a.u.) Wavelength (nm) Wavelength /nm (a) (b) Figure 8. Spectrum testing results of device manufactured by optimized process. (a) overall spectrum; (b) spectrum of each emitter. Proc. of SPIE Vol

8 ISL Tarret Process Data 'ESL 2.5 Sammle lean Sammle II 275 StDev(Withia) StDev(Overall) e e I7SI - Within Overall Potential (Within) Cayability CD CPI a CPU 0.60 Cyk 0.68 Overall Capability Pp r?pi a PIS 0.42 PIA 0.42 Cr. t % Observed Performance Iry. Within Performance Irv. Overall Performance PPI ( LSE t PPI ( ISL t or* ( ISL e PPI > '75L PAL } EEL PPI }DEL PPI Total nit Total PPI Total Figure 9. The statistic results of spectrum width (FWHM) of a series of conduction cooled high power diode laser arrays. 5. CONCLUSION The effects of interface layer on the performance of high power diode laser array are studied. The local temperature rise of diode laser array with voids in the solder layer and the correlation between temperature rise and voids sizes was analyzed using FEM. It was found that the local temperature rise of active layer originated from the voids in the solder layer will lead to wavelength red-shift. The spectrum shapes of diode laser array are related to the voids in the solder layer. We have developed a void-free technique to decrease the amount and size of voids in the solder layer and achieve the high power diode lasers with better optical-electrical performance. 6. ACKNOWLEDGEMENTS We would like to acknowledge support from the Natural Science Foundation of China under Grant and REFERENCES [1] Brian Faircloth, High-brightness high-power fiber coupled diode laser system for material processing and laser pumping, Proc. SPIE 4973, 34-41(2003). [2] Norbert Lichtenstein, Berthold Schmidt, Arnaud Fily, Stefan Weiß, Sebastian Arlt, Susanne Pawlik, Boris Sverdlov, Jürgen Müller and Christoph Harder, DPSSL and FL Pumps Based on 980nm-Telecom Pump Laser Technology: Changing the Industry, Proc. SPIE 5336, 77-83(2004). [3] Xingsheng Liu and Wei Zhao, Technology Trend and Challenges in High Power Semiconductor Laser Packaging, IEEE Proceedings of 59th Electronic Components and Technology Conference (ECTC), (2009). [4] Xingsheng Liu,Wei Zhao, Lingling Xiong and Hui Liu, Packaging of high power semiconductor lasers, Springer-Verlag New York Inc.(2014). [5] Xingsheng Liu, Ronald W. Davis, Lawrence C. Hughes, Michael H. Rasmussen, and Chung-En Zah, A Study on the Reliability of Indium Solder Die Bonding of High Power Semiconductor Lasers, Journal of Applied Physics, Vol. 100, Proc. of SPIE Vol

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